5 * Copyright (C) 2005 Mike Isely <isely@pobox.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/errno.h>
23 #include <linux/string.h>
24 #include <linux/slab.h>
25 #include <linux/firmware.h>
26 #include <linux/videodev2.h>
27 #include <media/v4l2-common.h>
28 #include <asm/semaphore.h>
30 #include "pvrusb2-std.h"
31 #include "pvrusb2-util.h"
32 #include "pvrusb2-hdw.h"
33 #include "pvrusb2-i2c-core.h"
34 #include "pvrusb2-tuner.h"
35 #include "pvrusb2-eeprom.h"
36 #include "pvrusb2-hdw-internal.h"
37 #include "pvrusb2-encoder.h"
38 #include "pvrusb2-debug.h"
40 #define TV_MIN_FREQ 55250000L
41 #define TV_MAX_FREQ 850000000L
43 #define RADIO_MIN_FREQ 87000000L
44 #define RADIO_MAX_FREQ 108000000L
46 struct usb_device_id pvr2_device_table[] = {
47 [PVR2_HDW_TYPE_29XXX] = { USB_DEVICE(0x2040, 0x2900) },
48 [PVR2_HDW_TYPE_24XXX] = { USB_DEVICE(0x2040, 0x2400) },
52 MODULE_DEVICE_TABLE(usb, pvr2_device_table);
54 static const char *pvr2_device_names[] = {
55 [PVR2_HDW_TYPE_29XXX] = "WinTV PVR USB2 Model Category 29xxxx",
56 [PVR2_HDW_TYPE_24XXX] = "WinTV PVR USB2 Model Category 24xxxx",
59 struct pvr2_string_table {
64 // Names of other client modules to request for 24xxx model hardware
65 static const char *pvr2_client_24xxx[] = {
71 // Names of other client modules to request for 29xxx model hardware
72 static const char *pvr2_client_29xxx[] = {
78 static struct pvr2_string_table pvr2_client_lists[] = {
79 [PVR2_HDW_TYPE_29XXX] = {
81 sizeof(pvr2_client_29xxx)/sizeof(pvr2_client_29xxx[0]),
83 [PVR2_HDW_TYPE_24XXX] = {
85 sizeof(pvr2_client_24xxx)/sizeof(pvr2_client_24xxx[0]),
89 static struct pvr2_hdw *unit_pointers[PVR_NUM] = {[ 0 ... PVR_NUM-1 ] = NULL};
90 static DECLARE_MUTEX(pvr2_unit_sem);
92 static int ctlchg = 0;
93 static int initusbreset = 1;
94 static int procreload = 0;
95 static int tuner[PVR_NUM] = { [0 ... PVR_NUM-1] = -1 };
96 static int tolerance[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 };
97 static int video_std[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 };
98 static int init_pause_msec = 0;
100 module_param(ctlchg, int, S_IRUGO|S_IWUSR);
101 MODULE_PARM_DESC(ctlchg, "0=optimize ctl change 1=always accept new ctl value");
102 module_param(init_pause_msec, int, S_IRUGO|S_IWUSR);
103 MODULE_PARM_DESC(init_pause_msec, "hardware initialization settling delay");
104 module_param(initusbreset, int, S_IRUGO|S_IWUSR);
105 MODULE_PARM_DESC(initusbreset, "Do USB reset device on probe");
106 module_param(procreload, int, S_IRUGO|S_IWUSR);
107 MODULE_PARM_DESC(procreload,
108 "Attempt init failure recovery with firmware reload");
109 module_param_array(tuner, int, NULL, 0444);
110 MODULE_PARM_DESC(tuner,"specify installed tuner type");
111 module_param_array(video_std, int, NULL, 0444);
112 MODULE_PARM_DESC(video_std,"specify initial video standard");
113 module_param_array(tolerance, int, NULL, 0444);
114 MODULE_PARM_DESC(tolerance,"specify stream error tolerance");
116 #define PVR2_CTL_WRITE_ENDPOINT 0x01
117 #define PVR2_CTL_READ_ENDPOINT 0x81
119 #define PVR2_GPIO_IN 0x9008
120 #define PVR2_GPIO_OUT 0x900c
121 #define PVR2_GPIO_DIR 0x9020
123 #define trace_firmware(...) pvr2_trace(PVR2_TRACE_FIRMWARE,__VA_ARGS__)
125 #define PVR2_FIRMWARE_ENDPOINT 0x02
127 /* size of a firmware chunk */
128 #define FIRMWARE_CHUNK_SIZE 0x2000
130 /* Define the list of additional controls we'll dynamically construct based
131 on query of the cx2341x module. */
132 struct pvr2_mpeg_ids {
136 static const struct pvr2_mpeg_ids mpeg_ids[] = {
138 .strid = "audio_layer",
139 .id = V4L2_CID_MPEG_AUDIO_ENCODING,
141 .strid = "audio_bitrate",
142 .id = V4L2_CID_MPEG_AUDIO_L2_BITRATE,
144 /* Already using audio_mode elsewhere :-( */
145 .strid = "mpeg_audio_mode",
146 .id = V4L2_CID_MPEG_AUDIO_MODE,
148 .strid = "mpeg_audio_mode_extension",
149 .id = V4L2_CID_MPEG_AUDIO_MODE_EXTENSION,
151 .strid = "audio_emphasis",
152 .id = V4L2_CID_MPEG_AUDIO_EMPHASIS,
154 .strid = "audio_crc",
155 .id = V4L2_CID_MPEG_AUDIO_CRC,
157 .strid = "video_aspect",
158 .id = V4L2_CID_MPEG_VIDEO_ASPECT,
160 .strid = "video_b_frames",
161 .id = V4L2_CID_MPEG_VIDEO_B_FRAMES,
163 .strid = "video_gop_size",
164 .id = V4L2_CID_MPEG_VIDEO_GOP_SIZE,
166 .strid = "video_gop_closure",
167 .id = V4L2_CID_MPEG_VIDEO_GOP_CLOSURE,
169 .strid = "video_bitrate_mode",
170 .id = V4L2_CID_MPEG_VIDEO_BITRATE_MODE,
172 .strid = "video_bitrate",
173 .id = V4L2_CID_MPEG_VIDEO_BITRATE,
175 .strid = "video_bitrate_peak",
176 .id = V4L2_CID_MPEG_VIDEO_BITRATE_PEAK,
178 .strid = "video_temporal_decimation",
179 .id = V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION,
181 .strid = "stream_type",
182 .id = V4L2_CID_MPEG_STREAM_TYPE,
184 .strid = "video_spatial_filter_mode",
185 .id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE,
187 .strid = "video_spatial_filter",
188 .id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER,
190 .strid = "video_luma_spatial_filter_type",
191 .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE,
193 .strid = "video_chroma_spatial_filter_type",
194 .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE,
196 .strid = "video_temporal_filter_mode",
197 .id = V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE,
199 .strid = "video_temporal_filter",
200 .id = V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER,
202 .strid = "video_median_filter_type",
203 .id = V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE,
205 .strid = "video_luma_median_filter_top",
206 .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP,
208 .strid = "video_luma_median_filter_bottom",
209 .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM,
211 .strid = "video_chroma_median_filter_top",
212 .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP,
214 .strid = "video_chroma_median_filter_bottom",
215 .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM,
218 #define MPEGDEF_COUNT (sizeof(mpeg_ids)/sizeof(mpeg_ids[0]))
221 static const char *control_values_srate[] = {
222 [V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100] = "44.1 kHz",
223 [V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000] = "48 kHz",
224 [V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000] = "32 kHz",
229 static const char *control_values_input[] = {
230 [PVR2_CVAL_INPUT_TV] = "television", /*xawtv needs this name*/
231 [PVR2_CVAL_INPUT_RADIO] = "radio",
232 [PVR2_CVAL_INPUT_SVIDEO] = "s-video",
233 [PVR2_CVAL_INPUT_COMPOSITE] = "composite",
237 static const char *control_values_audiomode[] = {
238 [V4L2_TUNER_MODE_MONO] = "Mono",
239 [V4L2_TUNER_MODE_STEREO] = "Stereo",
240 [V4L2_TUNER_MODE_LANG1] = "Lang1",
241 [V4L2_TUNER_MODE_LANG2] = "Lang2",
242 [V4L2_TUNER_MODE_LANG1_LANG2] = "Lang1+Lang2",
246 static const char *control_values_hsm[] = {
247 [PVR2_CVAL_HSM_FAIL] = "Fail",
248 [PVR2_CVAL_HSM_HIGH] = "High",
249 [PVR2_CVAL_HSM_FULL] = "Full",
253 static const char *control_values_subsystem[] = {
254 [PVR2_SUBSYS_B_ENC_FIRMWARE] = "enc_firmware",
255 [PVR2_SUBSYS_B_ENC_CFG] = "enc_config",
256 [PVR2_SUBSYS_B_DIGITIZER_RUN] = "digitizer_run",
257 [PVR2_SUBSYS_B_USBSTREAM_RUN] = "usbstream_run",
258 [PVR2_SUBSYS_B_ENC_RUN] = "enc_run",
261 static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl);
262 static int pvr2_hdw_commit_ctl_internal(struct pvr2_hdw *hdw);
263 static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw);
264 static unsigned int pvr2_hdw_get_signal_status_internal(struct pvr2_hdw *hdw);
265 static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw);
266 static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw);
267 static void pvr2_hdw_render_useless_unlocked(struct pvr2_hdw *hdw);
268 static void pvr2_hdw_subsys_bit_chg_no_lock(struct pvr2_hdw *hdw,
271 static void pvr2_hdw_subsys_stream_bit_chg_no_lock(struct pvr2_hdw *hdw,
274 static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
275 unsigned int timeout,int probe_fl,
276 void *write_data,unsigned int write_len,
277 void *read_data,unsigned int read_len);
278 static int pvr2_write_u16(struct pvr2_hdw *hdw, u16 data, int res);
279 static int pvr2_write_u8(struct pvr2_hdw *hdw, u8 data, int res);
281 static int ctrl_channelfreq_get(struct pvr2_ctrl *cptr,int *vp)
283 struct pvr2_hdw *hdw = cptr->hdw;
284 if ((hdw->freqProgSlot > 0) && (hdw->freqProgSlot <= FREQTABLE_SIZE)) {
285 *vp = hdw->freqTable[hdw->freqProgSlot-1];
292 static int ctrl_channelfreq_set(struct pvr2_ctrl *cptr,int m,int v)
294 struct pvr2_hdw *hdw = cptr->hdw;
295 if ((hdw->freqProgSlot > 0) && (hdw->freqProgSlot <= FREQTABLE_SIZE)) {
296 hdw->freqTable[hdw->freqProgSlot-1] = v;
301 static int ctrl_channelprog_get(struct pvr2_ctrl *cptr,int *vp)
303 *vp = cptr->hdw->freqProgSlot;
307 static int ctrl_channelprog_set(struct pvr2_ctrl *cptr,int m,int v)
309 struct pvr2_hdw *hdw = cptr->hdw;
310 if ((v >= 0) && (v <= FREQTABLE_SIZE)) {
311 hdw->freqProgSlot = v;
316 static int ctrl_channel_get(struct pvr2_ctrl *cptr,int *vp)
318 *vp = cptr->hdw->freqSlot;
322 static int ctrl_channel_set(struct pvr2_ctrl *cptr,int m,int v)
325 struct pvr2_hdw *hdw = cptr->hdw;
327 if ((hdw->freqSlot > 0) && (hdw->freqSlot <= FREQTABLE_SIZE)) {
328 freq = hdw->freqTable[hdw->freqSlot-1];
330 if (freq && (freq != hdw->freqVal)) {
337 static int ctrl_freq_get(struct pvr2_ctrl *cptr,int *vp)
339 *vp = cptr->hdw->freqVal;
343 static int ctrl_freq_is_dirty(struct pvr2_ctrl *cptr)
345 return cptr->hdw->freqDirty != 0;
348 static void ctrl_freq_clear_dirty(struct pvr2_ctrl *cptr)
350 cptr->hdw->freqDirty = 0;
353 static int ctrl_freq_set(struct pvr2_ctrl *cptr,int m,int v)
355 struct pvr2_hdw *hdw = cptr->hdw;
362 static int ctrl_vres_max_get(struct pvr2_ctrl *cptr,int *vp)
364 /* Actual maximum depends on the video standard in effect. */
365 if (cptr->hdw->std_mask_cur & V4L2_STD_525_60) {
373 static int ctrl_vres_min_get(struct pvr2_ctrl *cptr,int *vp)
375 /* Actual minimum depends on device type. */
376 if (cptr->hdw->hdw_type == PVR2_HDW_TYPE_24XXX) {
384 static int ctrl_freq_check(struct pvr2_ctrl *cptr,int v)
386 if (cptr->hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
387 return ((v >= RADIO_MIN_FREQ) && (v <= RADIO_MAX_FREQ));
389 return ((v >= TV_MIN_FREQ) && (v <= TV_MAX_FREQ));
393 static int ctrl_freq_max_get(struct pvr2_ctrl *cptr, int *vp)
395 /* Actual maximum depends on radio/tv mode */
396 if (cptr->hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
397 *vp = RADIO_MAX_FREQ;
404 static int ctrl_freq_min_get(struct pvr2_ctrl *cptr, int *vp)
406 /* Actual minimum depends on radio/tv mode */
407 if (cptr->hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
408 *vp = RADIO_MIN_FREQ;
415 static int ctrl_cx2341x_is_dirty(struct pvr2_ctrl *cptr)
417 return cptr->hdw->enc_stale != 0;
420 static void ctrl_cx2341x_clear_dirty(struct pvr2_ctrl *cptr)
422 cptr->hdw->enc_stale = 0;
425 static int ctrl_cx2341x_get(struct pvr2_ctrl *cptr,int *vp)
428 struct v4l2_ext_controls cs;
429 struct v4l2_ext_control c1;
430 memset(&cs,0,sizeof(cs));
431 memset(&c1,0,sizeof(c1));
434 c1.id = cptr->info->v4l_id;
435 ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state,&cs,
442 static int ctrl_cx2341x_set(struct pvr2_ctrl *cptr,int m,int v)
445 struct v4l2_ext_controls cs;
446 struct v4l2_ext_control c1;
447 memset(&cs,0,sizeof(cs));
448 memset(&c1,0,sizeof(c1));
451 c1.id = cptr->info->v4l_id;
453 ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state,&cs,
456 cptr->hdw->enc_stale = !0;
460 static unsigned int ctrl_cx2341x_getv4lflags(struct pvr2_ctrl *cptr)
462 struct v4l2_queryctrl qctrl;
463 struct pvr2_ctl_info *info;
464 qctrl.id = cptr->info->v4l_id;
465 cx2341x_ctrl_query(&cptr->hdw->enc_ctl_state,&qctrl);
466 /* Strip out the const so we can adjust a function pointer. It's
467 OK to do this here because we know this is a dynamically created
468 control, so the underlying storage for the info pointer is (a)
469 private to us, and (b) not in read-only storage. Either we do
470 this or we significantly complicate the underlying control
472 info = (struct pvr2_ctl_info *)(cptr->info);
473 if (qctrl.flags & V4L2_CTRL_FLAG_READ_ONLY) {
474 if (info->set_value) {
475 info->set_value = NULL;
478 if (!(info->set_value)) {
479 info->set_value = ctrl_cx2341x_set;
485 static int ctrl_streamingenabled_get(struct pvr2_ctrl *cptr,int *vp)
487 *vp = cptr->hdw->flag_streaming_enabled;
491 static int ctrl_hsm_get(struct pvr2_ctrl *cptr,int *vp)
493 int result = pvr2_hdw_is_hsm(cptr->hdw);
494 *vp = PVR2_CVAL_HSM_FULL;
495 if (result < 0) *vp = PVR2_CVAL_HSM_FAIL;
496 if (result) *vp = PVR2_CVAL_HSM_HIGH;
500 static int ctrl_stdavail_get(struct pvr2_ctrl *cptr,int *vp)
502 *vp = cptr->hdw->std_mask_avail;
506 static int ctrl_stdavail_set(struct pvr2_ctrl *cptr,int m,int v)
508 struct pvr2_hdw *hdw = cptr->hdw;
510 ns = hdw->std_mask_avail;
511 ns = (ns & ~m) | (v & m);
512 if (ns == hdw->std_mask_avail) return 0;
513 hdw->std_mask_avail = ns;
514 pvr2_hdw_internal_set_std_avail(hdw);
515 pvr2_hdw_internal_find_stdenum(hdw);
519 static int ctrl_std_val_to_sym(struct pvr2_ctrl *cptr,int msk,int val,
520 char *bufPtr,unsigned int bufSize,
523 *len = pvr2_std_id_to_str(bufPtr,bufSize,msk & val);
527 static int ctrl_std_sym_to_val(struct pvr2_ctrl *cptr,
528 const char *bufPtr,unsigned int bufSize,
533 ret = pvr2_std_str_to_id(&id,bufPtr,bufSize);
534 if (ret < 0) return ret;
535 if (mskp) *mskp = id;
536 if (valp) *valp = id;
540 static int ctrl_stdcur_get(struct pvr2_ctrl *cptr,int *vp)
542 *vp = cptr->hdw->std_mask_cur;
546 static int ctrl_stdcur_set(struct pvr2_ctrl *cptr,int m,int v)
548 struct pvr2_hdw *hdw = cptr->hdw;
550 ns = hdw->std_mask_cur;
551 ns = (ns & ~m) | (v & m);
552 if (ns == hdw->std_mask_cur) return 0;
553 hdw->std_mask_cur = ns;
555 pvr2_hdw_internal_find_stdenum(hdw);
559 static int ctrl_stdcur_is_dirty(struct pvr2_ctrl *cptr)
561 return cptr->hdw->std_dirty != 0;
564 static void ctrl_stdcur_clear_dirty(struct pvr2_ctrl *cptr)
566 cptr->hdw->std_dirty = 0;
569 static int ctrl_signal_get(struct pvr2_ctrl *cptr,int *vp)
571 *vp = ((pvr2_hdw_get_signal_status_internal(cptr->hdw) &
572 PVR2_SIGNAL_OK) ? 1 : 0);
576 static int ctrl_subsys_get(struct pvr2_ctrl *cptr,int *vp)
578 *vp = cptr->hdw->subsys_enabled_mask;
582 static int ctrl_subsys_set(struct pvr2_ctrl *cptr,int m,int v)
584 pvr2_hdw_subsys_bit_chg_no_lock(cptr->hdw,m,v);
588 static int ctrl_subsys_stream_get(struct pvr2_ctrl *cptr,int *vp)
590 *vp = cptr->hdw->subsys_stream_mask;
594 static int ctrl_subsys_stream_set(struct pvr2_ctrl *cptr,int m,int v)
596 pvr2_hdw_subsys_stream_bit_chg_no_lock(cptr->hdw,m,v);
600 static int ctrl_stdenumcur_set(struct pvr2_ctrl *cptr,int m,int v)
602 struct pvr2_hdw *hdw = cptr->hdw;
603 if (v < 0) return -EINVAL;
604 if (v > hdw->std_enum_cnt) return -EINVAL;
605 hdw->std_enum_cur = v;
608 if (hdw->std_mask_cur == hdw->std_defs[v].id) return 0;
609 hdw->std_mask_cur = hdw->std_defs[v].id;
615 static int ctrl_stdenumcur_get(struct pvr2_ctrl *cptr,int *vp)
617 *vp = cptr->hdw->std_enum_cur;
622 static int ctrl_stdenumcur_is_dirty(struct pvr2_ctrl *cptr)
624 return cptr->hdw->std_dirty != 0;
628 static void ctrl_stdenumcur_clear_dirty(struct pvr2_ctrl *cptr)
630 cptr->hdw->std_dirty = 0;
634 #define DEFINT(vmin,vmax) \
635 .type = pvr2_ctl_int, \
636 .def.type_int.min_value = vmin, \
637 .def.type_int.max_value = vmax
639 #define DEFENUM(tab) \
640 .type = pvr2_ctl_enum, \
641 .def.type_enum.count = (sizeof(tab)/sizeof((tab)[0])), \
642 .def.type_enum.value_names = tab
645 .type = pvr2_ctl_bool
647 #define DEFMASK(msk,tab) \
648 .type = pvr2_ctl_bitmask, \
649 .def.type_bitmask.valid_bits = msk, \
650 .def.type_bitmask.bit_names = tab
652 #define DEFREF(vname) \
653 .set_value = ctrl_set_##vname, \
654 .get_value = ctrl_get_##vname, \
655 .is_dirty = ctrl_isdirty_##vname, \
656 .clear_dirty = ctrl_cleardirty_##vname
659 #define VCREATE_FUNCS(vname) \
660 static int ctrl_get_##vname(struct pvr2_ctrl *cptr,int *vp) \
661 {*vp = cptr->hdw->vname##_val; return 0;} \
662 static int ctrl_set_##vname(struct pvr2_ctrl *cptr,int m,int v) \
663 {cptr->hdw->vname##_val = v; cptr->hdw->vname##_dirty = !0; return 0;} \
664 static int ctrl_isdirty_##vname(struct pvr2_ctrl *cptr) \
665 {return cptr->hdw->vname##_dirty != 0;} \
666 static void ctrl_cleardirty_##vname(struct pvr2_ctrl *cptr) \
667 {cptr->hdw->vname##_dirty = 0;}
669 VCREATE_FUNCS(brightness)
670 VCREATE_FUNCS(contrast)
671 VCREATE_FUNCS(saturation)
673 VCREATE_FUNCS(volume)
674 VCREATE_FUNCS(balance)
676 VCREATE_FUNCS(treble)
679 VCREATE_FUNCS(audiomode)
680 VCREATE_FUNCS(res_hor)
681 VCREATE_FUNCS(res_ver)
684 /* Table definition of all controls which can be manipulated */
685 static const struct pvr2_ctl_info control_defs[] = {
687 .v4l_id = V4L2_CID_BRIGHTNESS,
688 .desc = "Brightness",
689 .name = "brightness",
690 .default_value = 128,
694 .v4l_id = V4L2_CID_CONTRAST,
701 .v4l_id = V4L2_CID_SATURATION,
702 .desc = "Saturation",
703 .name = "saturation",
708 .v4l_id = V4L2_CID_HUE,
715 .v4l_id = V4L2_CID_AUDIO_VOLUME,
718 .default_value = 65535,
722 .v4l_id = V4L2_CID_AUDIO_BALANCE,
727 DEFINT(-32768,32767),
729 .v4l_id = V4L2_CID_AUDIO_BASS,
734 DEFINT(-32768,32767),
736 .v4l_id = V4L2_CID_AUDIO_TREBLE,
741 DEFINT(-32768,32767),
743 .v4l_id = V4L2_CID_AUDIO_MUTE,
750 .desc = "Video Source",
752 .internal_id = PVR2_CID_INPUT,
753 .default_value = PVR2_CVAL_INPUT_TV,
755 DEFENUM(control_values_input),
757 .desc = "Audio Mode",
758 .name = "audio_mode",
759 .internal_id = PVR2_CID_AUDIOMODE,
760 .default_value = V4L2_TUNER_MODE_STEREO,
762 DEFENUM(control_values_audiomode),
764 .desc = "Horizontal capture resolution",
765 .name = "resolution_hor",
766 .internal_id = PVR2_CID_HRES,
767 .default_value = 720,
771 .desc = "Vertical capture resolution",
772 .name = "resolution_ver",
773 .internal_id = PVR2_CID_VRES,
774 .default_value = 480,
777 /* Hook in check for video standard and adjust maximum
778 depending on the standard. */
779 .get_max_value = ctrl_vres_max_get,
780 .get_min_value = ctrl_vres_min_get,
782 .v4l_id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ,
783 .default_value = V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000,
784 .desc = "Audio Sampling Frequency",
787 DEFENUM(control_values_srate),
789 .desc = "Tuner Frequency (Hz)",
791 .internal_id = PVR2_CID_FREQUENCY,
792 .default_value = 175250000L,
793 .set_value = ctrl_freq_set,
794 .get_value = ctrl_freq_get,
795 .is_dirty = ctrl_freq_is_dirty,
796 .clear_dirty = ctrl_freq_clear_dirty,
797 DEFINT(TV_MIN_FREQ,TV_MAX_FREQ),
798 /* Hook in check for input value (tv/radio) and adjust
799 max/min values accordingly */
800 .check_value = ctrl_freq_check,
801 .get_max_value = ctrl_freq_max_get,
802 .get_min_value = ctrl_freq_min_get,
806 .set_value = ctrl_channel_set,
807 .get_value = ctrl_channel_get,
808 DEFINT(0,FREQTABLE_SIZE),
810 .desc = "Channel Program Frequency",
811 .name = "freq_table_value",
812 .set_value = ctrl_channelfreq_set,
813 .get_value = ctrl_channelfreq_get,
814 DEFINT(TV_MIN_FREQ,TV_MAX_FREQ),
816 .desc = "Channel Program ID",
817 .name = "freq_table_channel",
818 .set_value = ctrl_channelprog_set,
819 .get_value = ctrl_channelprog_get,
820 DEFINT(0,FREQTABLE_SIZE),
822 .desc = "Streaming Enabled",
823 .name = "streaming_enabled",
824 .get_value = ctrl_streamingenabled_get,
829 .get_value = ctrl_hsm_get,
830 DEFENUM(control_values_hsm),
832 .desc = "Signal Present",
833 .name = "signal_present",
834 .get_value = ctrl_signal_get,
837 .desc = "Video Standards Available Mask",
838 .name = "video_standard_mask_available",
839 .internal_id = PVR2_CID_STDAVAIL,
841 .get_value = ctrl_stdavail_get,
842 .set_value = ctrl_stdavail_set,
843 .val_to_sym = ctrl_std_val_to_sym,
844 .sym_to_val = ctrl_std_sym_to_val,
845 .type = pvr2_ctl_bitmask,
847 .desc = "Video Standards In Use Mask",
848 .name = "video_standard_mask_active",
849 .internal_id = PVR2_CID_STDCUR,
851 .get_value = ctrl_stdcur_get,
852 .set_value = ctrl_stdcur_set,
853 .is_dirty = ctrl_stdcur_is_dirty,
854 .clear_dirty = ctrl_stdcur_clear_dirty,
855 .val_to_sym = ctrl_std_val_to_sym,
856 .sym_to_val = ctrl_std_sym_to_val,
857 .type = pvr2_ctl_bitmask,
859 .desc = "Subsystem enabled mask",
860 .name = "debug_subsys_mask",
862 .get_value = ctrl_subsys_get,
863 .set_value = ctrl_subsys_set,
864 DEFMASK(PVR2_SUBSYS_ALL,control_values_subsystem),
866 .desc = "Subsystem stream mask",
867 .name = "debug_subsys_stream_mask",
869 .get_value = ctrl_subsys_stream_get,
870 .set_value = ctrl_subsys_stream_set,
871 DEFMASK(PVR2_SUBSYS_ALL,control_values_subsystem),
873 .desc = "Video Standard Name",
874 .name = "video_standard",
875 .internal_id = PVR2_CID_STDENUM,
877 .get_value = ctrl_stdenumcur_get,
878 .set_value = ctrl_stdenumcur_set,
879 .is_dirty = ctrl_stdenumcur_is_dirty,
880 .clear_dirty = ctrl_stdenumcur_clear_dirty,
881 .type = pvr2_ctl_enum,
885 #define CTRLDEF_COUNT (sizeof(control_defs)/sizeof(control_defs[0]))
888 const char *pvr2_config_get_name(enum pvr2_config cfg)
891 case pvr2_config_empty: return "empty";
892 case pvr2_config_mpeg: return "mpeg";
893 case pvr2_config_vbi: return "vbi";
894 case pvr2_config_radio: return "radio";
900 struct usb_device *pvr2_hdw_get_dev(struct pvr2_hdw *hdw)
906 unsigned long pvr2_hdw_get_sn(struct pvr2_hdw *hdw)
908 return hdw->serial_number;
911 int pvr2_hdw_get_unit_number(struct pvr2_hdw *hdw)
913 return hdw->unit_number;
917 /* Attempt to locate one of the given set of files. Messages are logged
918 appropriate to what has been found. The return value will be 0 or
919 greater on success (it will be the index of the file name found) and
920 fw_entry will be filled in. Otherwise a negative error is returned on
921 failure. If the return value is -ENOENT then no viable firmware file
923 static int pvr2_locate_firmware(struct pvr2_hdw *hdw,
924 const struct firmware **fw_entry,
925 const char *fwtypename,
926 unsigned int fwcount,
927 const char *fwnames[])
931 for (idx = 0; idx < fwcount; idx++) {
932 ret = request_firmware(fw_entry,
936 trace_firmware("Located %s firmware: %s;"
942 if (ret == -ENOENT) continue;
943 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
944 "request_firmware fatal error with code=%d",ret);
947 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
949 " Device %s firmware"
950 " seems to be missing.",
952 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
953 "Did you install the pvrusb2 firmware files"
954 " in their proper location?");
956 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
957 "request_firmware unable to locate %s file %s",
958 fwtypename,fwnames[0]);
960 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
961 "request_firmware unable to locate"
962 " one of the following %s files:",
964 for (idx = 0; idx < fwcount; idx++) {
965 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
966 "request_firmware: Failed to find %s",
975 * pvr2_upload_firmware1().
977 * Send the 8051 firmware to the device. After the upload, arrange for
978 * device to re-enumerate.
980 * NOTE : the pointer to the firmware data given by request_firmware()
981 * is not suitable for an usb transaction.
984 static int pvr2_upload_firmware1(struct pvr2_hdw *hdw)
986 const struct firmware *fw_entry = NULL;
991 static const char *fw_files_29xxx[] = {
992 "v4l-pvrusb2-29xxx-01.fw",
994 static const char *fw_files_24xxx[] = {
995 "v4l-pvrusb2-24xxx-01.fw",
997 static const struct pvr2_string_table fw_file_defs[] = {
998 [PVR2_HDW_TYPE_29XXX] = {
1000 sizeof(fw_files_29xxx)/sizeof(fw_files_29xxx[0]),
1002 [PVR2_HDW_TYPE_24XXX] = {
1004 sizeof(fw_files_24xxx)/sizeof(fw_files_24xxx[0]),
1007 hdw->fw1_state = FW1_STATE_FAILED; // default result
1009 trace_firmware("pvr2_upload_firmware1");
1011 ret = pvr2_locate_firmware(hdw,&fw_entry,"fx2 controller",
1012 fw_file_defs[hdw->hdw_type].cnt,
1013 fw_file_defs[hdw->hdw_type].lst);
1015 if (ret == -ENOENT) hdw->fw1_state = FW1_STATE_MISSING;
1019 usb_settoggle(hdw->usb_dev, 0 & 0xf, !(0 & USB_DIR_IN), 0);
1020 usb_clear_halt(hdw->usb_dev, usb_sndbulkpipe(hdw->usb_dev, 0 & 0x7f));
1022 pipe = usb_sndctrlpipe(hdw->usb_dev, 0);
1024 if (fw_entry->size != 0x2000){
1025 pvr2_trace(PVR2_TRACE_ERROR_LEGS,"wrong fx2 firmware size");
1026 release_firmware(fw_entry);
1030 fw_ptr = kmalloc(0x800, GFP_KERNEL);
1031 if (fw_ptr == NULL){
1032 release_firmware(fw_entry);
1036 /* We have to hold the CPU during firmware upload. */
1037 pvr2_hdw_cpureset_assert(hdw,1);
1039 /* upload the firmware to address 0000-1fff in 2048 (=0x800) bytes
1043 for(address = 0; address < fw_entry->size; address += 0x800) {
1044 memcpy(fw_ptr, fw_entry->data + address, 0x800);
1045 ret += usb_control_msg(hdw->usb_dev, pipe, 0xa0, 0x40, address,
1046 0, fw_ptr, 0x800, HZ);
1049 trace_firmware("Upload done, releasing device's CPU");
1051 /* Now release the CPU. It will disconnect and reconnect later. */
1052 pvr2_hdw_cpureset_assert(hdw,0);
1055 release_firmware(fw_entry);
1057 trace_firmware("Upload done (%d bytes sent)",ret);
1059 /* We should have written 8192 bytes */
1061 hdw->fw1_state = FW1_STATE_RELOAD;
1070 * pvr2_upload_firmware2()
1072 * This uploads encoder firmware on endpoint 2.
1076 int pvr2_upload_firmware2(struct pvr2_hdw *hdw)
1078 const struct firmware *fw_entry = NULL;
1080 unsigned int pipe, fw_len, fw_done;
1084 static const char *fw_files[] = {
1085 CX2341X_FIRM_ENC_FILENAME,
1088 trace_firmware("pvr2_upload_firmware2");
1090 ret = pvr2_locate_firmware(hdw,&fw_entry,"encoder",
1091 sizeof(fw_files)/sizeof(fw_files[0]),
1093 if (ret < 0) return ret;
1096 /* Since we're about to completely reinitialize the encoder,
1097 invalidate our cached copy of its configuration state. Next
1098 time we configure the encoder, then we'll fully configure it. */
1099 hdw->enc_cur_valid = 0;
1101 /* First prepare firmware loading */
1102 ret |= pvr2_write_register(hdw, 0x0048, 0xffffffff); /*interrupt mask*/
1103 ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000088); /*gpio dir*/
1104 ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/
1105 ret |= pvr2_hdw_cmd_deep_reset(hdw);
1106 ret |= pvr2_write_register(hdw, 0xa064, 0x00000000); /*APU command*/
1107 ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000408); /*gpio dir*/
1108 ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/
1109 ret |= pvr2_write_register(hdw, 0x9058, 0xffffffed); /*VPU ctrl*/
1110 ret |= pvr2_write_register(hdw, 0x9054, 0xfffffffd); /*reset hw blocks*/
1111 ret |= pvr2_write_register(hdw, 0x07f8, 0x80000800); /*encoder SDRAM refresh*/
1112 ret |= pvr2_write_register(hdw, 0x07fc, 0x0000001a); /*encoder SDRAM pre-charge*/
1113 ret |= pvr2_write_register(hdw, 0x0700, 0x00000000); /*I2C clock*/
1114 ret |= pvr2_write_register(hdw, 0xaa00, 0x00000000); /*unknown*/
1115 ret |= pvr2_write_register(hdw, 0xaa04, 0x00057810); /*unknown*/
1116 ret |= pvr2_write_register(hdw, 0xaa10, 0x00148500); /*unknown*/
1117 ret |= pvr2_write_register(hdw, 0xaa18, 0x00840000); /*unknown*/
1118 ret |= pvr2_write_u8(hdw, 0x52, 0);
1119 ret |= pvr2_write_u16(hdw, 0x0600, 0);
1122 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1123 "firmware2 upload prep failed, ret=%d",ret);
1124 release_firmware(fw_entry);
1128 /* Now send firmware */
1130 fw_len = fw_entry->size;
1132 if (fw_len % FIRMWARE_CHUNK_SIZE) {
1133 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1134 "size of %s firmware"
1135 " must be a multiple of 8192B",
1137 release_firmware(fw_entry);
1141 fw_ptr = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL);
1142 if (fw_ptr == NULL){
1143 release_firmware(fw_entry);
1144 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1145 "failed to allocate memory for firmware2 upload");
1149 pipe = usb_sndbulkpipe(hdw->usb_dev, PVR2_FIRMWARE_ENDPOINT);
1151 for (fw_done = 0 ; (fw_done < fw_len) && !ret ;
1152 fw_done += FIRMWARE_CHUNK_SIZE ) {
1154 memcpy(fw_ptr, fw_entry->data + fw_done, FIRMWARE_CHUNK_SIZE);
1155 /* Usbsnoop log shows that we must swap bytes... */
1156 for (i = 0; i < FIRMWARE_CHUNK_SIZE/4 ; i++)
1157 ((u32 *)fw_ptr)[i] = ___swab32(((u32 *)fw_ptr)[i]);
1159 ret |= usb_bulk_msg(hdw->usb_dev, pipe, fw_ptr,
1160 FIRMWARE_CHUNK_SIZE,
1161 &actual_length, HZ);
1162 ret |= (actual_length != FIRMWARE_CHUNK_SIZE);
1165 trace_firmware("upload of %s : %i / %i ",
1166 fw_files[fwidx],fw_done,fw_len);
1169 release_firmware(fw_entry);
1172 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1173 "firmware2 upload transfer failure");
1179 ret |= pvr2_write_register(hdw, 0x9054, 0xffffffff); /*reset hw blocks*/
1180 ret |= pvr2_write_register(hdw, 0x9058, 0xffffffe8); /*VPU ctrl*/
1181 ret |= pvr2_write_u16(hdw, 0x0600, 0);
1184 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1185 "firmware2 upload post-proc failure");
1187 hdw->subsys_enabled_mask |= (1<<PVR2_SUBSYS_B_ENC_FIRMWARE);
1193 #define FIRMWARE_RECOVERY_BITS \
1194 ((1<<PVR2_SUBSYS_B_ENC_CFG) | \
1195 (1<<PVR2_SUBSYS_B_ENC_RUN) | \
1196 (1<<PVR2_SUBSYS_B_ENC_FIRMWARE) | \
1197 (1<<PVR2_SUBSYS_B_USBSTREAM_RUN))
1201 This single function is key to pretty much everything. The pvrusb2
1202 device can logically be viewed as a series of subsystems which can be
1203 stopped / started or unconfigured / configured. To get things streaming,
1204 one must configure everything and start everything, but there may be
1205 various reasons over time to deconfigure something or stop something.
1206 This function handles all of this activity. Everything EVERYWHERE that
1207 must affect a subsystem eventually comes here to do the work.
1209 The current state of all subsystems is represented by a single bit mask,
1210 known as subsys_enabled_mask. The bit positions are defined by the
1211 PVR2_SUBSYS_xxxx macros, with one subsystem per bit position. At any
1212 time the set of configured or active subsystems can be queried just by
1213 looking at that mask. To change bits in that mask, this function here
1214 must be called. The "msk" argument indicates which bit positions to
1215 change, and the "val" argument defines the new values for the positions
1218 There is a priority ordering of starting / stopping things, and for
1219 multiple requested changes, this function implements that ordering.
1220 (Thus we will act on a request to load encoder firmware before we
1221 configure the encoder.) In addition to priority ordering, there is a
1222 recovery strategy implemented here. If a particular step fails and we
1223 detect that failure, this function will clear the affected subsystem bits
1224 and restart. Thus we have a means for recovering from a dead encoder:
1225 Clear all bits that correspond to subsystems that we need to restart /
1226 reconfigure and start over.
1229 static void pvr2_hdw_subsys_bit_chg_no_lock(struct pvr2_hdw *hdw,
1236 unsigned int tryCount = 0;
1238 if (!hdw->flag_ok) return;
1240 msk &= PVR2_SUBSYS_ALL;
1241 nmsk = (hdw->subsys_enabled_mask & ~msk) | (val & msk);
1242 nmsk &= PVR2_SUBSYS_ALL;
1246 if (!((nmsk ^ hdw->subsys_enabled_mask) &
1247 PVR2_SUBSYS_ALL)) break;
1249 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1250 "Too many retries when configuring device;"
1252 pvr2_hdw_render_useless(hdw);
1256 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1257 "Retrying device reconfiguration");
1259 pvr2_trace(PVR2_TRACE_INIT,
1260 "subsys mask changing 0x%lx:0x%lx"
1261 " from 0x%lx to 0x%lx",
1262 msk,val,hdw->subsys_enabled_mask,nmsk);
1264 vmsk = (nmsk ^ hdw->subsys_enabled_mask) &
1265 hdw->subsys_enabled_mask;
1267 if (vmsk & (1<<PVR2_SUBSYS_B_ENC_RUN)) {
1268 pvr2_trace(PVR2_TRACE_CTL,
1269 "/*---TRACE_CTL----*/"
1270 " pvr2_encoder_stop");
1271 ret = pvr2_encoder_stop(hdw);
1273 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1274 "Error recovery initiated");
1275 hdw->subsys_enabled_mask &=
1276 ~FIRMWARE_RECOVERY_BITS;
1280 if (vmsk & (1<<PVR2_SUBSYS_B_USBSTREAM_RUN)) {
1281 pvr2_trace(PVR2_TRACE_CTL,
1282 "/*---TRACE_CTL----*/"
1283 " pvr2_hdw_cmd_usbstream(0)");
1284 pvr2_hdw_cmd_usbstream(hdw,0);
1286 if (vmsk & (1<<PVR2_SUBSYS_B_DIGITIZER_RUN)) {
1287 pvr2_trace(PVR2_TRACE_CTL,
1288 "/*---TRACE_CTL----*/"
1289 " decoder disable");
1290 if (hdw->decoder_ctrl) {
1291 hdw->decoder_ctrl->enable(
1292 hdw->decoder_ctrl->ctxt,0);
1294 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1296 " No decoder present");
1298 hdw->subsys_enabled_mask &=
1299 ~(1<<PVR2_SUBSYS_B_DIGITIZER_RUN);
1301 if (vmsk & PVR2_SUBSYS_CFG_ALL) {
1302 hdw->subsys_enabled_mask &=
1303 ~(vmsk & PVR2_SUBSYS_CFG_ALL);
1306 vmsk = (nmsk ^ hdw->subsys_enabled_mask) & nmsk;
1308 if (vmsk & (1<<PVR2_SUBSYS_B_ENC_FIRMWARE)) {
1309 pvr2_trace(PVR2_TRACE_CTL,
1310 "/*---TRACE_CTL----*/"
1311 " pvr2_upload_firmware2");
1312 ret = pvr2_upload_firmware2(hdw);
1314 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1315 "Failure uploading encoder"
1317 pvr2_hdw_render_useless(hdw);
1321 if (vmsk & (1<<PVR2_SUBSYS_B_ENC_CFG)) {
1322 pvr2_trace(PVR2_TRACE_CTL,
1323 "/*---TRACE_CTL----*/"
1324 " pvr2_encoder_configure");
1325 ret = pvr2_encoder_configure(hdw);
1327 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1328 "Error recovery initiated");
1329 hdw->subsys_enabled_mask &=
1330 ~FIRMWARE_RECOVERY_BITS;
1334 if (vmsk & (1<<PVR2_SUBSYS_B_DIGITIZER_RUN)) {
1335 pvr2_trace(PVR2_TRACE_CTL,
1336 "/*---TRACE_CTL----*/"
1338 if (hdw->decoder_ctrl) {
1339 hdw->decoder_ctrl->enable(
1340 hdw->decoder_ctrl->ctxt,!0);
1342 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1344 " No decoder present");
1346 hdw->subsys_enabled_mask |=
1347 (1<<PVR2_SUBSYS_B_DIGITIZER_RUN);
1349 if (vmsk & (1<<PVR2_SUBSYS_B_USBSTREAM_RUN)) {
1350 pvr2_trace(PVR2_TRACE_CTL,
1351 "/*---TRACE_CTL----*/"
1352 " pvr2_hdw_cmd_usbstream(1)");
1353 pvr2_hdw_cmd_usbstream(hdw,!0);
1355 if (vmsk & (1<<PVR2_SUBSYS_B_ENC_RUN)) {
1356 pvr2_trace(PVR2_TRACE_CTL,
1357 "/*---TRACE_CTL----*/"
1358 " pvr2_encoder_start");
1359 ret = pvr2_encoder_start(hdw);
1361 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1362 "Error recovery initiated");
1363 hdw->subsys_enabled_mask &=
1364 ~FIRMWARE_RECOVERY_BITS;
1373 void pvr2_hdw_subsys_bit_chg(struct pvr2_hdw *hdw,
1374 unsigned long msk,unsigned long val)
1376 LOCK_TAKE(hdw->big_lock); do {
1377 pvr2_hdw_subsys_bit_chg_no_lock(hdw,msk,val);
1378 } while (0); LOCK_GIVE(hdw->big_lock);
1382 unsigned long pvr2_hdw_subsys_get(struct pvr2_hdw *hdw)
1384 return hdw->subsys_enabled_mask;
1388 unsigned long pvr2_hdw_subsys_stream_get(struct pvr2_hdw *hdw)
1390 return hdw->subsys_stream_mask;
1394 static void pvr2_hdw_subsys_stream_bit_chg_no_lock(struct pvr2_hdw *hdw,
1399 msk &= PVR2_SUBSYS_ALL;
1400 val2 = ((hdw->subsys_stream_mask & ~msk) | (val & msk));
1401 pvr2_trace(PVR2_TRACE_INIT,
1402 "stream mask changing 0x%lx:0x%lx from 0x%lx to 0x%lx",
1403 msk,val,hdw->subsys_stream_mask,val2);
1404 hdw->subsys_stream_mask = val2;
1408 void pvr2_hdw_subsys_stream_bit_chg(struct pvr2_hdw *hdw,
1412 LOCK_TAKE(hdw->big_lock); do {
1413 pvr2_hdw_subsys_stream_bit_chg_no_lock(hdw,msk,val);
1414 } while (0); LOCK_GIVE(hdw->big_lock);
1418 static int pvr2_hdw_set_streaming_no_lock(struct pvr2_hdw *hdw,int enableFl)
1420 if ((!enableFl) == !(hdw->flag_streaming_enabled)) return 0;
1422 pvr2_trace(PVR2_TRACE_START_STOP,
1423 "/*--TRACE_STREAM--*/ enable");
1424 pvr2_hdw_subsys_bit_chg_no_lock(hdw,~0,~0);
1426 pvr2_trace(PVR2_TRACE_START_STOP,
1427 "/*--TRACE_STREAM--*/ disable");
1428 pvr2_hdw_subsys_bit_chg_no_lock(hdw,hdw->subsys_stream_mask,0);
1430 if (!hdw->flag_ok) return -EIO;
1431 hdw->flag_streaming_enabled = enableFl != 0;
1436 int pvr2_hdw_get_streaming(struct pvr2_hdw *hdw)
1438 return hdw->flag_streaming_enabled != 0;
1442 int pvr2_hdw_set_streaming(struct pvr2_hdw *hdw,int enable_flag)
1445 LOCK_TAKE(hdw->big_lock); do {
1446 ret = pvr2_hdw_set_streaming_no_lock(hdw,enable_flag);
1447 } while (0); LOCK_GIVE(hdw->big_lock);
1452 static int pvr2_hdw_set_stream_type_no_lock(struct pvr2_hdw *hdw,
1453 enum pvr2_config config)
1455 unsigned long sm = hdw->subsys_enabled_mask;
1456 if (!hdw->flag_ok) return -EIO;
1457 pvr2_hdw_subsys_bit_chg_no_lock(hdw,hdw->subsys_stream_mask,0);
1458 hdw->config = config;
1459 pvr2_hdw_subsys_bit_chg_no_lock(hdw,~0,sm);
1464 int pvr2_hdw_set_stream_type(struct pvr2_hdw *hdw,enum pvr2_config config)
1467 if (!hdw->flag_ok) return -EIO;
1468 LOCK_TAKE(hdw->big_lock);
1469 ret = pvr2_hdw_set_stream_type_no_lock(hdw,config);
1470 LOCK_GIVE(hdw->big_lock);
1475 static int get_default_tuner_type(struct pvr2_hdw *hdw)
1477 int unit_number = hdw->unit_number;
1479 if ((unit_number >= 0) && (unit_number < PVR_NUM)) {
1480 tp = tuner[unit_number];
1482 if (tp < 0) return -EINVAL;
1483 hdw->tuner_type = tp;
1488 static v4l2_std_id get_default_standard(struct pvr2_hdw *hdw)
1490 int unit_number = hdw->unit_number;
1492 if ((unit_number >= 0) && (unit_number < PVR_NUM)) {
1493 tp = video_std[unit_number];
1499 static unsigned int get_default_error_tolerance(struct pvr2_hdw *hdw)
1501 int unit_number = hdw->unit_number;
1503 if ((unit_number >= 0) && (unit_number < PVR_NUM)) {
1504 tp = tolerance[unit_number];
1510 static int pvr2_hdw_check_firmware(struct pvr2_hdw *hdw)
1512 /* Try a harmless request to fetch the eeprom's address over
1513 endpoint 1. See what happens. Only the full FX2 image can
1514 respond to this. If this probe fails then likely the FX2
1515 firmware needs be loaded. */
1517 LOCK_TAKE(hdw->ctl_lock); do {
1518 hdw->cmd_buffer[0] = 0xeb;
1519 result = pvr2_send_request_ex(hdw,HZ*1,!0,
1522 if (result < 0) break;
1523 } while(0); LOCK_GIVE(hdw->ctl_lock);
1525 pvr2_trace(PVR2_TRACE_INIT,
1526 "Probe of device endpoint 1 result status %d",
1529 pvr2_trace(PVR2_TRACE_INIT,
1530 "Probe of device endpoint 1 succeeded");
1535 static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)
1539 v4l2_std_id std1,std2;
1541 std1 = get_default_standard(hdw);
1543 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),hdw->std_mask_eeprom);
1544 pvr2_trace(PVR2_TRACE_INIT,
1545 "Supported video standard(s) reported by eeprom: %.*s",
1548 hdw->std_mask_avail = hdw->std_mask_eeprom;
1550 std2 = std1 & ~hdw->std_mask_avail;
1552 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std2);
1553 pvr2_trace(PVR2_TRACE_INIT,
1554 "Expanding supported video standards"
1555 " to include: %.*s",
1557 hdw->std_mask_avail |= std2;
1560 pvr2_hdw_internal_set_std_avail(hdw);
1563 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std1);
1564 pvr2_trace(PVR2_TRACE_INIT,
1565 "Initial video standard forced to %.*s",
1567 hdw->std_mask_cur = std1;
1568 hdw->std_dirty = !0;
1569 pvr2_hdw_internal_find_stdenum(hdw);
1573 if (hdw->std_enum_cnt > 1) {
1574 // Autoselect the first listed standard
1575 hdw->std_enum_cur = 1;
1576 hdw->std_mask_cur = hdw->std_defs[hdw->std_enum_cur-1].id;
1577 hdw->std_dirty = !0;
1578 pvr2_trace(PVR2_TRACE_INIT,
1579 "Initial video standard auto-selected to %s",
1580 hdw->std_defs[hdw->std_enum_cur-1].name);
1584 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1585 "Unable to select a viable initial video standard");
1589 static void pvr2_hdw_setup_low(struct pvr2_hdw *hdw)
1593 struct pvr2_ctrl *cptr;
1596 reloadFl = (hdw->usb_intf->cur_altsetting->desc.bNumEndpoints
1599 pvr2_trace(PVR2_TRACE_INIT,
1600 "USB endpoint config looks strange"
1601 "; possibly firmware needs to be loaded");
1605 reloadFl = !pvr2_hdw_check_firmware(hdw);
1607 pvr2_trace(PVR2_TRACE_INIT,
1608 "Check for FX2 firmware failed"
1609 "; possibly firmware needs to be loaded");
1613 if (pvr2_upload_firmware1(hdw) != 0) {
1614 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1615 "Failure uploading firmware1");
1619 hdw->fw1_state = FW1_STATE_OK;
1622 pvr2_hdw_device_reset(hdw);
1624 if (!pvr2_hdw_dev_ok(hdw)) return;
1626 for (idx = 0; idx < pvr2_client_lists[hdw->hdw_type].cnt; idx++) {
1627 request_module(pvr2_client_lists[hdw->hdw_type].lst[idx]);
1630 pvr2_hdw_cmd_powerup(hdw);
1631 if (!pvr2_hdw_dev_ok(hdw)) return;
1633 if (pvr2_upload_firmware2(hdw)){
1634 pvr2_trace(PVR2_TRACE_ERROR_LEGS,"device unstable!!");
1635 pvr2_hdw_render_useless(hdw);
1639 // This step MUST happen after the earlier powerup step.
1640 pvr2_i2c_core_init(hdw);
1641 if (!pvr2_hdw_dev_ok(hdw)) return;
1643 for (idx = 0; idx < CTRLDEF_COUNT; idx++) {
1644 cptr = hdw->controls + idx;
1645 if (cptr->info->skip_init) continue;
1646 if (!cptr->info->set_value) continue;
1647 cptr->info->set_value(cptr,~0,cptr->info->default_value);
1650 // Do not use pvr2_reset_ctl_endpoints() here. It is not
1651 // thread-safe against the normal pvr2_send_request() mechanism.
1652 // (We should make it thread safe).
1654 ret = pvr2_hdw_get_eeprom_addr(hdw);
1655 if (!pvr2_hdw_dev_ok(hdw)) return;
1657 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1658 "Unable to determine location of eeprom, skipping");
1660 hdw->eeprom_addr = ret;
1661 pvr2_eeprom_analyze(hdw);
1662 if (!pvr2_hdw_dev_ok(hdw)) return;
1665 pvr2_hdw_setup_std(hdw);
1667 if (!get_default_tuner_type(hdw)) {
1668 pvr2_trace(PVR2_TRACE_INIT,
1669 "pvr2_hdw_setup: Tuner type overridden to %d",
1673 hdw->tuner_updated = !0;
1674 pvr2_i2c_core_check_stale(hdw);
1675 hdw->tuner_updated = 0;
1677 if (!pvr2_hdw_dev_ok(hdw)) return;
1679 pvr2_hdw_commit_ctl_internal(hdw);
1680 if (!pvr2_hdw_dev_ok(hdw)) return;
1682 hdw->vid_stream = pvr2_stream_create();
1683 if (!pvr2_hdw_dev_ok(hdw)) return;
1684 pvr2_trace(PVR2_TRACE_INIT,
1685 "pvr2_hdw_setup: video stream is %p",hdw->vid_stream);
1686 if (hdw->vid_stream) {
1687 idx = get_default_error_tolerance(hdw);
1689 pvr2_trace(PVR2_TRACE_INIT,
1690 "pvr2_hdw_setup: video stream %p"
1691 " setting tolerance %u",
1692 hdw->vid_stream,idx);
1694 pvr2_stream_setup(hdw->vid_stream,hdw->usb_dev,
1695 PVR2_VID_ENDPOINT,idx);
1698 if (!pvr2_hdw_dev_ok(hdw)) return;
1700 /* Make sure everything is up to date */
1701 pvr2_i2c_core_sync(hdw);
1703 if (!pvr2_hdw_dev_ok(hdw)) return;
1705 hdw->flag_init_ok = !0;
1709 int pvr2_hdw_setup(struct pvr2_hdw *hdw)
1711 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) begin",hdw);
1712 LOCK_TAKE(hdw->big_lock); do {
1713 pvr2_hdw_setup_low(hdw);
1714 pvr2_trace(PVR2_TRACE_INIT,
1715 "pvr2_hdw_setup(hdw=%p) done, ok=%d init_ok=%d",
1716 hdw,hdw->flag_ok,hdw->flag_init_ok);
1717 if (pvr2_hdw_dev_ok(hdw)) {
1718 if (pvr2_hdw_init_ok(hdw)) {
1721 "Device initialization"
1722 " completed successfully.");
1725 if (hdw->fw1_state == FW1_STATE_RELOAD) {
1728 "Device microcontroller firmware"
1729 " (re)loaded; it should now reset"
1734 PVR2_TRACE_ERROR_LEGS,
1735 "Device initialization was not successful.");
1736 if (hdw->fw1_state == FW1_STATE_MISSING) {
1738 PVR2_TRACE_ERROR_LEGS,
1739 "Giving up since device"
1740 " microcontroller firmware"
1741 " appears to be missing.");
1747 PVR2_TRACE_ERROR_LEGS,
1748 "Attempting pvrusb2 recovery by reloading"
1749 " primary firmware.");
1751 PVR2_TRACE_ERROR_LEGS,
1752 "If this works, device should disconnect"
1753 " and reconnect in a sane state.");
1754 hdw->fw1_state = FW1_STATE_UNKNOWN;
1755 pvr2_upload_firmware1(hdw);
1758 PVR2_TRACE_ERROR_LEGS,
1759 "***WARNING*** pvrusb2 device hardware"
1760 " appears to be jammed"
1761 " and I can't clear it.");
1763 PVR2_TRACE_ERROR_LEGS,
1764 "You might need to power cycle"
1765 " the pvrusb2 device"
1766 " in order to recover.");
1768 } while (0); LOCK_GIVE(hdw->big_lock);
1769 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) end",hdw);
1770 return hdw->flag_init_ok;
1774 /* Create and return a structure for interacting with the underlying
1776 struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,
1777 const struct usb_device_id *devid)
1779 unsigned int idx,cnt1,cnt2;
1780 struct pvr2_hdw *hdw;
1781 unsigned int hdw_type;
1783 struct pvr2_ctrl *cptr;
1785 struct v4l2_queryctrl qctrl;
1786 struct pvr2_ctl_info *ciptr;
1788 hdw_type = devid - pvr2_device_table;
1790 sizeof(pvr2_device_names)/sizeof(pvr2_device_names[0])) {
1791 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1792 "Bogus device type of %u reported",hdw_type);
1796 hdw = kmalloc(sizeof(*hdw),GFP_KERNEL);
1797 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_create: hdw=%p, type \"%s\"",
1798 hdw,pvr2_device_names[hdw_type]);
1799 if (!hdw) goto fail;
1800 memset(hdw,0,sizeof(*hdw));
1801 cx2341x_fill_defaults(&hdw->enc_ctl_state);
1803 hdw->control_cnt = CTRLDEF_COUNT;
1804 hdw->control_cnt += MPEGDEF_COUNT;
1805 hdw->controls = kmalloc(sizeof(struct pvr2_ctrl) * hdw->control_cnt,
1807 if (!hdw->controls) goto fail;
1808 memset(hdw->controls,0,sizeof(struct pvr2_ctrl) * hdw->control_cnt);
1809 hdw->hdw_type = hdw_type;
1810 for (idx = 0; idx < hdw->control_cnt; idx++) {
1811 cptr = hdw->controls + idx;
1814 for (idx = 0; idx < 32; idx++) {
1815 hdw->std_mask_ptrs[idx] = hdw->std_mask_names[idx];
1817 for (idx = 0; idx < CTRLDEF_COUNT; idx++) {
1818 cptr = hdw->controls + idx;
1819 cptr->info = control_defs+idx;
1821 /* Define and configure additional controls from cx2341x module. */
1822 hdw->mpeg_ctrl_info = kmalloc(
1823 sizeof(*(hdw->mpeg_ctrl_info)) * MPEGDEF_COUNT, GFP_KERNEL);
1824 if (!hdw->mpeg_ctrl_info) goto fail;
1825 memset(hdw->mpeg_ctrl_info,0,
1826 sizeof(*(hdw->mpeg_ctrl_info)) * MPEGDEF_COUNT);
1827 for (idx = 0; idx < MPEGDEF_COUNT; idx++) {
1828 cptr = hdw->controls + idx + CTRLDEF_COUNT;
1829 ciptr = &(hdw->mpeg_ctrl_info[idx].info);
1830 ciptr->desc = hdw->mpeg_ctrl_info[idx].desc;
1831 ciptr->name = mpeg_ids[idx].strid;
1832 ciptr->v4l_id = mpeg_ids[idx].id;
1833 ciptr->skip_init = !0;
1834 ciptr->get_value = ctrl_cx2341x_get;
1835 ciptr->get_v4lflags = ctrl_cx2341x_getv4lflags;
1836 ciptr->is_dirty = ctrl_cx2341x_is_dirty;
1837 if (!idx) ciptr->clear_dirty = ctrl_cx2341x_clear_dirty;
1838 qctrl.id = ciptr->v4l_id;
1839 cx2341x_ctrl_query(&hdw->enc_ctl_state,&qctrl);
1840 if (!(qctrl.flags & V4L2_CTRL_FLAG_READ_ONLY)) {
1841 ciptr->set_value = ctrl_cx2341x_set;
1843 strncpy(hdw->mpeg_ctrl_info[idx].desc,qctrl.name,
1844 PVR2_CTLD_INFO_DESC_SIZE);
1845 hdw->mpeg_ctrl_info[idx].desc[PVR2_CTLD_INFO_DESC_SIZE-1] = 0;
1846 ciptr->default_value = qctrl.default_value;
1847 switch (qctrl.type) {
1849 case V4L2_CTRL_TYPE_INTEGER:
1850 ciptr->type = pvr2_ctl_int;
1851 ciptr->def.type_int.min_value = qctrl.minimum;
1852 ciptr->def.type_int.max_value = qctrl.maximum;
1854 case V4L2_CTRL_TYPE_BOOLEAN:
1855 ciptr->type = pvr2_ctl_bool;
1857 case V4L2_CTRL_TYPE_MENU:
1858 ciptr->type = pvr2_ctl_enum;
1859 ciptr->def.type_enum.value_names =
1860 cx2341x_ctrl_get_menu(ciptr->v4l_id);
1862 ciptr->def.type_enum.value_names[cnt1] != NULL;
1864 ciptr->def.type_enum.count = cnt1;
1870 // Initialize video standard enum dynamic control
1871 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDENUM);
1873 memcpy(&hdw->std_info_enum,cptr->info,
1874 sizeof(hdw->std_info_enum));
1875 cptr->info = &hdw->std_info_enum;
1878 // Initialize control data regarding video standard masks
1879 valid_std_mask = pvr2_std_get_usable();
1880 for (idx = 0; idx < 32; idx++) {
1881 if (!(valid_std_mask & (1 << idx))) continue;
1882 cnt1 = pvr2_std_id_to_str(
1883 hdw->std_mask_names[idx],
1884 sizeof(hdw->std_mask_names[idx])-1,
1886 hdw->std_mask_names[idx][cnt1] = 0;
1888 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDAVAIL);
1890 memcpy(&hdw->std_info_avail,cptr->info,
1891 sizeof(hdw->std_info_avail));
1892 cptr->info = &hdw->std_info_avail;
1893 hdw->std_info_avail.def.type_bitmask.bit_names =
1895 hdw->std_info_avail.def.type_bitmask.valid_bits =
1898 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDCUR);
1900 memcpy(&hdw->std_info_cur,cptr->info,
1901 sizeof(hdw->std_info_cur));
1902 cptr->info = &hdw->std_info_cur;
1903 hdw->std_info_cur.def.type_bitmask.bit_names =
1905 hdw->std_info_avail.def.type_bitmask.valid_bits =
1909 hdw->eeprom_addr = -1;
1910 hdw->unit_number = -1;
1911 hdw->v4l_minor_number_video = -1;
1912 hdw->v4l_minor_number_vbi = -1;
1913 hdw->v4l_minor_number_radio = -1;
1914 hdw->ctl_write_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL);
1915 if (!hdw->ctl_write_buffer) goto fail;
1916 hdw->ctl_read_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL);
1917 if (!hdw->ctl_read_buffer) goto fail;
1918 hdw->ctl_write_urb = usb_alloc_urb(0,GFP_KERNEL);
1919 if (!hdw->ctl_write_urb) goto fail;
1920 hdw->ctl_read_urb = usb_alloc_urb(0,GFP_KERNEL);
1921 if (!hdw->ctl_read_urb) goto fail;
1923 down(&pvr2_unit_sem); do {
1924 for (idx = 0; idx < PVR_NUM; idx++) {
1925 if (unit_pointers[idx]) continue;
1926 hdw->unit_number = idx;
1927 unit_pointers[idx] = hdw;
1930 } while (0); up(&pvr2_unit_sem);
1933 cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"pvrusb2");
1935 if (hdw->unit_number >= 0) {
1936 cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"_%c",
1937 ('a' + hdw->unit_number));
1940 if (cnt1 >= sizeof(hdw->name)) cnt1 = sizeof(hdw->name)-1;
1941 hdw->name[cnt1] = 0;
1943 pvr2_trace(PVR2_TRACE_INIT,"Driver unit number is %d, name is %s",
1944 hdw->unit_number,hdw->name);
1946 hdw->tuner_type = -1;
1948 /* Initialize the mask of subsystems that we will shut down when we
1950 hdw->subsys_stream_mask = PVR2_SUBSYS_RUN_ALL;
1951 hdw->subsys_stream_mask |= (1<<PVR2_SUBSYS_B_ENC_CFG);
1953 pvr2_trace(PVR2_TRACE_INIT,"subsys_stream_mask: 0x%lx",
1954 hdw->subsys_stream_mask);
1956 hdw->usb_intf = intf;
1957 hdw->usb_dev = interface_to_usbdev(intf);
1959 ifnum = hdw->usb_intf->cur_altsetting->desc.bInterfaceNumber;
1960 usb_set_interface(hdw->usb_dev,ifnum,0);
1962 mutex_init(&hdw->ctl_lock_mutex);
1963 mutex_init(&hdw->big_lock_mutex);
1968 usb_free_urb(hdw->ctl_read_urb);
1969 usb_free_urb(hdw->ctl_write_urb);
1970 kfree(hdw->ctl_read_buffer);
1971 kfree(hdw->ctl_write_buffer);
1972 kfree(hdw->controls);
1973 kfree(hdw->mpeg_ctrl_info);
1980 /* Remove _all_ associations between this driver and the underlying USB
1982 static void pvr2_hdw_remove_usb_stuff(struct pvr2_hdw *hdw)
1984 if (hdw->flag_disconnected) return;
1985 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_remove_usb_stuff: hdw=%p",hdw);
1986 if (hdw->ctl_read_urb) {
1987 usb_kill_urb(hdw->ctl_read_urb);
1988 usb_free_urb(hdw->ctl_read_urb);
1989 hdw->ctl_read_urb = NULL;
1991 if (hdw->ctl_write_urb) {
1992 usb_kill_urb(hdw->ctl_write_urb);
1993 usb_free_urb(hdw->ctl_write_urb);
1994 hdw->ctl_write_urb = NULL;
1996 if (hdw->ctl_read_buffer) {
1997 kfree(hdw->ctl_read_buffer);
1998 hdw->ctl_read_buffer = NULL;
2000 if (hdw->ctl_write_buffer) {
2001 kfree(hdw->ctl_write_buffer);
2002 hdw->ctl_write_buffer = NULL;
2004 pvr2_hdw_render_useless_unlocked(hdw);
2005 hdw->flag_disconnected = !0;
2006 hdw->usb_dev = NULL;
2007 hdw->usb_intf = NULL;
2011 /* Destroy hardware interaction structure */
2012 void pvr2_hdw_destroy(struct pvr2_hdw *hdw)
2014 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_destroy: hdw=%p",hdw);
2015 if (hdw->fw_buffer) {
2016 kfree(hdw->fw_buffer);
2017 hdw->fw_buffer = NULL;
2019 if (hdw->vid_stream) {
2020 pvr2_stream_destroy(hdw->vid_stream);
2021 hdw->vid_stream = NULL;
2023 if (hdw->audio_stat) {
2024 hdw->audio_stat->detach(hdw->audio_stat->ctxt);
2026 if (hdw->decoder_ctrl) {
2027 hdw->decoder_ctrl->detach(hdw->decoder_ctrl->ctxt);
2029 pvr2_i2c_core_done(hdw);
2030 pvr2_hdw_remove_usb_stuff(hdw);
2031 down(&pvr2_unit_sem); do {
2032 if ((hdw->unit_number >= 0) &&
2033 (hdw->unit_number < PVR_NUM) &&
2034 (unit_pointers[hdw->unit_number] == hdw)) {
2035 unit_pointers[hdw->unit_number] = NULL;
2037 } while (0); up(&pvr2_unit_sem);
2038 kfree(hdw->controls);
2039 kfree(hdw->mpeg_ctrl_info);
2040 kfree(hdw->std_defs);
2041 kfree(hdw->std_enum_names);
2046 int pvr2_hdw_init_ok(struct pvr2_hdw *hdw)
2048 return hdw->flag_init_ok;
2052 int pvr2_hdw_dev_ok(struct pvr2_hdw *hdw)
2054 return (hdw && hdw->flag_ok);
2058 /* Called when hardware has been unplugged */
2059 void pvr2_hdw_disconnect(struct pvr2_hdw *hdw)
2061 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_disconnect(hdw=%p)",hdw);
2062 LOCK_TAKE(hdw->big_lock);
2063 LOCK_TAKE(hdw->ctl_lock);
2064 pvr2_hdw_remove_usb_stuff(hdw);
2065 LOCK_GIVE(hdw->ctl_lock);
2066 LOCK_GIVE(hdw->big_lock);
2070 // Attempt to autoselect an appropriate value for std_enum_cur given
2071 // whatever is currently in std_mask_cur
2072 static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw)
2075 for (idx = 1; idx < hdw->std_enum_cnt; idx++) {
2076 if (hdw->std_defs[idx-1].id == hdw->std_mask_cur) {
2077 hdw->std_enum_cur = idx;
2081 hdw->std_enum_cur = 0;
2085 // Calculate correct set of enumerated standards based on currently known
2086 // set of available standards bits.
2087 static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw)
2089 struct v4l2_standard *newstd;
2090 unsigned int std_cnt;
2093 newstd = pvr2_std_create_enum(&std_cnt,hdw->std_mask_avail);
2095 if (hdw->std_defs) {
2096 kfree(hdw->std_defs);
2097 hdw->std_defs = NULL;
2099 hdw->std_enum_cnt = 0;
2100 if (hdw->std_enum_names) {
2101 kfree(hdw->std_enum_names);
2102 hdw->std_enum_names = NULL;
2107 PVR2_TRACE_ERROR_LEGS,
2108 "WARNING: Failed to identify any viable standards");
2110 hdw->std_enum_names = kmalloc(sizeof(char *)*(std_cnt+1),GFP_KERNEL);
2111 hdw->std_enum_names[0] = "none";
2112 for (idx = 0; idx < std_cnt; idx++) {
2113 hdw->std_enum_names[idx+1] =
2116 // Set up the dynamic control for this standard
2117 hdw->std_info_enum.def.type_enum.value_names = hdw->std_enum_names;
2118 hdw->std_info_enum.def.type_enum.count = std_cnt+1;
2119 hdw->std_defs = newstd;
2120 hdw->std_enum_cnt = std_cnt+1;
2121 hdw->std_enum_cur = 0;
2122 hdw->std_info_cur.def.type_bitmask.valid_bits = hdw->std_mask_avail;
2126 int pvr2_hdw_get_stdenum_value(struct pvr2_hdw *hdw,
2127 struct v4l2_standard *std,
2131 if (!idx) return ret;
2132 LOCK_TAKE(hdw->big_lock); do {
2133 if (idx >= hdw->std_enum_cnt) break;
2135 memcpy(std,hdw->std_defs+idx,sizeof(*std));
2137 } while (0); LOCK_GIVE(hdw->big_lock);
2142 /* Get the number of defined controls */
2143 unsigned int pvr2_hdw_get_ctrl_count(struct pvr2_hdw *hdw)
2145 return hdw->control_cnt;
2149 /* Retrieve a control handle given its index (0..count-1) */
2150 struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_index(struct pvr2_hdw *hdw,
2153 if (idx >= hdw->control_cnt) return NULL;
2154 return hdw->controls + idx;
2158 /* Retrieve a control handle given its index (0..count-1) */
2159 struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_id(struct pvr2_hdw *hdw,
2160 unsigned int ctl_id)
2162 struct pvr2_ctrl *cptr;
2166 /* This could be made a lot more efficient, but for now... */
2167 for (idx = 0; idx < hdw->control_cnt; idx++) {
2168 cptr = hdw->controls + idx;
2169 i = cptr->info->internal_id;
2170 if (i && (i == ctl_id)) return cptr;
2176 /* Given a V4L ID, retrieve the control structure associated with it. */
2177 struct pvr2_ctrl *pvr2_hdw_get_ctrl_v4l(struct pvr2_hdw *hdw,unsigned int ctl_id)
2179 struct pvr2_ctrl *cptr;
2183 /* This could be made a lot more efficient, but for now... */
2184 for (idx = 0; idx < hdw->control_cnt; idx++) {
2185 cptr = hdw->controls + idx;
2186 i = cptr->info->v4l_id;
2187 if (i && (i == ctl_id)) return cptr;
2193 /* Given a V4L ID for its immediate predecessor, retrieve the control
2194 structure associated with it. */
2195 struct pvr2_ctrl *pvr2_hdw_get_ctrl_nextv4l(struct pvr2_hdw *hdw,
2196 unsigned int ctl_id)
2198 struct pvr2_ctrl *cptr,*cp2;
2202 /* This could be made a lot more efficient, but for now... */
2204 for (idx = 0; idx < hdw->control_cnt; idx++) {
2205 cptr = hdw->controls + idx;
2206 i = cptr->info->v4l_id;
2208 if (i <= ctl_id) continue;
2209 if (cp2 && (cp2->info->v4l_id < i)) continue;
2217 static const char *get_ctrl_typename(enum pvr2_ctl_type tp)
2220 case pvr2_ctl_int: return "integer";
2221 case pvr2_ctl_enum: return "enum";
2222 case pvr2_ctl_bool: return "boolean";
2223 case pvr2_ctl_bitmask: return "bitmask";
2229 /* Commit all control changes made up to this point. Subsystems can be
2230 indirectly affected by these changes. For a given set of things being
2231 committed, we'll clear the affected subsystem bits and then once we're
2232 done committing everything we'll make a request to restore the subsystem
2233 state(s) back to their previous value before this function was called.
2234 Thus we can automatically reconfigure affected pieces of the driver as
2235 controls are changed. */
2236 static int pvr2_hdw_commit_ctl_internal(struct pvr2_hdw *hdw)
2238 unsigned long saved_subsys_mask = hdw->subsys_enabled_mask;
2239 unsigned long stale_subsys_mask = 0;
2241 struct pvr2_ctrl *cptr;
2243 int commit_flag = 0;
2245 unsigned int bcnt,ccnt;
2247 for (idx = 0; idx < hdw->control_cnt; idx++) {
2248 cptr = hdw->controls + idx;
2249 if (cptr->info->is_dirty == 0) continue;
2250 if (!cptr->info->is_dirty(cptr)) continue;
2255 bcnt = scnprintf(buf,sizeof(buf),"\"%s\" <-- ",
2258 cptr->info->get_value(cptr,&value);
2259 pvr2_ctrl_value_to_sym_internal(cptr,~0,value,
2261 sizeof(buf)-bcnt,&ccnt);
2263 bcnt += scnprintf(buf+bcnt,sizeof(buf)-bcnt," <%s>",
2264 get_ctrl_typename(cptr->info->type));
2265 pvr2_trace(PVR2_TRACE_CTL,
2266 "/*--TRACE_COMMIT--*/ %.*s",
2271 /* Nothing has changed */
2275 /* When video standard changes, reset the hres and vres values -
2276 but if the user has pending changes there, then let the changes
2278 if (hdw->std_dirty) {
2279 /* Rewrite the vertical resolution to be appropriate to the
2280 video standard that has been selected. */
2282 if (hdw->std_mask_cur & V4L2_STD_525_60) {
2287 if (nvres != hdw->res_ver_val) {
2288 hdw->res_ver_val = nvres;
2289 hdw->res_ver_dirty = !0;
2293 if (hdw->std_dirty ||
2296 hdw->res_ver_dirty ||
2297 hdw->res_hor_dirty ||
2299 /* If any of this changes, then the encoder needs to be
2300 reconfigured, and we need to reset the stream. */
2301 stale_subsys_mask |= (1<<PVR2_SUBSYS_B_ENC_CFG);
2304 if (hdw->input_dirty) {
2305 /* pk: If input changes to or from radio, then the encoder
2306 needs to be restarted (for ENC_MUTE_VIDEO to work) */
2307 stale_subsys_mask |= (1<<PVR2_SUBSYS_B_ENC_RUN);
2311 if (hdw->srate_dirty) {
2312 /* Write new sample rate into control structure since
2313 * the master copy is stale. We must track srate
2314 * separate from the mpeg control structure because
2315 * other logic also uses this value. */
2316 struct v4l2_ext_controls cs;
2317 struct v4l2_ext_control c1;
2318 memset(&cs,0,sizeof(cs));
2319 memset(&c1,0,sizeof(c1));
2322 c1.id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ;
2323 c1.value = hdw->srate_val;
2324 cx2341x_ext_ctrls(&hdw->enc_ctl_state,&cs,VIDIOC_S_EXT_CTRLS);
2327 /* Scan i2c core at this point - before we clear all the dirty
2328 bits. Various parts of the i2c core will notice dirty bits as
2329 appropriate and arrange to broadcast or directly send updates to
2330 the client drivers in order to keep everything in sync */
2331 pvr2_i2c_core_check_stale(hdw);
2333 for (idx = 0; idx < hdw->control_cnt; idx++) {
2334 cptr = hdw->controls + idx;
2335 if (!cptr->info->clear_dirty) continue;
2336 cptr->info->clear_dirty(cptr);
2339 /* Now execute i2c core update */
2340 pvr2_i2c_core_sync(hdw);
2342 pvr2_hdw_subsys_bit_chg_no_lock(hdw,stale_subsys_mask,0);
2343 pvr2_hdw_subsys_bit_chg_no_lock(hdw,~0,saved_subsys_mask);
2349 int pvr2_hdw_commit_ctl(struct pvr2_hdw *hdw)
2351 LOCK_TAKE(hdw->big_lock); do {
2352 pvr2_hdw_commit_ctl_internal(hdw);
2353 } while (0); LOCK_GIVE(hdw->big_lock);
2358 void pvr2_hdw_poll(struct pvr2_hdw *hdw)
2360 LOCK_TAKE(hdw->big_lock); do {
2361 pvr2_i2c_core_sync(hdw);
2362 } while (0); LOCK_GIVE(hdw->big_lock);
2366 void pvr2_hdw_setup_poll_trigger(struct pvr2_hdw *hdw,
2367 void (*func)(void *),
2370 LOCK_TAKE(hdw->big_lock); do {
2371 hdw->poll_trigger_func = func;
2372 hdw->poll_trigger_data = data;
2373 } while (0); LOCK_GIVE(hdw->big_lock);
2377 void pvr2_hdw_poll_trigger_unlocked(struct pvr2_hdw *hdw)
2379 if (hdw->poll_trigger_func) {
2380 hdw->poll_trigger_func(hdw->poll_trigger_data);
2384 /* Return name for this driver instance */
2385 const char *pvr2_hdw_get_driver_name(struct pvr2_hdw *hdw)
2391 /* Return bit mask indicating signal status */
2392 static unsigned int pvr2_hdw_get_signal_status_internal(struct pvr2_hdw *hdw)
2394 unsigned int msk = 0;
2395 switch (hdw->input_val) {
2396 case PVR2_CVAL_INPUT_TV:
2397 case PVR2_CVAL_INPUT_RADIO:
2398 if (hdw->decoder_ctrl &&
2399 hdw->decoder_ctrl->tuned(hdw->decoder_ctrl->ctxt)) {
2400 msk |= PVR2_SIGNAL_OK;
2401 if (hdw->audio_stat &&
2402 hdw->audio_stat->status(hdw->audio_stat->ctxt)) {
2403 if (hdw->flag_stereo) {
2404 msk |= PVR2_SIGNAL_STEREO;
2406 if (hdw->flag_bilingual) {
2407 msk |= PVR2_SIGNAL_SAP;
2413 msk |= PVR2_SIGNAL_OK | PVR2_SIGNAL_STEREO;
2419 int pvr2_hdw_is_hsm(struct pvr2_hdw *hdw)
2422 LOCK_TAKE(hdw->ctl_lock); do {
2423 hdw->cmd_buffer[0] = 0x0b;
2424 result = pvr2_send_request(hdw,
2427 if (result < 0) break;
2428 result = (hdw->cmd_buffer[0] != 0);
2429 } while(0); LOCK_GIVE(hdw->ctl_lock);
2434 /* Return bit mask indicating signal status */
2435 unsigned int pvr2_hdw_get_signal_status(struct pvr2_hdw *hdw)
2437 unsigned int msk = 0;
2438 LOCK_TAKE(hdw->big_lock); do {
2439 msk = pvr2_hdw_get_signal_status_internal(hdw);
2440 } while (0); LOCK_GIVE(hdw->big_lock);
2445 /* Get handle to video output stream */
2446 struct pvr2_stream *pvr2_hdw_get_video_stream(struct pvr2_hdw *hp)
2448 return hp->vid_stream;
2452 void pvr2_hdw_trigger_module_log(struct pvr2_hdw *hdw)
2454 int nr = pvr2_hdw_get_unit_number(hdw);
2455 LOCK_TAKE(hdw->big_lock); do {
2456 hdw->log_requested = !0;
2457 printk(KERN_INFO "pvrusb2: ================= START STATUS CARD #%d =================\n", nr);
2458 pvr2_i2c_core_check_stale(hdw);
2459 hdw->log_requested = 0;
2460 pvr2_i2c_core_sync(hdw);
2461 pvr2_trace(PVR2_TRACE_INFO,"cx2341x config:");
2462 cx2341x_log_status(&hdw->enc_ctl_state, "pvrusb2");
2463 printk(KERN_INFO "pvrusb2: ================== END STATUS CARD #%d ==================\n", nr);
2464 } while (0); LOCK_GIVE(hdw->big_lock);
2467 void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *hdw, int enable_flag)
2472 LOCK_TAKE(hdw->big_lock); do {
2473 if ((hdw->fw_buffer == 0) == !enable_flag) break;
2476 pvr2_trace(PVR2_TRACE_FIRMWARE,
2477 "Cleaning up after CPU firmware fetch");
2478 kfree(hdw->fw_buffer);
2479 hdw->fw_buffer = NULL;
2481 /* Now release the CPU. It will disconnect and
2483 pvr2_hdw_cpureset_assert(hdw,0);
2487 pvr2_trace(PVR2_TRACE_FIRMWARE,
2488 "Preparing to suck out CPU firmware");
2489 hdw->fw_size = 0x2000;
2490 hdw->fw_buffer = kmalloc(hdw->fw_size,GFP_KERNEL);
2491 if (!hdw->fw_buffer) {
2496 memset(hdw->fw_buffer,0,hdw->fw_size);
2498 /* We have to hold the CPU during firmware upload. */
2499 pvr2_hdw_cpureset_assert(hdw,1);
2501 /* download the firmware from address 0000-1fff in 2048
2502 (=0x800) bytes chunk. */
2504 pvr2_trace(PVR2_TRACE_FIRMWARE,"Grabbing CPU firmware");
2505 pipe = usb_rcvctrlpipe(hdw->usb_dev, 0);
2506 for(address = 0; address < hdw->fw_size; address += 0x800) {
2507 ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0xc0,
2509 hdw->fw_buffer+address,0x800,HZ);
2513 pvr2_trace(PVR2_TRACE_FIRMWARE,"Done grabbing CPU firmware");
2515 } while (0); LOCK_GIVE(hdw->big_lock);
2519 /* Return true if we're in a mode for retrieval CPU firmware */
2520 int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw *hdw)
2522 return hdw->fw_buffer != 0;
2526 int pvr2_hdw_cpufw_get(struct pvr2_hdw *hdw,unsigned int offs,
2527 char *buf,unsigned int cnt)
2530 LOCK_TAKE(hdw->big_lock); do {
2534 if (!hdw->fw_buffer) {
2539 if (offs >= hdw->fw_size) {
2540 pvr2_trace(PVR2_TRACE_FIRMWARE,
2541 "Read firmware data offs=%d EOF",
2547 if (offs + cnt > hdw->fw_size) cnt = hdw->fw_size - offs;
2549 memcpy(buf,hdw->fw_buffer+offs,cnt);
2551 pvr2_trace(PVR2_TRACE_FIRMWARE,
2552 "Read firmware data offs=%d cnt=%d",
2555 } while (0); LOCK_GIVE(hdw->big_lock);
2561 int pvr2_hdw_v4l_get_minor_number(struct pvr2_hdw *hdw,
2562 enum pvr2_v4l_type index)
2565 case pvr2_v4l_type_video: return hdw->v4l_minor_number_video;
2566 case pvr2_v4l_type_vbi: return hdw->v4l_minor_number_vbi;
2567 case pvr2_v4l_type_radio: return hdw->v4l_minor_number_radio;
2573 /* Store a v4l minor device number */
2574 void pvr2_hdw_v4l_store_minor_number(struct pvr2_hdw *hdw,
2575 enum pvr2_v4l_type index,int v)
2578 case pvr2_v4l_type_video: hdw->v4l_minor_number_video = v;
2579 case pvr2_v4l_type_vbi: hdw->v4l_minor_number_vbi = v;
2580 case pvr2_v4l_type_radio: hdw->v4l_minor_number_radio = v;
2586 static void pvr2_ctl_write_complete(struct urb *urb)
2588 struct pvr2_hdw *hdw = urb->context;
2589 hdw->ctl_write_pend_flag = 0;
2590 if (hdw->ctl_read_pend_flag) return;
2591 complete(&hdw->ctl_done);
2595 static void pvr2_ctl_read_complete(struct urb *urb)
2597 struct pvr2_hdw *hdw = urb->context;
2598 hdw->ctl_read_pend_flag = 0;
2599 if (hdw->ctl_write_pend_flag) return;
2600 complete(&hdw->ctl_done);
2604 static void pvr2_ctl_timeout(unsigned long data)
2606 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
2607 if (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) {
2608 hdw->ctl_timeout_flag = !0;
2609 if (hdw->ctl_write_pend_flag)
2610 usb_unlink_urb(hdw->ctl_write_urb);
2611 if (hdw->ctl_read_pend_flag)
2612 usb_unlink_urb(hdw->ctl_read_urb);
2617 /* Issue a command and get a response from the device. This extended
2618 version includes a probe flag (which if set means that device errors
2619 should not be logged or treated as fatal) and a timeout in jiffies.
2620 This can be used to non-lethally probe the health of endpoint 1. */
2621 static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
2622 unsigned int timeout,int probe_fl,
2623 void *write_data,unsigned int write_len,
2624 void *read_data,unsigned int read_len)
2628 struct timer_list timer;
2629 if (!hdw->ctl_lock_held) {
2630 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2631 "Attempted to execute control transfer"
2635 if ((!hdw->flag_ok) && !probe_fl) {
2636 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2637 "Attempted to execute control transfer"
2638 " when device not ok");
2641 if (!(hdw->ctl_read_urb && hdw->ctl_write_urb)) {
2643 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2644 "Attempted to execute control transfer"
2645 " when USB is disconnected");
2650 /* Ensure that we have sane parameters */
2651 if (!write_data) write_len = 0;
2652 if (!read_data) read_len = 0;
2653 if (write_len > PVR2_CTL_BUFFSIZE) {
2655 PVR2_TRACE_ERROR_LEGS,
2656 "Attempted to execute %d byte"
2657 " control-write transfer (limit=%d)",
2658 write_len,PVR2_CTL_BUFFSIZE);
2661 if (read_len > PVR2_CTL_BUFFSIZE) {
2663 PVR2_TRACE_ERROR_LEGS,
2664 "Attempted to execute %d byte"
2665 " control-read transfer (limit=%d)",
2666 write_len,PVR2_CTL_BUFFSIZE);
2669 if ((!write_len) && (!read_len)) {
2671 PVR2_TRACE_ERROR_LEGS,
2672 "Attempted to execute null control transfer?");
2677 hdw->cmd_debug_state = 1;
2679 hdw->cmd_debug_code = ((unsigned char *)write_data)[0];
2681 hdw->cmd_debug_code = 0;
2683 hdw->cmd_debug_write_len = write_len;
2684 hdw->cmd_debug_read_len = read_len;
2686 /* Initialize common stuff */
2687 init_completion(&hdw->ctl_done);
2688 hdw->ctl_timeout_flag = 0;
2689 hdw->ctl_write_pend_flag = 0;
2690 hdw->ctl_read_pend_flag = 0;
2692 timer.expires = jiffies + timeout;
2693 timer.data = (unsigned long)hdw;
2694 timer.function = pvr2_ctl_timeout;
2697 hdw->cmd_debug_state = 2;
2698 /* Transfer write data to internal buffer */
2699 for (idx = 0; idx < write_len; idx++) {
2700 hdw->ctl_write_buffer[idx] =
2701 ((unsigned char *)write_data)[idx];
2703 /* Initiate a write request */
2704 usb_fill_bulk_urb(hdw->ctl_write_urb,
2706 usb_sndbulkpipe(hdw->usb_dev,
2707 PVR2_CTL_WRITE_ENDPOINT),
2708 hdw->ctl_write_buffer,
2710 pvr2_ctl_write_complete,
2712 hdw->ctl_write_urb->actual_length = 0;
2713 hdw->ctl_write_pend_flag = !0;
2714 status = usb_submit_urb(hdw->ctl_write_urb,GFP_KERNEL);
2716 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2717 "Failed to submit write-control"
2718 " URB status=%d",status);
2719 hdw->ctl_write_pend_flag = 0;
2725 hdw->cmd_debug_state = 3;
2726 memset(hdw->ctl_read_buffer,0x43,read_len);
2727 /* Initiate a read request */
2728 usb_fill_bulk_urb(hdw->ctl_read_urb,
2730 usb_rcvbulkpipe(hdw->usb_dev,
2731 PVR2_CTL_READ_ENDPOINT),
2732 hdw->ctl_read_buffer,
2734 pvr2_ctl_read_complete,
2736 hdw->ctl_read_urb->actual_length = 0;
2737 hdw->ctl_read_pend_flag = !0;
2738 status = usb_submit_urb(hdw->ctl_read_urb,GFP_KERNEL);
2740 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2741 "Failed to submit read-control"
2742 " URB status=%d",status);
2743 hdw->ctl_read_pend_flag = 0;
2751 /* Now wait for all I/O to complete */
2752 hdw->cmd_debug_state = 4;
2753 while (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) {
2754 wait_for_completion(&hdw->ctl_done);
2756 hdw->cmd_debug_state = 5;
2759 del_timer_sync(&timer);
2761 hdw->cmd_debug_state = 6;
2764 if (hdw->ctl_timeout_flag) {
2765 status = -ETIMEDOUT;
2767 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2768 "Timed out control-write");
2774 /* Validate results of write request */
2775 if ((hdw->ctl_write_urb->status != 0) &&
2776 (hdw->ctl_write_urb->status != -ENOENT) &&
2777 (hdw->ctl_write_urb->status != -ESHUTDOWN) &&
2778 (hdw->ctl_write_urb->status != -ECONNRESET)) {
2779 /* USB subsystem is reporting some kind of failure
2781 status = hdw->ctl_write_urb->status;
2783 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2784 "control-write URB failure,"
2790 if (hdw->ctl_write_urb->actual_length < write_len) {
2791 /* Failed to write enough data */
2794 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2795 "control-write URB short,"
2796 " expected=%d got=%d",
2798 hdw->ctl_write_urb->actual_length);
2804 /* Validate results of read request */
2805 if ((hdw->ctl_read_urb->status != 0) &&
2806 (hdw->ctl_read_urb->status != -ENOENT) &&
2807 (hdw->ctl_read_urb->status != -ESHUTDOWN) &&
2808 (hdw->ctl_read_urb->status != -ECONNRESET)) {
2809 /* USB subsystem is reporting some kind of failure
2811 status = hdw->ctl_read_urb->status;
2813 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2814 "control-read URB failure,"
2820 if (hdw->ctl_read_urb->actual_length < read_len) {
2821 /* Failed to read enough data */
2824 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2825 "control-read URB short,"
2826 " expected=%d got=%d",
2828 hdw->ctl_read_urb->actual_length);
2832 /* Transfer retrieved data out from internal buffer */
2833 for (idx = 0; idx < read_len; idx++) {
2834 ((unsigned char *)read_data)[idx] =
2835 hdw->ctl_read_buffer[idx];
2841 hdw->cmd_debug_state = 0;
2842 if ((status < 0) && (!probe_fl)) {
2843 pvr2_hdw_render_useless_unlocked(hdw);
2849 int pvr2_send_request(struct pvr2_hdw *hdw,
2850 void *write_data,unsigned int write_len,
2851 void *read_data,unsigned int read_len)
2853 return pvr2_send_request_ex(hdw,HZ*4,0,
2854 write_data,write_len,
2855 read_data,read_len);
2858 int pvr2_write_register(struct pvr2_hdw *hdw, u16 reg, u32 data)
2862 LOCK_TAKE(hdw->ctl_lock);
2864 hdw->cmd_buffer[0] = 0x04; /* write register prefix */
2865 PVR2_DECOMPOSE_LE(hdw->cmd_buffer,1,data);
2866 hdw->cmd_buffer[5] = 0;
2867 hdw->cmd_buffer[6] = (reg >> 8) & 0xff;
2868 hdw->cmd_buffer[7] = reg & 0xff;
2871 ret = pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 0);
2873 LOCK_GIVE(hdw->ctl_lock);
2879 static int pvr2_read_register(struct pvr2_hdw *hdw, u16 reg, u32 *data)
2883 LOCK_TAKE(hdw->ctl_lock);
2885 hdw->cmd_buffer[0] = 0x05; /* read register prefix */
2886 hdw->cmd_buffer[1] = 0;
2887 hdw->cmd_buffer[2] = 0;
2888 hdw->cmd_buffer[3] = 0;
2889 hdw->cmd_buffer[4] = 0;
2890 hdw->cmd_buffer[5] = 0;
2891 hdw->cmd_buffer[6] = (reg >> 8) & 0xff;
2892 hdw->cmd_buffer[7] = reg & 0xff;
2894 ret |= pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 4);
2895 *data = PVR2_COMPOSE_LE(hdw->cmd_buffer,0);
2897 LOCK_GIVE(hdw->ctl_lock);
2903 static int pvr2_write_u16(struct pvr2_hdw *hdw, u16 data, int res)
2907 LOCK_TAKE(hdw->ctl_lock);
2909 hdw->cmd_buffer[0] = (data >> 8) & 0xff;
2910 hdw->cmd_buffer[1] = data & 0xff;
2912 ret = pvr2_send_request(hdw, hdw->cmd_buffer, 2, hdw->cmd_buffer, res);
2914 LOCK_GIVE(hdw->ctl_lock);
2920 static int pvr2_write_u8(struct pvr2_hdw *hdw, u8 data, int res)
2924 LOCK_TAKE(hdw->ctl_lock);
2926 hdw->cmd_buffer[0] = data;
2928 ret = pvr2_send_request(hdw, hdw->cmd_buffer, 1, hdw->cmd_buffer, res);
2930 LOCK_GIVE(hdw->ctl_lock);
2936 static void pvr2_hdw_render_useless_unlocked(struct pvr2_hdw *hdw)
2938 if (!hdw->flag_ok) return;
2939 pvr2_trace(PVR2_TRACE_INIT,"render_useless");
2941 if (hdw->vid_stream) {
2942 pvr2_stream_setup(hdw->vid_stream,NULL,0,0);
2944 hdw->flag_streaming_enabled = 0;
2945 hdw->subsys_enabled_mask = 0;
2949 void pvr2_hdw_render_useless(struct pvr2_hdw *hdw)
2951 LOCK_TAKE(hdw->ctl_lock);
2952 pvr2_hdw_render_useless_unlocked(hdw);
2953 LOCK_GIVE(hdw->ctl_lock);
2957 void pvr2_hdw_device_reset(struct pvr2_hdw *hdw)
2960 pvr2_trace(PVR2_TRACE_INIT,"Performing a device reset...");
2961 ret = usb_lock_device_for_reset(hdw->usb_dev,NULL);
2963 ret = usb_reset_device(hdw->usb_dev);
2964 usb_unlock_device(hdw->usb_dev);
2966 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2967 "Failed to lock USB device ret=%d",ret);
2969 if (init_pause_msec) {
2970 pvr2_trace(PVR2_TRACE_INFO,
2971 "Waiting %u msec for hardware to settle",
2973 msleep(init_pause_msec);
2979 void pvr2_hdw_cpureset_assert(struct pvr2_hdw *hdw,int val)
2985 if (!hdw->usb_dev) return;
2987 pvr2_trace(PVR2_TRACE_INIT,"cpureset_assert(%d)",val);
2989 da[0] = val ? 0x01 : 0x00;
2991 /* Write the CPUCS register on the 8051. The lsb of the register
2992 is the reset bit; a 1 asserts reset while a 0 clears it. */
2993 pipe = usb_sndctrlpipe(hdw->usb_dev, 0);
2994 ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0x40,0xe600,0,da,1,HZ);
2996 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2997 "cpureset_assert(%d) error=%d",val,ret);
2998 pvr2_hdw_render_useless(hdw);
3003 int pvr2_hdw_cmd_deep_reset(struct pvr2_hdw *hdw)
3006 LOCK_TAKE(hdw->ctl_lock); do {
3007 pvr2_trace(PVR2_TRACE_INIT,"Requesting uproc hard reset");
3009 hdw->cmd_buffer[0] = 0xdd;
3010 status = pvr2_send_request(hdw,hdw->cmd_buffer,1,NULL,0);
3011 } while (0); LOCK_GIVE(hdw->ctl_lock);
3016 int pvr2_hdw_cmd_powerup(struct pvr2_hdw *hdw)
3019 LOCK_TAKE(hdw->ctl_lock); do {
3020 pvr2_trace(PVR2_TRACE_INIT,"Requesting powerup");
3021 hdw->cmd_buffer[0] = 0xde;
3022 status = pvr2_send_request(hdw,hdw->cmd_buffer,1,NULL,0);
3023 } while (0); LOCK_GIVE(hdw->ctl_lock);
3028 int pvr2_hdw_cmd_decoder_reset(struct pvr2_hdw *hdw)
3030 if (!hdw->decoder_ctrl) {
3031 pvr2_trace(PVR2_TRACE_INIT,
3032 "Unable to reset decoder: nothing attached");
3036 if (!hdw->decoder_ctrl->force_reset) {
3037 pvr2_trace(PVR2_TRACE_INIT,
3038 "Unable to reset decoder: not implemented");
3042 pvr2_trace(PVR2_TRACE_INIT,
3043 "Requesting decoder reset");
3044 hdw->decoder_ctrl->force_reset(hdw->decoder_ctrl->ctxt);
3049 /* Stop / start video stream transport */
3050 static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl)
3053 LOCK_TAKE(hdw->ctl_lock); do {
3054 hdw->cmd_buffer[0] = (runFl ? 0x36 : 0x37);
3055 status = pvr2_send_request(hdw,hdw->cmd_buffer,1,NULL,0);
3056 } while (0); LOCK_GIVE(hdw->ctl_lock);
3058 hdw->subsys_enabled_mask =
3059 ((hdw->subsys_enabled_mask &
3060 ~(1<<PVR2_SUBSYS_B_USBSTREAM_RUN)) |
3061 (runFl ? (1<<PVR2_SUBSYS_B_USBSTREAM_RUN) : 0));
3067 void pvr2_hdw_get_debug_info(const struct pvr2_hdw *hdw,
3068 struct pvr2_hdw_debug_info *ptr)
3070 ptr->big_lock_held = hdw->big_lock_held;
3071 ptr->ctl_lock_held = hdw->ctl_lock_held;
3072 ptr->flag_ok = hdw->flag_ok;
3073 ptr->flag_disconnected = hdw->flag_disconnected;
3074 ptr->flag_init_ok = hdw->flag_init_ok;
3075 ptr->flag_streaming_enabled = hdw->flag_streaming_enabled;
3076 ptr->subsys_flags = hdw->subsys_enabled_mask;
3077 ptr->cmd_debug_state = hdw->cmd_debug_state;
3078 ptr->cmd_code = hdw->cmd_debug_code;
3079 ptr->cmd_debug_write_len = hdw->cmd_debug_write_len;
3080 ptr->cmd_debug_read_len = hdw->cmd_debug_read_len;
3081 ptr->cmd_debug_timeout = hdw->ctl_timeout_flag;
3082 ptr->cmd_debug_write_pend = hdw->ctl_write_pend_flag;
3083 ptr->cmd_debug_read_pend = hdw->ctl_read_pend_flag;
3084 ptr->cmd_debug_rstatus = hdw->ctl_read_urb->status;
3085 ptr->cmd_debug_wstatus = hdw->ctl_read_urb->status;
3089 int pvr2_hdw_gpio_get_dir(struct pvr2_hdw *hdw,u32 *dp)
3091 return pvr2_read_register(hdw,PVR2_GPIO_DIR,dp);
3095 int pvr2_hdw_gpio_get_out(struct pvr2_hdw *hdw,u32 *dp)
3097 return pvr2_read_register(hdw,PVR2_GPIO_OUT,dp);
3101 int pvr2_hdw_gpio_get_in(struct pvr2_hdw *hdw,u32 *dp)
3103 return pvr2_read_register(hdw,PVR2_GPIO_IN,dp);
3107 int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val)
3112 ret = pvr2_read_register(hdw,PVR2_GPIO_DIR,&cval);
3113 if (ret) return ret;
3114 nval = (cval & ~msk) | (val & msk);
3115 pvr2_trace(PVR2_TRACE_GPIO,
3116 "GPIO direction changing 0x%x:0x%x"
3117 " from 0x%x to 0x%x",
3121 pvr2_trace(PVR2_TRACE_GPIO,
3122 "GPIO direction changing to 0x%x",nval);
3124 return pvr2_write_register(hdw,PVR2_GPIO_DIR,nval);
3128 int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val)
3133 ret = pvr2_read_register(hdw,PVR2_GPIO_OUT,&cval);
3134 if (ret) return ret;
3135 nval = (cval & ~msk) | (val & msk);
3136 pvr2_trace(PVR2_TRACE_GPIO,
3137 "GPIO output changing 0x%x:0x%x from 0x%x to 0x%x",
3141 pvr2_trace(PVR2_TRACE_GPIO,
3142 "GPIO output changing to 0x%x",nval);
3144 return pvr2_write_register(hdw,PVR2_GPIO_OUT,nval);
3148 /* Find I2C address of eeprom */
3149 static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw)
3152 LOCK_TAKE(hdw->ctl_lock); do {
3153 hdw->cmd_buffer[0] = 0xeb;
3154 result = pvr2_send_request(hdw,
3157 if (result < 0) break;
3158 result = hdw->cmd_buffer[0];
3159 } while(0); LOCK_GIVE(hdw->ctl_lock);
3164 int pvr2_hdw_register_access(struct pvr2_hdw *hdw,
3165 u32 chip_id,unsigned long reg_id,
3166 int setFl,u32 *val_ptr)
3168 #ifdef CONFIG_VIDEO_ADV_DEBUG
3169 struct list_head *item;
3170 struct pvr2_i2c_client *cp;
3171 struct v4l2_register req;
3175 req.i2c_id = chip_id;
3177 if (setFl) req.val = *val_ptr;
3178 mutex_lock(&hdw->i2c_list_lock); do {
3179 list_for_each(item,&hdw->i2c_clients) {
3180 cp = list_entry(item,struct pvr2_i2c_client,list);
3181 if (cp->client->driver->id != chip_id) continue;
3182 stat = pvr2_i2c_client_cmd(
3183 cp,(setFl ? VIDIOC_INT_S_REGISTER :
3184 VIDIOC_INT_G_REGISTER),&req);
3185 if (!setFl) *val_ptr = req.val;
3189 } while (0); mutex_unlock(&hdw->i2c_list_lock);
3201 Stuff for Emacs to see, in order to encourage consistent editing style:
3202 *** Local Variables: ***
3204 *** fill-column: 75 ***
3205 *** tab-width: 8 ***
3206 *** c-basic-offset: 8 ***