1 /******************************************************************************
4 * Guest OS interface to x86 32-bit Xen.
6 * Copyright (c) 2004, K A Fraser
9 #ifndef __ASM_X86_XEN_INTERFACE_32_H
10 #define __ASM_X86_XEN_INTERFACE_32_H
14 * These flat segments are in the Xen-private section of every GDT. Since these
15 * are also present in the initial GDT, many OSes will be able to avoid
16 * installing their own GDT.
18 #define FLAT_RING1_CS 0xe019 /* GDT index 259 */
19 #define FLAT_RING1_DS 0xe021 /* GDT index 260 */
20 #define FLAT_RING1_SS 0xe021 /* GDT index 260 */
21 #define FLAT_RING3_CS 0xe02b /* GDT index 261 */
22 #define FLAT_RING3_DS 0xe033 /* GDT index 262 */
23 #define FLAT_RING3_SS 0xe033 /* GDT index 262 */
25 #define FLAT_KERNEL_CS FLAT_RING1_CS
26 #define FLAT_KERNEL_DS FLAT_RING1_DS
27 #define FLAT_KERNEL_SS FLAT_RING1_SS
28 #define FLAT_USER_CS FLAT_RING3_CS
29 #define FLAT_USER_DS FLAT_RING3_DS
30 #define FLAT_USER_SS FLAT_RING3_SS
32 /* And the trap vector is... */
33 #define TRAP_INSTR "int $0x82"
36 * Virtual addresses beyond this are not modifiable by guest OSes. The
37 * machine->physical mapping table starts at this address, read-only.
39 #define __HYPERVISOR_VIRT_START 0xF5800000
43 struct cpu_user_regs {
51 uint16_t error_code; /* private */
52 uint16_t entry_vector; /* private */
55 uint8_t saved_upcall_mask;
57 uint32_t eflags; /* eflags.IF == !saved_upcall_mask */
65 DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
67 typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
69 struct arch_vcpu_info {
71 unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */
78 typedef struct xen_callback xen_callback_t;
80 #define XEN_CALLBACK(__cs, __eip) \
81 ((struct xen_callback){ .cs = (__cs), .eip = (unsigned long)(__eip) })
82 #endif /* !__ASSEMBLY__ */
86 * Page-directory addresses above 4GB do not fit into architectural %cr3.
87 * When accessing %cr3, or equivalent field in vcpu_guest_context, guests
88 * must use the following accessor macros to pack/unpack valid MFNs.
90 * Note that Xen is using the fact that the pagetable base is always
91 * page-aligned, and putting the 12 MSB of the address into the 12 LSB
94 #define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20))
95 #define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20))
97 #endif /* __ASM_X86_XEN_INTERFACE_32_H */