2 * This file contains miscellaneous low-level functions.
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
15 #include <linux/config.h>
16 #include <linux/sys.h>
17 #include <asm/unistd.h>
18 #include <asm/errno.h>
19 #include <asm/processor.h>
21 #include <asm/cache.h>
22 #include <asm/cputable.h>
24 #include <asm/ppc_asm.h>
25 #include <asm/thread_info.h>
26 #include <asm/asm-offsets.h>
29 #define ISYNC_8xx isync
44 * Returns (address we're running at) - (address we were linked at)
45 * for use before the text and data are mapped to KERNELBASE.
58 * add_reloc_offset(x) returns x + reloc_offset().
60 _GLOBAL(add_reloc_offset)
72 * sub_reloc_offset(x) returns x - reloc_offset().
74 _GLOBAL(sub_reloc_offset)
86 * reloc_got2 runs through the .got2 section adding an offset
91 lis r7,__got2_start@ha
92 addi r7,r7,__got2_start@l
94 addi r8,r8,__got2_end@l
115 * called with r3 = data offset and r4 = CPU number
118 _GLOBAL(identify_cpu)
119 addis r8,r3,cpu_specs@ha
120 addi r8,r8,cpu_specs@l
123 lwz r5,CPU_SPEC_PVR_MASK(r8)
125 lwz r6,CPU_SPEC_PVR_VALUE(r8)
128 addi r8,r8,CPU_SPEC_ENTRY_SIZE
131 addis r6,r3,cur_cpu_spec@ha
132 addi r6,r6,cur_cpu_spec@l
138 * do_cpu_ftr_fixups - goes through the list of CPU feature fixups
139 * and writes nop's over sections of code that don't apply for this cpu.
140 * r3 = data offset (not changed)
142 _GLOBAL(do_cpu_ftr_fixups)
143 /* Get CPU 0 features */
144 addis r6,r3,cur_cpu_spec@ha
145 addi r6,r6,cur_cpu_spec@l
148 lwz r4,CPU_SPEC_FEATURES(r4)
150 /* Get the fixup table */
151 addis r6,r3,__start___ftr_fixup@ha
152 addi r6,r6,__start___ftr_fixup@l
153 addis r7,r3,__stop___ftr_fixup@ha
154 addi r7,r7,__stop___ftr_fixup@l
160 lwz r8,-16(r6) /* mask */
162 lwz r9,-12(r6) /* value */
165 lwz r8,-8(r6) /* section begin */
166 lwz r9,-4(r6) /* section end */
169 /* write nops over the section of code */
170 /* todo: if large section, add a branch at the start of it */
174 lis r0,0x60000000@h /* nop */
176 andi. r10,r4,CPU_FTR_SPLIT_ID_CACHE@l
178 dcbst 0,r8 /* suboptimal, but simpler */
183 sync /* additional sync needed on g4 */
188 * call_setup_cpu - call the setup_cpu function for this cpu
189 * r3 = data offset, r24 = cpu number
191 * Setup function is called with:
193 * r4 = ptr to CPU spec (relocated)
195 _GLOBAL(call_setup_cpu)
196 addis r4,r3,cur_cpu_spec@ha
197 addi r4,r4,cur_cpu_spec@l
200 lwz r5,CPU_SPEC_SETUP(r4)
207 #if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx)
209 /* This gets called by via-pmu.c to switch the PLL selection
210 * on 750fx CPU. This function should really be moved to some
211 * other place (as most of the cpufreq code in via-pmu
213 _GLOBAL(low_choose_750fx_pll)
219 /* If switching to PLL1, disable HID0:BTIC */
230 /* Calc new HID1 value */
231 mfspr r4,SPRN_HID1 /* Build a HID1:PS bit from parameter */
232 rlwinm r5,r3,16,15,15 /* Clear out HID1:PS from value read */
233 rlwinm r4,r4,0,16,14 /* Could have I used rlwimi here ? */
237 /* Store new HID1 image */
241 addis r6,r6,nap_save_hid1@ha
242 stw r4,nap_save_hid1@l(r6)
244 /* If switching to PLL0, enable HID0:BTIC */
259 _GLOBAL(low_choose_7447a_dfs)
265 /* Calc new HID1 value */
267 insrwi r4,r3,1,9 /* insert parameter into bit 9 */
277 #endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */
280 * complement mask on the msr then "or" some values on.
281 * _nmask_and_or_msr(nmask, value_to_or)
283 _GLOBAL(_nmask_and_or_msr)
284 mfmsr r0 /* Get current msr */
285 andc r0,r0,r3 /* And off the bits set in r3 (first parm) */
286 or r0,r0,r4 /* Or on the bits in r4 (second parm) */
287 SYNC /* Some chip revs have problems here... */
288 mtmsr r0 /* Update machine state */
297 #if defined(CONFIG_40x)
298 sync /* Flush to memory before changing mapping */
300 isync /* Flush shadow TLB */
301 #elif defined(CONFIG_44x)
305 /* Load high watermark */
306 lis r4,tlb_44x_hwater@ha
307 lwz r5,tlb_44x_hwater@l(r4)
309 1: tlbwe r3,r3,PPC44x_TLB_PAGEID
315 #elif defined(CONFIG_FSL_BOOKE)
316 /* Invalidate all entries in TLB0 */
319 /* Invalidate all entries in TLB1 */
322 /* Invalidate all entries in TLB2 */
325 /* Invalidate all entries in TLB3 */
331 #endif /* CONFIG_SMP */
332 #else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
333 #if defined(CONFIG_SMP)
339 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
340 rlwinm r0,r0,0,28,26 /* clear DR */
344 lis r9,mmu_hash_lock@h
345 ori r9,r9,mmu_hash_lock@l
357 stw r0,0(r9) /* clear mmu_hash_lock */
361 #else /* CONFIG_SMP */
365 #endif /* CONFIG_SMP */
366 #endif /* ! defined(CONFIG_40x) */
370 * Flush MMU TLB for a particular address
373 #if defined(CONFIG_40x)
377 /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is clear.
378 * Since 25 is the V bit in the TLB_TAG, loading this value will invalidate
380 tlbwe r3, r3, TLB_TAG
383 #elif defined(CONFIG_44x)
385 mfspr r5,SPRN_PID /* Get PID */
386 rlwimi r4,r5,0,24,31 /* Set TID */
392 /* There are only 64 TLB entries, so r3 < 64,
393 * which means bit 22, is clear. Since 22 is
394 * the V bit in the TLB_PAGEID, loading this
395 * value will invalidate the TLB entry.
397 tlbwe r3, r3, PPC44x_TLB_PAGEID
400 #elif defined(CONFIG_FSL_BOOKE)
401 rlwinm r4, r3, 0, 0, 19
402 ori r5, r4, 0x08 /* TLBSEL = 1 */
403 ori r6, r4, 0x10 /* TLBSEL = 2 */
404 ori r7, r4, 0x18 /* TLBSEL = 3 */
410 #if defined(CONFIG_SMP)
412 #endif /* CONFIG_SMP */
413 #else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
414 #if defined(CONFIG_SMP)
420 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
421 rlwinm r0,r0,0,28,26 /* clear DR */
425 lis r9,mmu_hash_lock@h
426 ori r9,r9,mmu_hash_lock@l
438 stw r0,0(r9) /* clear mmu_hash_lock */
442 #else /* CONFIG_SMP */
445 #endif /* CONFIG_SMP */
446 #endif /* ! CONFIG_40x */
450 * Flush instruction cache.
451 * This is a no-op on the 601.
453 _GLOBAL(flush_instruction_cache)
454 #if defined(CONFIG_8xx)
457 mtspr SPRN_IC_CST, r5
458 #elif defined(CONFIG_4xx)
470 #elif CONFIG_FSL_BOOKE
473 ori r3,r3,L1CSR0_CFI|L1CSR0_CLFC
474 /* msync; isync recommended here */
478 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
480 ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
484 rlwinm r3,r3,16,16,31
486 beqlr /* for 601, do nothing */
487 /* 603/604 processor - use invalidate-all bit in HID0 */
491 #endif /* CONFIG_8xx/4xx */
496 * Write any modified data cache blocks out to memory
497 * and invalidate the corresponding instruction cache blocks.
498 * This is a no-op on the 601.
500 * flush_icache_range(unsigned long start, unsigned long stop)
502 _GLOBAL(flush_icache_range)
504 blr /* for 601, do nothing */
505 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
506 li r5,L1_CACHE_BYTES-1
510 srwi. r4,r4,L1_CACHE_SHIFT
515 addi r3,r3,L1_CACHE_BYTES
517 sync /* wait for dcbst's to get to ram */
520 addi r6,r6,L1_CACHE_BYTES
522 sync /* additional sync needed on g4 */
526 * Write any modified data cache blocks out to memory.
527 * Does not invalidate the corresponding cache lines (especially for
528 * any corresponding instruction cache).
530 * clean_dcache_range(unsigned long start, unsigned long stop)
532 _GLOBAL(clean_dcache_range)
533 li r5,L1_CACHE_BYTES-1
537 srwi. r4,r4,L1_CACHE_SHIFT
542 addi r3,r3,L1_CACHE_BYTES
544 sync /* wait for dcbst's to get to ram */
548 * Write any modified data cache blocks out to memory and invalidate them.
549 * Does not invalidate the corresponding instruction cache blocks.
551 * flush_dcache_range(unsigned long start, unsigned long stop)
553 _GLOBAL(flush_dcache_range)
554 li r5,L1_CACHE_BYTES-1
558 srwi. r4,r4,L1_CACHE_SHIFT
563 addi r3,r3,L1_CACHE_BYTES
565 sync /* wait for dcbst's to get to ram */
569 * Like above, but invalidate the D-cache. This is used by the 8xx
570 * to invalidate the cache so the PPC core doesn't get stale data
571 * from the CPM (no cache snooping here :-).
573 * invalidate_dcache_range(unsigned long start, unsigned long stop)
575 _GLOBAL(invalidate_dcache_range)
576 li r5,L1_CACHE_BYTES-1
580 srwi. r4,r4,L1_CACHE_SHIFT
585 addi r3,r3,L1_CACHE_BYTES
587 sync /* wait for dcbi's to get to ram */
590 #ifdef CONFIG_NOT_COHERENT_CACHE
592 * 40x cores have 8K or 16K dcache and 32 byte line size.
593 * 44x has a 32K dcache and 32 byte line size.
594 * 8xx has 1, 2, 4, 8K variants.
595 * For now, cover the worst case of the 44x.
596 * Must be called with external interrupts disabled.
598 #define CACHE_NWAYS 64
599 #define CACHE_NLINES 16
601 _GLOBAL(flush_dcache_all)
602 li r4, (2 * CACHE_NWAYS * CACHE_NLINES)
605 1: lwz r3, 0(r5) /* Load one word from every line */
606 addi r5, r5, L1_CACHE_BYTES
609 #endif /* CONFIG_NOT_COHERENT_CACHE */
612 * Flush a particular page from the data cache to RAM.
613 * Note: this is necessary because the instruction cache does *not*
614 * snoop from the data cache.
615 * This is a no-op on the 601 which has a unified cache.
617 * void __flush_dcache_icache(void *page)
619 _GLOBAL(__flush_dcache_icache)
621 blr /* for 601, do nothing */
622 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
623 rlwinm r3,r3,0,0,19 /* Get page base address */
624 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
627 0: dcbst 0,r3 /* Write line to ram */
628 addi r3,r3,L1_CACHE_BYTES
633 addi r6,r6,L1_CACHE_BYTES
640 * Flush a particular page from the data cache to RAM, identified
641 * by its physical address. We turn off the MMU so we can just use
642 * the physical address (this may be a highmem page without a kernel
645 * void __flush_dcache_icache_phys(unsigned long physaddr)
647 _GLOBAL(__flush_dcache_icache_phys)
649 blr /* for 601, do nothing */
650 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
652 rlwinm r0,r10,0,28,26 /* clear DR */
655 rlwinm r3,r3,0,0,19 /* Get page base address */
656 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
659 0: dcbst 0,r3 /* Write line to ram */
660 addi r3,r3,L1_CACHE_BYTES
665 addi r6,r6,L1_CACHE_BYTES
668 mtmsr r10 /* restore DR */
673 * Clear pages using the dcbz instruction, which doesn't cause any
674 * memory traffic (except to write out any cache lines which get
675 * displaced). This only works on cacheable memory.
677 * void clear_pages(void *page, int order) ;
680 li r0,4096/L1_CACHE_BYTES
692 addi r3,r3,L1_CACHE_BYTES
697 * Copy a whole page. We use the dcbz instruction on the destination
698 * to reduce memory traffic (it eliminates the unnecessary reads of
699 * the destination into cache). This requires that the destination
702 #define COPY_16_BYTES \
717 /* don't use prefetch on 8xx */
718 li r0,4096/L1_CACHE_BYTES
724 #else /* not 8xx, we can prefetch */
727 #if MAX_COPY_PREFETCH > 1
728 li r0,MAX_COPY_PREFETCH
732 addi r11,r11,L1_CACHE_BYTES
734 #else /* MAX_COPY_PREFETCH == 1 */
736 li r11,L1_CACHE_BYTES+4
737 #endif /* MAX_COPY_PREFETCH */
738 li r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH
746 #if L1_CACHE_BYTES >= 32
748 #if L1_CACHE_BYTES >= 64
751 #if L1_CACHE_BYTES >= 128
761 crnot 4*cr0+eq,4*cr0+eq
762 li r0,MAX_COPY_PREFETCH
765 #endif /* CONFIG_8xx */
768 * void atomic_clear_mask(atomic_t mask, atomic_t *addr)
769 * void atomic_set_mask(atomic_t mask, atomic_t *addr);
771 _GLOBAL(atomic_clear_mask)
778 _GLOBAL(atomic_set_mask)
787 * I/O string operations
789 * insb(port, buf, len)
790 * outsb(port, buf, len)
791 * insw(port, buf, len)
792 * outsw(port, buf, len)
793 * insl(port, buf, len)
794 * outsl(port, buf, len)
795 * insw_ns(port, buf, len)
796 * outsw_ns(port, buf, len)
797 * insl_ns(port, buf, len)
798 * outsl_ns(port, buf, len)
800 * The *_ns versions don't do byte-swapping.
814 .section __ex_table, "a"
835 .section __ex_table, "a"
856 .section __ex_table, "a"
877 .section __ex_table, "a"
898 .section __ex_table, "a"
919 .section __ex_table, "a"
928 _GLOBAL(__ide_mm_insw)
941 .section __ex_table, "a"
950 _GLOBAL(__ide_mm_outsw)
963 .section __ex_table, "a"
972 _GLOBAL(__ide_mm_insl)
985 .section __ex_table, "a"
994 _GLOBAL(__ide_mm_outsl)
1004 .section .fixup,"ax"
1007 .section __ex_table, "a"
1017 * Extended precision shifts.
1019 * Updated to be valid for shift counts from 0 to 63 inclusive.
1022 * R3/R4 has 64 bit value
1023 * R5 has shift count
1026 * ashrdi3: arithmetic right shift (sign propagation)
1027 * lshrdi3: logical right shift
1028 * ashldi3: left shift
1032 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
1033 addi r7,r5,32 # could be xori, or addi with -32
1034 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
1035 rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
1036 sraw r7,r3,r7 # t2 = MSW >> (count-32)
1037 or r4,r4,r6 # LSW |= t1
1038 slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
1039 sraw r3,r3,r5 # MSW = MSW >> count
1040 or r4,r4,r7 # LSW |= t2
1045 slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
1046 addi r7,r5,32 # could be xori, or addi with -32
1047 srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count)
1048 slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
1049 or r3,r3,r6 # MSW |= t1
1050 slw r4,r4,r5 # LSW = LSW << count
1051 or r3,r3,r7 # MSW |= t2
1056 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
1057 addi r7,r5,32 # could be xori, or addi with -32
1058 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
1059 srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32)
1060 or r4,r4,r6 # LSW |= t1
1061 srw r3,r3,r5 # MSW = MSW >> count
1062 or r4,r4,r7 # LSW |= t2
1072 mr r3,r1 /* Close enough */
1076 * Create a kernel thread
1077 * kernel_thread(fn, arg, flags)
1079 _GLOBAL(kernel_thread)
1083 mr r30,r3 /* function */
1084 mr r31,r4 /* argument */
1085 ori r3,r5,CLONE_VM /* flags */
1086 oris r3,r3,CLONE_UNTRACED>>16
1087 li r4,0 /* new sp (unused) */
1090 cmpwi 0,r3,0 /* parent or child? */
1091 bne 1f /* return if parent */
1092 li r0,0 /* make top-level stack frame */
1094 mtlr r30 /* fn addr in lr */
1095 mr r3,r31 /* load arg and call fn */
1098 li r0,__NR_exit /* exit if function returns */
1107 * This routine is just here to keep GCC happy - sigh...
1112 #define SYSCALL(name) \
1114 li r0,__NR_##name; \
1118 stw r3,errno@l(r4); \
1124 /* Why isn't this a) automatic, b) written in 'C'? */
1127 _GLOBAL(sys_call_table)
1128 .long sys_restart_syscall /* 0 */
1133 .long sys_open /* 5 */
1138 .long sys_unlink /* 10 */
1143 .long sys_chmod /* 15 */
1145 .long sys_ni_syscall /* old break syscall holder */
1148 .long sys_getpid /* 20 */
1153 .long sys_stime /* 25 */
1158 .long sys_utime /* 30 */
1159 .long sys_ni_syscall /* old stty syscall holder */
1160 .long sys_ni_syscall /* old gtty syscall holder */
1163 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
1168 .long sys_rmdir /* 40 */
1172 .long sys_ni_syscall /* old prof syscall holder */
1173 .long sys_brk /* 45 */
1178 .long sys_getegid /* 50 */
1180 .long sys_umount /* recycled never used phys() */
1181 .long sys_ni_syscall /* old lock syscall holder */
1183 .long sys_fcntl /* 55 */
1184 .long sys_ni_syscall /* old mpx syscall holder */
1186 .long sys_ni_syscall /* old ulimit syscall holder */
1188 .long sys_umask /* 60 */
1193 .long sys_getpgrp /* 65 */
1198 .long sys_setreuid /* 70 */
1200 .long ppc_sigsuspend
1201 .long sys_sigpending
1202 .long sys_sethostname
1203 .long sys_setrlimit /* 75 */
1204 .long sys_old_getrlimit
1206 .long sys_gettimeofday
1207 .long sys_settimeofday
1208 .long sys_getgroups /* 80 */
1213 .long sys_readlink /* 85 */
1218 .long sys_mmap /* 90 */
1223 .long sys_fchown /* 95 */
1224 .long sys_getpriority
1225 .long sys_setpriority
1226 .long sys_ni_syscall /* old profil syscall holder */
1228 .long sys_fstatfs /* 100 */
1229 .long sys_ni_syscall
1230 .long sys_socketcall
1233 .long sys_getitimer /* 105 */
1238 .long sys_ni_syscall /* 110 */
1240 .long sys_ni_syscall /* old 'idle' syscall */
1241 .long sys_ni_syscall
1243 .long sys_swapoff /* 115 */
1248 .long ppc_clone /* 120 */
1249 .long sys_setdomainname
1251 .long sys_ni_syscall
1253 .long sys_mprotect /* 125 */
1254 .long sys_sigprocmask
1255 .long sys_ni_syscall /* old sys_create_module */
1256 .long sys_init_module
1257 .long sys_delete_module
1258 .long sys_ni_syscall /* old sys_get_kernel_syms */ /* 130 */
1263 .long sys_sysfs /* 135 */
1264 .long sys_personality
1265 .long sys_ni_syscall /* for afs_syscall */
1268 .long sys_llseek /* 140 */
1273 .long sys_readv /* 145 */
1278 .long sys_mlock /* 150 */
1281 .long sys_munlockall
1282 .long sys_sched_setparam
1283 .long sys_sched_getparam /* 155 */
1284 .long sys_sched_setscheduler
1285 .long sys_sched_getscheduler
1286 .long sys_sched_yield
1287 .long sys_sched_get_priority_max
1288 .long sys_sched_get_priority_min /* 160 */
1289 .long sys_sched_rr_get_interval
1293 .long sys_getresuid /* 165 */
1294 .long sys_ni_syscall /* old sys_query_module */
1296 .long sys_nfsservctl
1298 .long sys_getresgid /* 170 */
1300 .long sys_rt_sigreturn
1301 .long sys_rt_sigaction
1302 .long sys_rt_sigprocmask
1303 .long sys_rt_sigpending /* 175 */
1304 .long sys_rt_sigtimedwait
1305 .long sys_rt_sigqueueinfo
1306 .long ppc_rt_sigsuspend
1308 .long sys_pwrite64 /* 180 */
1313 .long sys_sigaltstack /* 185 */
1315 .long sys_ni_syscall /* streams1 */
1316 .long sys_ni_syscall /* streams2 */
1318 .long sys_getrlimit /* 190 */
1321 .long sys_truncate64
1322 .long sys_ftruncate64
1323 .long sys_stat64 /* 195 */
1326 .long sys_pciconfig_read
1327 .long sys_pciconfig_write
1328 .long sys_pciconfig_iobase /* 200 */
1329 .long sys_ni_syscall /* 201 - reserved - MacOnLinux - new */
1330 .long sys_getdents64
1331 .long sys_pivot_root
1333 .long sys_madvise /* 205 */
1338 .long sys_lsetxattr /* 210 */
1343 .long sys_listxattr /* 215 */
1344 .long sys_llistxattr
1345 .long sys_flistxattr
1346 .long sys_removexattr
1347 .long sys_lremovexattr
1348 .long sys_fremovexattr /* 220 */
1350 .long sys_sched_setaffinity
1351 .long sys_sched_getaffinity
1352 .long sys_ni_syscall
1353 .long sys_ni_syscall /* 225 - reserved for Tux */
1354 .long sys_sendfile64
1356 .long sys_io_destroy
1357 .long sys_io_getevents
1358 .long sys_io_submit /* 230 */
1360 .long sys_set_tid_address
1362 .long sys_exit_group
1363 .long sys_lookup_dcookie /* 235 */
1364 .long sys_epoll_create
1366 .long sys_epoll_wait
1367 .long sys_remap_file_pages
1368 .long sys_timer_create /* 240 */
1369 .long sys_timer_settime
1370 .long sys_timer_gettime
1371 .long sys_timer_getoverrun
1372 .long sys_timer_delete
1373 .long sys_clock_settime /* 245 */
1374 .long sys_clock_gettime
1375 .long sys_clock_getres
1376 .long sys_clock_nanosleep
1377 .long ppc_swapcontext
1378 .long sys_tgkill /* 250 */
1382 .long ppc_fadvise64_64
1383 .long sys_ni_syscall /* 255 - rtas (used on ppc64) */
1384 .long sys_debug_setcontext
1385 .long sys_ni_syscall /* 257 reserved for vserver */
1386 .long sys_ni_syscall /* 258 reserved for new sys_remap_file_pages */
1387 .long sys_ni_syscall /* 259 reserved for new sys_mbind */
1388 .long sys_ni_syscall /* 260 reserved for new sys_get_mempolicy */
1389 .long sys_ni_syscall /* 261 reserved for new sys_set_mempolicy */
1392 .long sys_mq_timedsend
1393 .long sys_mq_timedreceive /* 265 */
1395 .long sys_mq_getsetattr
1396 .long sys_kexec_load
1398 .long sys_request_key /* 270 */
1401 .long sys_ioprio_set
1402 .long sys_ioprio_get
1403 .long sys_inotify_init /* 275 */
1404 .long sys_inotify_add_watch
1405 .long sys_inotify_rm_watch