2 * Copyright (C) 1995 Linus Torvalds
3 * Adapted from 'alpha' version by Gary Thomas
4 * Modified by Cort Dougan (cort@cs.nmt.edu)
6 * Support for PReP (Motorola MTX/MVME)
7 * by Troy Benjegerdes (hozer@drgw.net)
11 * bootup setup stuff..
14 #include <linux/config.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
21 #include <linux/stddef.h>
22 #include <linux/unistd.h>
23 #include <linux/ptrace.h>
24 #include <linux/slab.h>
25 #include <linux/user.h>
26 #include <linux/a.out.h>
27 #include <linux/tty.h>
28 #include <linux/major.h>
29 #include <linux/interrupt.h>
30 #include <linux/reboot.h>
31 #include <linux/init.h>
32 #include <linux/initrd.h>
33 #include <linux/ioport.h>
34 #include <linux/console.h>
35 #include <linux/timex.h>
36 #include <linux/pci.h>
37 #include <linux/ide.h>
38 #include <linux/seq_file.h>
39 #include <linux/root_dev.h>
41 #include <asm/sections.h>
43 #include <asm/processor.h>
44 #include <asm/residual.h>
46 #include <asm/pgtable.h>
47 #include <asm/cache.h>
49 #include <asm/machdep.h>
50 #include <asm/mc146818rtc.h>
51 #include <asm/mk48t59.h>
52 #include <asm/prep_nvram.h>
53 #include <asm/raven.h>
56 #include <asm/mpc10x.h>
57 #include <asm/i8259.h>
58 #include <asm/open_pic.h>
59 #include <asm/pci-bridge.h>
62 /* prep registers for L2 */
63 #define CACHECRBA 0x80000823 /* Cache configuration register address */
64 #define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
65 #define L2CACHE_512KB 0x00 /* 512KB */
66 #define L2CACHE_256KB 0x01 /* 256KB */
67 #define L2CACHE_1MB 0x02 /* 1MB */
68 #define L2CACHE_NONE 0x03 /* NONE */
69 #define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */
73 unsigned char ucBoardRev;
74 unsigned char ucBoardRevMaj, ucBoardRevMin;
76 extern unsigned char prep_nvram_read_val(int addr);
77 extern void prep_nvram_write_val(int addr,
79 extern unsigned char rs_nvram_read_val(int addr);
80 extern void rs_nvram_write_val(int addr,
82 extern void ibm_prep_init(void);
84 extern void prep_find_bridges(void);
88 extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
89 extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
90 extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
91 extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
92 extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
95 #define cached_21 (((char *)(ppc_cached_irq_mask))[3])
96 #define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
98 #ifdef CONFIG_SOUND_CS4232
99 long ppc_cs4232_dma, ppc_cs4232_dma2;
102 extern PTE *Hash, *Hash_end;
103 extern unsigned long Hash_size, Hash_mask;
104 extern int probingmem;
105 extern unsigned long loops_per_jiffy;
107 #ifdef CONFIG_SOUND_CS4232
108 EXPORT_SYMBOL(ppc_cs4232_dma);
109 EXPORT_SYMBOL(ppc_cs4232_dma2);
112 /* useful ISA ports */
113 #define PREP_SYSCTL 0x81c
114 /* present in the IBM reference design; possibly identical in Mot boxes: */
115 #define PREP_IBM_SIMM_ID 0x803 /* SIMM size: 32 or 8 MiB */
116 #define PREP_IBM_SIMM_PRESENCE 0x804
117 #define PREP_IBM_EQUIPMENT 0x80c
118 #define PREP_IBM_L2INFO 0x80d
119 #define PREP_IBM_PM1 0x82a /* power management register 1 */
120 #define PREP_IBM_PLANAR 0x852 /* planar ID - identifies the motherboard */
121 #define PREP_IBM_DISP 0x8c0 /* 4-digit LED display */
123 /* Equipment Present Register masks: */
124 #define PREP_IBM_EQUIPMENT_RESERVED 0x80
125 #define PREP_IBM_EQUIPMENT_SCSIFUSE 0x40
126 #define PREP_IBM_EQUIPMENT_L2_COPYBACK 0x08
127 #define PREP_IBM_EQUIPMENT_L2_256 0x04
128 #define PREP_IBM_EQUIPMENT_CPU 0x02
129 #define PREP_IBM_EQUIPMENT_L2 0x01
131 /* planar ID values: */
132 /* Sandalfoot/Sandalbow (6015/7020) */
133 #define PREP_IBM_SANDALFOOT 0xfc
134 /* Woodfield, Thinkpad 850/860 (6042/7249) */
135 #define PREP_IBM_THINKPAD 0xff /* planar ID unimplemented */
136 /* PowerSeries 830/850 (6050/6070) */
137 #define PREP_IBM_CAROLINA_IDE_0 0xf0
138 #define PREP_IBM_CAROLINA_IDE_1 0xf1
139 #define PREP_IBM_CAROLINA_IDE_2 0xf2
140 #define PREP_IBM_CAROLINA_IDE_3 0xf3
142 #define PREP_IBM_CAROLINA_SCSI_0 0xf4
143 #define PREP_IBM_CAROLINA_SCSI_1 0xf5
144 #define PREP_IBM_CAROLINA_SCSI_2 0xf6
145 #define PREP_IBM_CAROLINA_SCSI_3 0xf7 /* missing from Carolina Tech Spec */
146 /* Tiger1 (7043-140) */
147 #define PREP_IBM_TIGER1_133 0xd1
148 #define PREP_IBM_TIGER1_166 0xd2
149 #define PREP_IBM_TIGER1_180 0xd3
150 #define PREP_IBM_TIGER1_xxx 0xd4 /* unknown, but probably exists */
151 #define PREP_IBM_TIGER1_333 0xd5 /* missing from Tiger Tech Spec */
154 * set Motherboard_map_name, Motherboard_map, Motherboard_routes.
155 * return 8259 edge/level masks.
157 void (*setup_ibm_pci)(char *irq_lo, char *irq_hi);
159 extern char *Motherboard_map_name; /* for use in *_cpuinfo */
162 * As found in the PReP reference implementation.
163 * Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP.
166 prep_gen_enable_l2(void)
168 outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL);
171 /* Used by Carolina and Tiger1 */
173 prep_carolina_enable_l2(void)
175 outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL);
178 /* cpuinfo code common to all IBM PReP */
180 prep_ibm_cpuinfo(struct seq_file *m)
182 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
184 seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
186 seq_printf(m, "upgrade cpu\t: ");
187 if (equip_reg & PREP_IBM_EQUIPMENT_CPU) {
188 seq_printf(m, "not ");
190 seq_printf(m, "present\n");
192 /* print info about the SCSI fuse */
193 seq_printf(m, "scsi fuse\t: ");
194 if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE)
197 seq_printf(m, "bad");
200 /* print info about SIMMs */
201 if (have_residual_data) {
203 seq_printf(m, "simms\t\t: ");
204 for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
205 if (res->Memories[i].SIMMSize != 0)
206 seq_printf(m, "%d:%ldMiB ", i,
207 (res->Memories[i].SIMMSize > 1024) ?
208 res->Memories[i].SIMMSize>>20 :
209 res->Memories[i].SIMMSize);
216 prep_gen_cpuinfo(struct seq_file *m)
223 prep_sandalfoot_cpuinfo(struct seq_file *m)
225 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
229 /* report amount and type of L2 cache present */
230 seq_printf(m, "L2 cache\t: ");
231 if (equip_reg & PREP_IBM_EQUIPMENT_L2) {
232 seq_printf(m, "not present");
234 if (equip_reg & PREP_IBM_EQUIPMENT_L2_256)
235 seq_printf(m, "256KiB");
237 seq_printf(m, "unknown size");
239 if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK)
240 seq_printf(m, ", copy-back");
242 seq_printf(m, ", write-through");
250 prep_thinkpad_cpuinfo(struct seq_file *m)
252 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
253 char *cpubus_speed, *pci_speed;
257 /* report amount and type of L2 cache present */
258 seq_printf(m, "l2 cache\t: ");
259 if ((equip_reg & 0x1) == 0) {
260 switch ((equip_reg & 0xc) >> 2) {
262 seq_printf(m, "128KiB look-aside 2-way write-through\n");
265 seq_printf(m, "512KiB look-aside direct-mapped write-back\n");
268 seq_printf(m, "256KiB look-aside 2-way write-through\n");
271 seq_printf(m, "256KiB look-aside direct-mapped write-back\n");
275 seq_printf(m, "not present\n");
278 /* report bus speeds because we can */
279 if ((equip_reg & 0x80) == 0) {
280 switch ((equip_reg & 0x30) >> 4) {
290 cpubus_speed = "unknown";
291 pci_speed = "unknown";
295 switch ((equip_reg & 0x30) >> 4) {
309 cpubus_speed = "unknown";
310 pci_speed = "unknown";
314 seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed);
315 seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed);
321 prep_carolina_cpuinfo(struct seq_file *m)
323 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
327 /* report amount and type of L2 cache present */
328 seq_printf(m, "l2 cache\t: ");
329 if ((equip_reg & 0x1) == 0) {
330 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
333 if ((l2_reg & 0x60) == 0)
334 seq_printf(m, "256KiB");
335 else if ((l2_reg & 0x60) == 0x20)
336 seq_printf(m, "512KiB");
338 seq_printf(m, "unknown size");
341 if ((l2_reg & 0x3) == 0)
342 seq_printf(m, ", async");
343 else if ((l2_reg & 0x3) == 1)
344 seq_printf(m, ", sync");
346 seq_printf(m, ", unknown type");
350 seq_printf(m, "not present\n");
357 prep_tiger1_cpuinfo(struct seq_file *m)
359 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
363 /* report amount and type of L2 cache present */
364 seq_printf(m, "l2 cache\t: ");
365 if ((l2_reg & 0xf) == 0xf) {
366 seq_printf(m, "not present\n");
369 seq_printf(m, "async, ");
371 seq_printf(m, "sync burst, ");
374 seq_printf(m, "parity, ");
376 seq_printf(m, "no parity, ");
378 switch (l2_reg & 0x3) {
380 seq_printf(m, "256KiB\n");
383 seq_printf(m, "512KiB\n");
386 seq_printf(m, "1MiB\n");
389 seq_printf(m, "unknown size\n");
398 /* Used by all Motorola PReP */
400 prep_mot_cpuinfo(struct seq_file *m)
402 unsigned int cachew = *((unsigned char *)CACHECRBA);
404 seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
406 /* report amount and type of L2 cache present */
407 seq_printf(m, "l2 cache\t: ");
408 switch (cachew & L2CACHE_MASK) {
410 seq_printf(m, "512KiB");
413 seq_printf(m, "256KiB");
416 seq_printf(m, "1MiB");
419 seq_printf(m, "none\n");
423 seq_printf(m, "%x\n", cachew);
426 seq_printf(m, ", parity %s",
427 (cachew & L2CACHE_PARITY)? "enabled" : "disabled");
429 seq_printf(m, " SRAM:");
431 switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) {
432 case 1: seq_printf(m, "synchronous, parity, flow-through\n");
434 case 2: seq_printf(m, "asynchronous, no parity\n");
436 case 3: seq_printf(m, "asynchronous, parity\n");
438 default:seq_printf(m, "synchronous, pipelined, no parity\n");
443 /* print info about SIMMs */
444 if (have_residual_data) {
446 seq_printf(m, "simms\t\t: ");
447 for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
448 if (res->Memories[i].SIMMSize != 0)
449 seq_printf(m, "%d:%ldM ", i,
450 (res->Memories[i].SIMMSize > 1024) ?
451 res->Memories[i].SIMMSize>>20 :
452 res->Memories[i].SIMMSize);
461 prep_restart(char *cmd)
463 #define PREP_SP92 0x92 /* Special Port 92 */
464 local_irq_disable(); /* no interrupts */
466 /* set exception prefix high - to the prom */
467 _nmask_and_or_msr(0, MSR_IP);
469 /* make sure bit 0 (reset) is a 0 */
470 outb( inb(PREP_SP92) & ~1L , PREP_SP92);
471 /* signal a reset to system control port A - soft reset */
472 outb( inb(PREP_SP92) | 1 , PREP_SP92);
482 local_irq_disable(); /* no interrupts */
484 /* set exception prefix high - to the prom */
485 _nmask_and_or_msr(0, MSR_IP);
491 /* Carrera is the power manager in the Thinkpads. Unfortunately not much is
492 * known about it, so we can't power down.
495 prep_carrera_poweroff(void)
501 * On most IBM PReP's, power management is handled by a Signetics 87c750
502 * behind the Utah component on the ISA bus. To access the 750 you must write
503 * a series of nibbles to port 0x82a (decoded by the Utah). This is described
504 * somewhat in the IBM Carolina Technical Specification.
508 utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
511 * byte1: 0 0 0 1 0 d a5 a4
512 * byte2: 0 0 0 1 a3 a2 a1 a0
514 * d = the bit's value, enabled or disabled
515 * (a5 a4 a3) = the byte number, minus 20
516 * (a2 a1 a0) = the bit number
518 * example: set the 5th bit of byte 21 (21.5)
519 * a5 a4 a3 = 001 (byte 1)
520 * a2 a1 a0 = 101 (bit 5)
522 * byte1 = 0001 0100 (0x14)
523 * byte2 = 0001 1101 (0x1d)
525 unsigned char byte1=0x10, byte2=0x10;
527 /* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */
530 byte1 |= (!!value) << 2; /* set d */
531 byte1 |= (bytenum >> 1) & 0x3; /* set a5, a4 */
533 byte2 |= (bytenum & 0x1) << 3; /* set a3 */
534 byte2 |= bitnum & 0x7; /* set a2, a1, a0 */
536 outb(byte1, PREP_IBM_PM1); /* first nibble */
538 udelay(100); /* important: let controller recover */
540 outb(byte2, PREP_IBM_PM1); /* second nibble */
542 udelay(100); /* important: let controller recover */
546 prep_sig750_poweroff(void)
548 /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
551 /* set exception prefix high - to the prom */
552 _nmask_and_or_msr(0, MSR_IP);
554 utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */
561 prep_show_percpuinfo(struct seq_file *m, int i)
563 /* PREP's without residual data will give incorrect values here */
564 seq_printf(m, "clock\t\t: ");
565 if (have_residual_data)
566 seq_printf(m, "%ldMHz\n",
567 (res->VitalProductData.ProcessorHz > 1024) ?
568 res->VitalProductData.ProcessorHz / 1000000 :
569 res->VitalProductData.ProcessorHz);
571 seq_printf(m, "???\n");
576 #ifdef CONFIG_SOUND_CS4232
577 static long __init masktoint(unsigned int i)
586 * ppc_cs4232_dma and ppc_cs4232_dma2 are used in include/asm/dma.h
587 * to distinguish sound dma-channels from others. This is because
588 * blocksize on 16 bit dma-channels 5,6,7 is 128k, but
589 * the cs4232.c uses 64k like on 8 bit dma-channels 0,1,2,3
592 static void __init prep_init_sound(void)
594 PPC_DEVICE *audiodevice = NULL;
597 * Get the needed resource informations from residual data.
600 if (have_residual_data)
601 audiodevice = residual_find_device(~0, NULL,
602 MultimediaController, AudioController, -1, 0);
604 if (audiodevice != NULL) {
607 pkt = PnP_find_packet((unsigned char *)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
610 ppc_cs4232_dma = masktoint(pkt->S5_Pack.DMAMask);
611 pkt = PnP_find_packet((unsigned char*)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
614 ppc_cs4232_dma2 = masktoint(pkt->S5_Pack.DMAMask);
618 * These are the PReP specs' defaults for the cs4231. We use these
619 * as fallback incase we don't have residual data.
620 * At least the IBM Thinkpad 850 with IDE DMA Channels at 6 and 7
621 * will use the other values.
623 if (audiodevice == NULL) {
624 switch (_prep_type) {
627 ppc_cs4232_dma2 = -1;
636 * Find a way to push these informations to the cs4232 driver
637 * Give it out with printk, when not in cmd_line?
638 * Append it to cmd_line and saved_command_line?
639 * Format is cs4232=io,irq,dma,dma2
642 #endif /* CONFIG_SOUND_CS4232 */
645 * Fill out screen_info according to the residual data. This allows us to use
651 #if (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \
652 defined(CONFIG_FB_VESA))
653 PPC_DEVICE *vgadev = NULL;
655 if (have_residual_data)
656 vgadev = residual_find_device(~0, NULL, DisplayController,
657 SVGAController, -1, 0);
659 if (vgadev != NULL) {
662 pkt = PnP_find_large_vendor_packet(
663 (unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset],
664 0x04, 0); /* 0x04 = Display Tag */
666 unsigned char *ptr = (unsigned char *)pkt;
670 screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
672 screen_info.lfb_depth = ptr[4] * 8;
674 screen_info.lfb_width = swab16(*(short *)(ptr+6));
675 screen_info.lfb_height = swab16(*(short *)(ptr+8));
676 screen_info.lfb_linelength = swab16(*(short *)(ptr+10));
678 screen_info.lfb_base = swab32(*(long *)(ptr+12));
679 screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536;
687 * Set DBAT 2 to access 0x80000000 so early progress messages will work
689 static __inline__ void
692 /* wait for all outstanding memory access to complete */
696 mtspr(SPRN_DBAT2U, 0x80001ffe);
697 mtspr(SPRN_DBAT2L, 0x8000002a);
699 /* wait for updates */
704 * IBM 3-digit status LED
706 static unsigned int ibm_statusled_base;
709 ibm_statusled_progress(char *s, unsigned short hex);
712 ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
715 ibm_statusled_progress(NULL, 0x505); /* SOS */
719 static struct notifier_block ibm_statusled_block = {
722 INT_MAX /* try to do it first */
726 ibm_statusled_progress(char *s, unsigned short hex)
728 static int notifier_installed;
730 * Progress uses 4 digits and we have only 3. So, we map 0xffff to
731 * 0xfff for display switch off. Out of range values are mapped to
732 * 0xeff, as I'm told 0xf00 and above are reserved for hardware codes.
733 * Install the panic notifier when the display is first switched off.
737 if (!notifier_installed) {
738 ++notifier_installed;
739 atomic_notifier_chain_register(&panic_notifier_list,
740 &ibm_statusled_block);
748 outw(hex, ibm_statusled_base);
752 ibm_statusled_init(void)
755 * The IBM 3-digit LED display is specified in the residual data
756 * as an operator panel device, type "System Status LED". Find
757 * that device and determine its address. We validate all the
758 * other parameters on the off-chance another, similar device
761 if (have_residual_data) {
765 led = residual_find_device(~0, NULL, SystemPeripheral,
766 OperatorPanel, SystemStatusLED, 0);
770 pkt = PnP_find_packet((unsigned char *)
771 &res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0);
775 if (pkt->S8_Pack.IOInfo != ISAAddr16bit)
777 if (*(unsigned short *)pkt->S8_Pack.RangeMin !=
778 *(unsigned short *)pkt->S8_Pack.RangeMax)
780 if (pkt->S8_Pack.IOAlign != 2)
782 if (pkt->S8_Pack.IONum != 2)
785 ibm_statusled_base = ld_le16((unsigned short *)
786 (pkt->S8_Pack.RangeMin));
787 ppc_md.progress = ibm_statusled_progress;
792 prep_setup_arch(void)
797 /* init to some ~sane value until calibrate_delay() runs */
798 loops_per_jiffy = 50000000;
800 /* Lookup PCI host bridges */
803 /* Set up floppy in PS/2 mode */
804 outb(0x09, SIO_CONFIG_RA);
805 reg = inb(SIO_CONFIG_RD);
806 reg = (reg & 0x3F) | 0x40;
807 outb(reg, SIO_CONFIG_RD);
808 outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
810 switch ( _prep_type )
813 reg = inb(PREP_IBM_PLANAR);
814 printk(KERN_INFO "IBM planar ID: %02x", reg);
816 case PREP_IBM_SANDALFOOT:
817 prep_gen_enable_l2();
818 setup_ibm_pci = prep_sandalfoot_setup_pci;
819 ppc_md.power_off = prep_sig750_poweroff;
820 ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo;
822 case PREP_IBM_THINKPAD:
823 prep_gen_enable_l2();
824 setup_ibm_pci = prep_thinkpad_setup_pci;
825 ppc_md.power_off = prep_carrera_poweroff;
826 ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo;
829 if (have_residual_data) {
830 prep_gen_enable_l2();
831 setup_ibm_pci = prep_residual_setup_pci;
832 ppc_md.power_off = prep_halt;
833 ppc_md.show_cpuinfo = prep_gen_cpuinfo;
837 printk(" - unknown! Assuming Carolina");
839 case PREP_IBM_CAROLINA_IDE_0:
840 case PREP_IBM_CAROLINA_IDE_1:
841 case PREP_IBM_CAROLINA_IDE_2:
842 case PREP_IBM_CAROLINA_IDE_3:
844 case PREP_IBM_CAROLINA_SCSI_0:
845 case PREP_IBM_CAROLINA_SCSI_1:
846 case PREP_IBM_CAROLINA_SCSI_2:
847 case PREP_IBM_CAROLINA_SCSI_3:
848 prep_carolina_enable_l2();
849 setup_ibm_pci = prep_carolina_setup_pci;
850 ppc_md.power_off = prep_sig750_poweroff;
851 ppc_md.show_cpuinfo = prep_carolina_cpuinfo;
853 case PREP_IBM_TIGER1_133:
854 case PREP_IBM_TIGER1_166:
855 case PREP_IBM_TIGER1_180:
856 case PREP_IBM_TIGER1_xxx:
857 case PREP_IBM_TIGER1_333:
858 prep_carolina_enable_l2();
859 setup_ibm_pci = prep_tiger1_setup_pci;
860 ppc_md.power_off = prep_sig750_poweroff;
861 ppc_md.show_cpuinfo = prep_tiger1_cpuinfo;
866 /* default root device */
868 ROOT_DEV = MKDEV(IDE0_MAJOR, 3);
870 ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3);
874 prep_gen_enable_l2();
875 ppc_md.power_off = prep_halt;
876 ppc_md.show_cpuinfo = prep_mot_cpuinfo;
878 #ifdef CONFIG_BLK_DEV_INITRD
880 ROOT_DEV = Root_RAM0;
883 #ifdef CONFIG_ROOT_NFS
886 ROOT_DEV = Root_SDA2;
891 /* Read in NVRAM data */
894 /* if no bootargs, look in NVRAM */
895 if ( cmd_line[0] == '\0' ) {
897 bootargs = prep_nvram_get_var("bootargs");
898 if (bootargs != NULL) {
899 strcpy(cmd_line, bootargs);
901 strcpy(saved_command_line, cmd_line);
905 #ifdef CONFIG_SOUND_CS4232
907 #endif /* CONFIG_SOUND_CS4232 */
911 switch (_prep_type) {
920 #ifdef CONFIG_VGA_CONSOLE
921 /* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */
922 vgacon_remap_base = 0xf0000000;
923 conswitchp = &vga_con;
928 * First, see if we can get this information from the residual data.
929 * This is important on some IBM PReP systems. If we cannot, we let the
930 * TODC code handle doing this.
933 prep_calibrate_decr(void)
935 if (have_residual_data) {
936 unsigned long freq, divisor = 4;
938 if ( res->VitalProductData.ProcessorBusHz ) {
939 freq = res->VitalProductData.ProcessorBusHz;
940 printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
941 (freq/divisor)/1000000,
942 (freq/divisor)%1000000);
943 tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
944 tb_ticks_per_jiffy = freq / HZ / divisor;
948 todc_calibrate_decr();
954 unsigned int pci_viddid, pci_did;
956 if (OpenPIC_Addr != NULL) {
957 openpic_init(NUM_8259_INTERRUPTS);
958 /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
959 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
963 if (have_residual_data) {
964 i8259_init(residual_isapic_addr(), 0);
968 /* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory
969 * controller, we poll (as they have a different int-ack address). */
970 early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid);
971 pci_did = (pci_viddid & 0xffff0000) >> 16;
972 if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
973 && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
974 || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
977 /* PCI interrupt ack address given in section 6.1.8 of the
978 * PReP specification. */
979 i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0);
982 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
987 prep_ide_default_irq(unsigned long base)
990 case 0x1f0: return 13;
991 case 0x170: return 13;
992 case 0x1e8: return 11;
993 case 0x168: return 10;
994 case 0xfff0: return 14; /* MCP(N)750 ide0 */
995 case 0xffe0: return 15; /* MCP(N)750 ide1 */
1000 static unsigned long
1001 prep_ide_default_io_base(int index)
1004 case 0: return 0x1f0;
1005 case 1: return 0x170;
1006 case 2: return 0x1e8;
1007 case 3: return 0x168;
1015 /* PReP (MTX) support */
1017 smp_prep_probe(void)
1019 extern int mot_multi;
1022 openpic_request_IPIs();
1023 smp_hw_index[1] = 1;
1031 smp_prep_kick_cpu(int nr)
1033 *(unsigned long *)KERNELBASE = nr;
1034 asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
1035 printk("CPU1 released, waiting\n");
1039 smp_prep_setup_cpu(int cpu_nr)
1042 do_openpic_setup_cpu();
1045 static struct smp_ops_t prep_smp_ops = {
1046 smp_openpic_message_pass,
1050 .give_timebase = smp_generic_give_timebase,
1051 .take_timebase = smp_generic_take_timebase,
1053 #endif /* CONFIG_SMP */
1056 * Setup the bat mappings we're going to load that cover
1057 * the io areas. RAM was mapped by mapin_ram().
1063 io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO);
1064 io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO);
1068 prep_request_io(void)
1071 request_region(PREP_NVRAM_AS0, 0x8, "nvram");
1073 request_region(0x00,0x20,"dma1");
1074 request_region(0x40,0x20,"timer");
1075 request_region(0x80,0x10,"dma page reg");
1076 request_region(0xc0,0x20,"dma2");
1081 device_initcall(prep_request_io);
1084 prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
1085 unsigned long r6, unsigned long r7)
1087 #ifdef CONFIG_PREP_RESIDUAL
1088 /* make a copy of residual data */
1090 memcpy((void *)res,(void *)(r3+KERNELBASE),
1095 isa_io_base = PREP_ISA_IO_BASE;
1096 isa_mem_base = PREP_ISA_MEM_BASE;
1097 pci_dram_offset = PREP_PCI_DRAM_OFFSET;
1098 ISA_DMA_THRESHOLD = 0x00ffffff;
1099 DMA_MODE_READ = 0x44;
1100 DMA_MODE_WRITE = 0x48;
1101 ppc_do_canonicalize_irqs = 1;
1103 /* figure out what kind of prep workstation we are */
1104 if (have_residual_data) {
1105 if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
1106 _prep_type = _PREP_IBM;
1108 _prep_type = _PREP_Motorola;
1111 /* assume motorola if no residual (netboot?) */
1112 _prep_type = _PREP_Motorola;
1115 #ifdef CONFIG_PREP_RESIDUAL
1116 /* Switch off all residual data processing if the user requests it */
1117 if (strstr(cmd_line, "noresidual") != NULL)
1121 /* Initialise progress early to get maximum benefit */
1123 ibm_statusled_init();
1125 ppc_md.setup_arch = prep_setup_arch;
1126 ppc_md.show_percpuinfo = prep_show_percpuinfo;
1127 ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */
1128 ppc_md.init_IRQ = prep_init_IRQ;
1129 /* this gets changed later on if we have an OpenPIC -- Cort */
1130 ppc_md.get_irq = i8259_irq;
1132 ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
1134 ppc_md.restart = prep_restart;
1135 ppc_md.power_off = NULL; /* set in prep_setup_arch() */
1136 ppc_md.halt = prep_halt;
1138 ppc_md.nvram_read_val = prep_nvram_read_val;
1139 ppc_md.nvram_write_val = prep_nvram_write_val;
1141 ppc_md.time_init = todc_time_init;
1142 if (_prep_type == _PREP_IBM) {
1143 ppc_md.rtc_read_val = todc_mc146818_read_val;
1144 ppc_md.rtc_write_val = todc_mc146818_write_val;
1145 TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1),
1148 TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
1149 PREP_NVRAM_DATA, 8);
1152 ppc_md.calibrate_decr = prep_calibrate_decr;
1153 ppc_md.set_rtc_time = todc_set_rtc_time;
1154 ppc_md.get_rtc_time = todc_get_rtc_time;
1156 ppc_md.setup_io_mappings = prep_map_io;
1158 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
1159 ppc_ide_md.default_irq = prep_ide_default_irq;
1160 ppc_ide_md.default_io_base = prep_ide_default_io_base;
1164 smp_ops = &prep_smp_ops;
1165 #endif /* CONFIG_SMP */