2 * file: include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
8 * blackfin serial driver head file
14 * bugs: enter bugs at http://blackfin.uclinux.org/
16 * this program is free software; you can redistribute it and/or modify
17 * it under the terms of the gnu general public license as published by
18 * the free software foundation; either version 2, or (at your option)
21 * this program is distributed in the hope that it will be useful,
22 * but without any warranty; without even the implied warranty of
23 * merchantability or fitness for a particular purpose. see the
24 * gnu general public license for more details.
26 * you should have received a copy of the gnu general public license
27 * along with this program; see the file copying.
28 * if not, write to the free software foundation,
29 * 59 temple place - suite 330, boston, ma 02111-1307, usa.
32 #include <linux/serial.h>
34 #include <asm/portmux.h>
36 #define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
37 #define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
38 #define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
39 #define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
40 #define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
41 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
42 #define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
44 #define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v)
45 #define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v)
46 #define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v)
47 #define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v)
48 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
49 #define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v)
51 #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
52 # define CONFIG_SERIAL_BFIN_CTSRTS
54 # ifndef CONFIG_UART0_CTS_PIN
55 # define CONFIG_UART0_CTS_PIN -1
58 # ifndef CONFIG_UART0_RTS_PIN
59 # define CONFIG_UART0_RTS_PIN -1
62 # ifndef CONFIG_UART1_CTS_PIN
63 # define CONFIG_UART1_CTS_PIN -1
66 # ifndef CONFIG_UART1_RTS_PIN
67 # define CONFIG_UART1_RTS_PIN -1
71 * The pin configuration is different from schematic
73 struct bfin_serial_port {
74 struct uart_port port;
75 unsigned int old_status;
77 #ifdef CONFIG_SERIAL_BFIN_DMA
80 struct circ_buf rx_dma_buf;
81 struct timer_list rx_dma_timer;
83 unsigned int tx_dma_channel;
84 unsigned int rx_dma_channel;
85 struct work_struct tx_dma_workqueue;
87 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
88 struct work_struct cts_workqueue;
94 /* The hardware clears the LSR bits upon read, so we need to cache
95 * some of the more fun bits in software so they don't get lost
96 * when checking the LSR in other code paths (TX).
98 static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart)
100 unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR);
101 uart->lsr |= (lsr & (BI|FE|PE|OE));
102 return lsr | uart->lsr;
105 static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
108 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
111 struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
112 struct bfin_serial_res {
113 unsigned long uart_base_addr;
115 #ifdef CONFIG_SERIAL_BFIN_DMA
116 unsigned int uart_tx_dma_channel;
117 unsigned int uart_rx_dma_channel;
119 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
125 struct bfin_serial_res bfin_serial_resource[] = {
126 #ifdef CONFIG_SERIAL_BFIN_UART0
130 #ifdef CONFIG_SERIAL_BFIN_DMA
134 #ifdef CONFIG_BFIN_UART0_CTSRTS
135 CONFIG_UART0_CTS_PIN,
136 CONFIG_UART0_RTS_PIN,
140 #ifdef CONFIG_SERIAL_BFIN_UART1
144 #ifdef CONFIG_SERIAL_BFIN_DMA
148 #ifdef CONFIG_BFIN_UART1_CTSRTS
149 CONFIG_UART1_CTS_PIN,
150 CONFIG_UART1_RTS_PIN,
156 int nr_ports = ARRAY_SIZE(bfin_serial_resource);
158 #define DRIVER_NAME "bfin-uart"
160 static void bfin_serial_hw_init(struct bfin_serial_port *uart)
163 #ifdef CONFIG_SERIAL_BFIN_UART0
164 peripheral_request(P_UART0_TX, DRIVER_NAME);
165 peripheral_request(P_UART0_RX, DRIVER_NAME);
168 #ifdef CONFIG_SERIAL_BFIN_UART1
169 peripheral_request(P_UART1_TX, DRIVER_NAME);
170 peripheral_request(P_UART1_RX, DRIVER_NAME);
173 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
174 if (uart->cts_pin >= 0) {
175 gpio_request(uart->cts_pin, DRIVER_NAME);
176 gpio_direction_input(uart->cts_pin);
179 if (uart->rts_pin >= 0) {
180 gpio_request(uart->rts_pin, DRIVER_NAME);
181 gpio_direction_output(uart->rts_pin, 0);