2 * Provides the Hypervisor PCI calls for iSeries Linux Parition.
3 * Copyright (C) 2001 <Wayne G Holm> <IBM Corporation>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the:
17 * Free Software Foundation, Inc.,
18 * 59 Temple Place, Suite 330,
19 * Boston, MA 02111-1307 USA
22 * Created, Jan 9, 2001
28 #include <asm/iSeries/HvCallSc.h>
29 #include <asm/iSeries/HvTypes.h>
32 * DSA == Direct Select Address
33 * this struct must be 64 bits in total
35 struct HvCallPci_DsaAddr {
36 u16 busNumber; /* PHB index? */
37 u8 subBusNumber; /* PCI bus number? */
38 u8 deviceId; /* device and function? */
45 struct HvCallPci_DsaAddr Dsa;
48 struct HvCallPci_LoadReturn {
53 enum HvCallPci_DeviceType {
54 HvCallPci_NodeDevice = 1,
55 HvCallPci_SpDevice = 2,
56 HvCallPci_IopDevice = 3,
57 HvCallPci_BridgeDevice = 4,
58 HvCallPci_MultiFunctionDevice = 5,
59 HvCallPci_IoaDevice = 6
63 struct HvCallPci_DeviceInfo {
64 u32 deviceType; /* See DeviceType enum for values */
67 struct HvCallPci_BusUnitInfo {
68 u32 sizeReturned; /* length of data returned */
69 u32 deviceType; /* see DeviceType enum for values */
72 struct HvCallPci_BridgeInfo {
73 struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */
74 u8 subBusNumber; /* Bus number of secondary bus */
75 u8 maxAgents; /* Max idsels on secondary bus */
76 u8 maxSubBusNumber; /* Max Sub Bus */
77 u8 logicalSlotNumber; /* Logical Slot Number for IOA */
82 * Maximum BusUnitInfo buffer size. Provided for clients so
83 * they can allocate a buffer big enough for any type of bus
84 * unit. Increase as needed.
86 enum {HvCallPci_MaxBusUnitInfoSize = 128};
88 struct HvCallPci_BarParms {
99 enum HvCallPci_VpdType {
100 HvCallPci_BusVpd = 1,
101 HvCallPci_BusAdapterVpd = 2
104 #define HvCallPciConfigLoad8 HvCallPci + 0
105 #define HvCallPciConfigLoad16 HvCallPci + 1
106 #define HvCallPciConfigLoad32 HvCallPci + 2
107 #define HvCallPciConfigStore8 HvCallPci + 3
108 #define HvCallPciConfigStore16 HvCallPci + 4
109 #define HvCallPciConfigStore32 HvCallPci + 5
110 #define HvCallPciEoi HvCallPci + 16
111 #define HvCallPciGetBarParms HvCallPci + 18
112 #define HvCallPciMaskFisr HvCallPci + 20
113 #define HvCallPciUnmaskFisr HvCallPci + 21
114 #define HvCallPciSetSlotReset HvCallPci + 25
115 #define HvCallPciGetDeviceInfo HvCallPci + 27
116 #define HvCallPciGetCardVpd HvCallPci + 28
117 #define HvCallPciBarLoad8 HvCallPci + 40
118 #define HvCallPciBarLoad16 HvCallPci + 41
119 #define HvCallPciBarLoad32 HvCallPci + 42
120 #define HvCallPciBarLoad64 HvCallPci + 43
121 #define HvCallPciBarStore8 HvCallPci + 44
122 #define HvCallPciBarStore16 HvCallPci + 45
123 #define HvCallPciBarStore32 HvCallPci + 46
124 #define HvCallPciBarStore64 HvCallPci + 47
125 #define HvCallPciMaskInterrupts HvCallPci + 48
126 #define HvCallPciUnmaskInterrupts HvCallPci + 49
127 #define HvCallPciGetBusUnitInfo HvCallPci + 50
129 static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
130 u8 deviceId, u32 offset, u8 *value)
132 struct HvCallPci_DsaAddr dsa;
133 struct HvCallPci_LoadReturn retVal;
137 dsa.busNumber = busNumber;
138 dsa.subBusNumber = subBusNumber;
139 dsa.deviceId = deviceId;
141 HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
143 *value = retVal.value;
148 static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
149 u8 deviceId, u32 offset, u16 *value)
151 struct HvCallPci_DsaAddr dsa;
152 struct HvCallPci_LoadReturn retVal;
156 dsa.busNumber = busNumber;
157 dsa.subBusNumber = subBusNumber;
158 dsa.deviceId = deviceId;
160 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
162 *value = retVal.value;
167 static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
168 u8 deviceId, u32 offset, u32 *value)
170 struct HvCallPci_DsaAddr dsa;
171 struct HvCallPci_LoadReturn retVal;
175 dsa.busNumber = busNumber;
176 dsa.subBusNumber = subBusNumber;
177 dsa.deviceId = deviceId;
179 HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
181 *value = retVal.value;
186 static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
187 u8 deviceId, u32 offset, u8 value)
189 struct HvCallPci_DsaAddr dsa;
193 dsa.busNumber = busNumber;
194 dsa.subBusNumber = subBusNumber;
195 dsa.deviceId = deviceId;
197 return HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
200 static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
201 u8 deviceId, u32 offset, u16 value)
203 struct HvCallPci_DsaAddr dsa;
207 dsa.busNumber = busNumber;
208 dsa.subBusNumber = subBusNumber;
209 dsa.deviceId = deviceId;
211 return HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
214 static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
215 u8 deviceId, u32 offset, u32 value)
217 struct HvCallPci_DsaAddr dsa;
221 dsa.busNumber = busNumber;
222 dsa.subBusNumber = subBusNumber;
223 dsa.deviceId = deviceId;
225 return HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
228 static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm,
229 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
232 struct HvCallPci_DsaAddr dsa;
233 struct HvCallPci_LoadReturn retVal;
237 dsa.busNumber = busNumberParm;
238 dsa.subBusNumber = subBusParm;
239 dsa.deviceId = deviceIdParm;
240 dsa.barNumber = barNumberParm;
242 HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
244 *valueParm = retVal.value;
249 static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm,
250 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
253 struct HvCallPci_DsaAddr dsa;
254 struct HvCallPci_LoadReturn retVal;
258 dsa.busNumber = busNumberParm;
259 dsa.subBusNumber = subBusParm;
260 dsa.deviceId = deviceIdParm;
261 dsa.barNumber = barNumberParm;
263 HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
265 *valueParm = retVal.value;
270 static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm,
271 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
274 struct HvCallPci_DsaAddr dsa;
275 struct HvCallPci_LoadReturn retVal;
279 dsa.busNumber = busNumberParm;
280 dsa.subBusNumber = subBusParm;
281 dsa.deviceId = deviceIdParm;
282 dsa.barNumber = barNumberParm;
284 HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
286 *valueParm = retVal.value;
291 static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm,
292 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
295 struct HvCallPci_DsaAddr dsa;
296 struct HvCallPci_LoadReturn retVal;
300 dsa.busNumber = busNumberParm;
301 dsa.subBusNumber = subBusParm;
302 dsa.deviceId = deviceIdParm;
303 dsa.barNumber = barNumberParm;
305 HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
307 *valueParm = retVal.value;
312 static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm,
313 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
316 struct HvCallPci_DsaAddr dsa;
320 dsa.busNumber = busNumberParm;
321 dsa.subBusNumber = subBusParm;
322 dsa.deviceId = deviceIdParm;
323 dsa.barNumber = barNumberParm;
325 return HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm,
329 static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm,
330 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
333 struct HvCallPci_DsaAddr dsa;
337 dsa.busNumber = busNumberParm;
338 dsa.subBusNumber = subBusParm;
339 dsa.deviceId = deviceIdParm;
340 dsa.barNumber = barNumberParm;
342 return HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm,
346 static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm,
347 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
350 struct HvCallPci_DsaAddr dsa;
354 dsa.busNumber = busNumberParm;
355 dsa.subBusNumber = subBusParm;
356 dsa.deviceId = deviceIdParm;
357 dsa.barNumber = barNumberParm;
359 return HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm,
363 static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm,
364 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
367 struct HvCallPci_DsaAddr dsa;
371 dsa.busNumber = busNumberParm;
372 dsa.subBusNumber = subBusParm;
373 dsa.deviceId = deviceIdParm;
374 dsa.barNumber = barNumberParm;
376 return HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm,
380 static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
383 struct HvCallPci_DsaAddr dsa;
384 struct HvCallPci_LoadReturn retVal;
388 dsa.busNumber = busNumberParm;
389 dsa.subBusNumber = subBusParm;
390 dsa.deviceId = deviceIdParm;
392 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
397 static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
398 u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
400 struct HvCallPci_DsaAddr dsa;
404 dsa.busNumber = busNumberParm;
405 dsa.subBusNumber = subBusParm;
406 dsa.deviceId = deviceIdParm;
407 dsa.barNumber = barNumberParm;
409 return HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
412 static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
413 u8 deviceIdParm, u64 fisrMask)
415 struct HvCallPci_DsaAddr dsa;
419 dsa.busNumber = busNumberParm;
420 dsa.subBusNumber = subBusParm;
421 dsa.deviceId = deviceIdParm;
423 return HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
426 static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
427 u8 deviceIdParm, u64 fisrMask)
429 struct HvCallPci_DsaAddr dsa;
433 dsa.busNumber = busNumberParm;
434 dsa.subBusNumber = subBusParm;
435 dsa.deviceId = deviceIdParm;
437 return HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
440 static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm,
441 u8 deviceIdParm, u64 onNotOff)
443 struct HvCallPci_DsaAddr dsa;
447 dsa.busNumber = busNumberParm;
448 dsa.subBusNumber = subBusParm;
449 dsa.deviceId = deviceIdParm;
451 return HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
454 static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
455 u8 deviceNumberParm, u64 parms, u32 sizeofParms)
457 struct HvCallPci_DsaAddr dsa;
461 dsa.busNumber = busNumberParm;
462 dsa.subBusNumber = subBusParm;
463 dsa.deviceId = deviceNumberParm << 4;
465 return HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
468 static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
469 u8 deviceIdParm, u64 interruptMask)
471 struct HvCallPci_DsaAddr dsa;
475 dsa.busNumber = busNumberParm;
476 dsa.subBusNumber = subBusParm;
477 dsa.deviceId = deviceIdParm;
479 return HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
482 static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
483 u8 deviceIdParm, u64 interruptMask)
485 struct HvCallPci_DsaAddr dsa;
489 dsa.busNumber = busNumberParm;
490 dsa.subBusNumber = subBusParm;
491 dsa.deviceId = deviceIdParm;
493 return HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
496 static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
497 u8 deviceIdParm, u64 parms, u32 sizeofParms)
499 struct HvCallPci_DsaAddr dsa;
503 dsa.busNumber = busNumberParm;
504 dsa.subBusNumber = subBusParm;
505 dsa.deviceId = deviceIdParm;
507 return HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms,
511 static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
514 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
515 sizeParm, HvCallPci_BusVpd);
522 static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm,
525 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
526 sizeParm, HvCallPci_BusAdapterVpd);
533 #endif /* _HVCALLPCI_H */