Merge branch 'linux-next' of git://git.infradead.org/~dedekind/ubi-2.6
[linux-2.6] / arch / powerpc / boot / dts / sbc8641d.dts
1 /*
2  * SBC8641D Device Tree Source
3  *
4  * Copyright 2008 Wind River Systems Inc.
5  *
6  * Paul Gortmaker (see MAINTAINERS for contact information)
7  *
8  * Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc.
9  *
10  * This program is free software; you can redistribute  it and/or modify it
11  * under  the terms of  the GNU General  Public License as published by the
12  * Free Software Foundation;  either version 2 of the  License, or (at your
13  * option) any later version.
14  */
15
16 /dts-v1/;
17
18 / {
19         model = "SBC8641D";
20         compatible = "wind,sbc8641";
21         #address-cells = <1>;
22         #size-cells = <1>;
23
24         aliases {
25                 ethernet0 = &enet0;
26                 ethernet1 = &enet1;
27                 ethernet2 = &enet2;
28                 ethernet3 = &enet3;
29                 serial0 = &serial0;
30                 serial1 = &serial1;
31                 pci0 = &pci0;
32                 pci1 = &pci1;
33         };
34
35         cpus {
36                 #address-cells = <1>;
37                 #size-cells = <0>;
38
39                 PowerPC,8641@0 {
40                         device_type = "cpu";
41                         reg = <0>;
42                         d-cache-line-size = <32>;
43                         i-cache-line-size = <32>;
44                         d-cache-size = <32768>;         // L1
45                         i-cache-size = <32768>;         // L1
46                         timebase-frequency = <0>;       // From uboot
47                         bus-frequency = <0>;            // From uboot
48                         clock-frequency = <0>;          // From uboot
49                 };
50                 PowerPC,8641@1 {
51                         device_type = "cpu";
52                         reg = <1>;
53                         d-cache-line-size = <32>;
54                         i-cache-line-size = <32>;
55                         d-cache-size = <32768>;
56                         i-cache-size = <32768>;
57                         timebase-frequency = <0>;       // From uboot
58                         bus-frequency = <0>;            // From uboot
59                         clock-frequency = <0>;          // From uboot
60                 };
61         };
62
63         memory {
64                 device_type = "memory";
65                 reg = <0x00000000 0x20000000>;  // 512M at 0x0
66         };
67
68         localbus@f8005000 {
69                 #address-cells = <2>;
70                 #size-cells = <1>;
71                 compatible = "fsl,mpc8641-localbus", "simple-bus";
72                 reg = <0xf8005000 0x1000>;
73                 interrupts = <19 2>;
74                 interrupt-parent = <&mpic>;
75
76                 ranges = <0 0 0xff000000 0x01000000     // 16MB Boot flash
77                           1 0 0xf0000000 0x00010000     // 64KB EEPROM
78                           2 0 0xf1000000 0x00100000     // EPLD (1MB)
79                           3 0 0xe0000000 0x04000000     // 64MB LB SDRAM (CS3)
80                           4 0 0xe4000000 0x04000000     // 64MB LB SDRAM (CS4)
81                           6 0 0xf4000000 0x00100000     // LCD display (1MB)
82                           7 0 0xe8000000 0x04000000>;   // 64MB OneNAND
83
84                 flash@0,0 {
85                         compatible = "cfi-flash";
86                         reg = <0 0 0x01000000>;
87                         bank-width = <2>;
88                         device-width = <2>;
89                         #address-cells = <1>;
90                         #size-cells = <1>;
91                         partition@0 {
92                                 label = "dtb";
93                                 reg = <0x00000000 0x00100000>;
94                                 read-only;
95                         };
96                         partition@300000 {
97                                 label = "kernel";
98                                 reg = <0x00100000 0x00400000>;
99                                 read-only;
100                         };
101                         partition@400000 {
102                                 label = "fs";
103                                 reg = <0x00500000 0x00a00000>;
104                         };
105                         partition@700000 {
106                                 label = "firmware";
107                                 reg = <0x00f00000 0x00100000>;
108                                 read-only;
109                         };
110                 };
111
112                 epld@2,0 {
113                         compatible = "wrs,epld-localbus";
114                         #address-cells = <2>;
115                         #size-cells = <1>;
116                         reg = <2 0 0x100000>;
117                         ranges = <0 0 5 0 1     // User switches
118                                   1 0 5 1 1     // Board ID/Rev
119                                   3 0 5 3 1>;   // LEDs
120                 };
121         };
122
123         soc@f8000000 {
124                 #address-cells = <1>;
125                 #size-cells = <1>;
126                 device_type = "soc";
127                 compatible = "simple-bus";
128                 ranges = <0x00000000 0xf8000000 0x00100000>;
129                 reg = <0xf8000000 0x00001000>;  // CCSRBAR
130                 bus-frequency = <0>;
131
132                 i2c@3000 {
133                         #address-cells = <1>;
134                         #size-cells = <0>;
135                         cell-index = <0>;
136                         compatible = "fsl-i2c";
137                         reg = <0x3000 0x100>;
138                         interrupts = <43 2>;
139                         interrupt-parent = <&mpic>;
140                         dfsrr;
141                 };
142
143                 i2c@3100 {
144                         #address-cells = <1>;
145                         #size-cells = <0>;
146                         cell-index = <1>;
147                         compatible = "fsl-i2c";
148                         reg = <0x3100 0x100>;
149                         interrupts = <43 2>;
150                         interrupt-parent = <&mpic>;
151                         dfsrr;
152                 };
153
154                 dma@21300 {
155                         #address-cells = <1>;
156                         #size-cells = <1>;
157                         compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
158                         reg = <0x21300 0x4>;
159                         ranges = <0x0 0x21100 0x200>;
160                         cell-index = <0>;
161                         dma-channel@0 {
162                                 compatible = "fsl,mpc8641-dma-channel",
163                                                 "fsl,eloplus-dma-channel";
164                                 reg = <0x0 0x80>;
165                                 cell-index = <0>;
166                                 interrupt-parent = <&mpic>;
167                                 interrupts = <20 2>;
168                         };
169                         dma-channel@80 {
170                                 compatible = "fsl,mpc8641-dma-channel",
171                                                 "fsl,eloplus-dma-channel";
172                                 reg = <0x80 0x80>;
173                                 cell-index = <1>;
174                                 interrupt-parent = <&mpic>;
175                                 interrupts = <21 2>;
176                         };
177                         dma-channel@100 {
178                                 compatible = "fsl,mpc8641-dma-channel",
179                                                 "fsl,eloplus-dma-channel";
180                                 reg = <0x100 0x80>;
181                                 cell-index = <2>;
182                                 interrupt-parent = <&mpic>;
183                                 interrupts = <22 2>;
184                         };
185                         dma-channel@180 {
186                                 compatible = "fsl,mpc8641-dma-channel",
187                                                 "fsl,eloplus-dma-channel";
188                                 reg = <0x180 0x80>;
189                                 cell-index = <3>;
190                                 interrupt-parent = <&mpic>;
191                                 interrupts = <23 2>;
192                         };
193                 };
194
195                 mdio@24520 {
196                         #address-cells = <1>;
197                         #size-cells = <0>;
198                         compatible = "fsl,gianfar-mdio";
199                         reg = <0x24520 0x20>;
200
201                         phy0: ethernet-phy@1f {
202                                 interrupt-parent = <&mpic>;
203                                 interrupts = <10 1>;
204                                 reg = <0x1f>;
205                                 device_type = "ethernet-phy";
206                         };
207                         phy1: ethernet-phy@0 {
208                                 interrupt-parent = <&mpic>;
209                                 interrupts = <10 1>;
210                                 reg = <0>;
211                                 device_type = "ethernet-phy";
212                         };
213                         phy2: ethernet-phy@1 {
214                                 interrupt-parent = <&mpic>;
215                                 interrupts = <10 1>;
216                                 reg = <1>;
217                                 device_type = "ethernet-phy";
218                         };
219                         phy3: ethernet-phy@2 {
220                                 interrupt-parent = <&mpic>;
221                                 interrupts = <10 1>;
222                                 reg = <2>;
223                                 device_type = "ethernet-phy";
224                         };
225                         tbi0: tbi-phy@11 {
226                                 reg = <0x11>;
227                                 device_type = "tbi-phy";
228                         };
229                 };
230
231                 mdio@25520 {
232                         #address-cells = <1>;
233                         #size-cells = <0>;
234                         compatible = "fsl,gianfar-tbi";
235                         reg = <0x25520 0x20>;
236
237                         tbi1: tbi-phy@11 {
238                                 reg = <0x11>;
239                                 device_type = "tbi-phy";
240                         };
241                 };
242
243                 mdio@26520 {
244                         #address-cells = <1>;
245                         #size-cells = <0>;
246                         compatible = "fsl,gianfar-tbi";
247                         reg = <0x26520 0x20>;
248
249                         tbi2: tbi-phy@11 {
250                                 reg = <0x11>;
251                                 device_type = "tbi-phy";
252                         };
253                 };
254
255                 mdio@27520 {
256                         #address-cells = <1>;
257                         #size-cells = <0>;
258                         compatible = "fsl,gianfar-tbi";
259                         reg = <0x27520 0x20>;
260
261                         tbi3: tbi-phy@11 {
262                                 reg = <0x11>;
263                                 device_type = "tbi-phy";
264                         };
265                 };
266
267                 enet0: ethernet@24000 {
268                         cell-index = <0>;
269                         device_type = "network";
270                         model = "TSEC";
271                         compatible = "gianfar";
272                         reg = <0x24000 0x1000>;
273                         local-mac-address = [ 00 00 00 00 00 00 ];
274                         interrupts = <29 2 30  2 34 2>;
275                         interrupt-parent = <&mpic>;
276                         tbi-handle = <&tbi0>;
277                         phy-handle = <&phy0>;
278                         phy-connection-type = "rgmii-id";
279                 };
280
281                 enet1: ethernet@25000 {
282                         cell-index = <1>;
283                         device_type = "network";
284                         model = "TSEC";
285                         compatible = "gianfar";
286                         reg = <0x25000 0x1000>;
287                         local-mac-address = [ 00 00 00 00 00 00 ];
288                         interrupts = <35 2 36 2 40 2>;
289                         interrupt-parent = <&mpic>;
290                         tbi-handle = <&tbi1>;
291                         phy-handle = <&phy1>;
292                         phy-connection-type = "rgmii-id";
293                 };
294
295                 enet2: ethernet@26000 {
296                         cell-index = <2>;
297                         device_type = "network";
298                         model = "TSEC";
299                         compatible = "gianfar";
300                         reg = <0x26000 0x1000>;
301                         local-mac-address = [ 00 00 00 00 00 00 ];
302                         interrupts = <31 2 32 2 33 2>;
303                         interrupt-parent = <&mpic>;
304                         tbi-handle = <&tbi2>;
305                         phy-handle = <&phy2>;
306                         phy-connection-type = "rgmii-id";
307                 };
308
309                 enet3: ethernet@27000 {
310                         cell-index = <3>;
311                         device_type = "network";
312                         model = "TSEC";
313                         compatible = "gianfar";
314                         reg = <0x27000 0x1000>;
315                         local-mac-address = [ 00 00 00 00 00 00 ];
316                         interrupts = <37 2 38 2 39 2>;
317                         interrupt-parent = <&mpic>;
318                         tbi-handle = <&tbi3>;
319                         phy-handle = <&phy3>;
320                         phy-connection-type = "rgmii-id";
321                 };
322
323                 serial0: serial@4500 {
324                         cell-index = <0>;
325                         device_type = "serial";
326                         compatible = "ns16550";
327                         reg = <0x4500 0x100>;
328                         clock-frequency = <0>;
329                         interrupts = <42 2>;
330                         interrupt-parent = <&mpic>;
331                 };
332
333                 serial1: serial@4600 {
334                         cell-index = <1>;
335                         device_type = "serial";
336                         compatible = "ns16550";
337                         reg = <0x4600 0x100>;
338                         clock-frequency = <0>;
339                         interrupts = <28 2>;
340                         interrupt-parent = <&mpic>;
341                 };
342
343                 mpic: pic@40000 {
344                         clock-frequency = <0>;
345                         interrupt-controller;
346                         #address-cells = <0>;
347                         #interrupt-cells = <2>;
348                         reg = <0x40000 0x40000>;
349                         compatible = "chrp,open-pic";
350                         device_type = "open-pic";
351                         big-endian;
352                 };
353
354                 global-utilities@e0000 {
355                         compatible = "fsl,mpc8641-guts";
356                         reg = <0xe0000 0x1000>;
357                         fsl,has-rstcr;
358                 };
359         };
360
361         pci0: pcie@f8008000 {
362                 cell-index = <0>;
363                 compatible = "fsl,mpc8641-pcie";
364                 device_type = "pci";
365                 #interrupt-cells = <1>;
366                 #size-cells = <2>;
367                 #address-cells = <3>;
368                 reg = <0xf8008000 0x1000>;
369                 bus-range = <0x0 0xff>;
370                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
371                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
372                 clock-frequency = <33333333>;
373                 interrupt-parent = <&mpic>;
374                 interrupts = <24 2>;
375                 interrupt-map-mask = <0xff00 0 0 7>;
376                 interrupt-map = <
377                         /* IDSEL 0x0 */
378                         0x0000 0 0 1 &mpic 0 1
379                         0x0000 0 0 2 &mpic 1 1
380                         0x0000 0 0 3 &mpic 2 1
381                         0x0000 0 0 4 &mpic 3 1
382                         >;
383
384                 pcie@0 {
385                         reg = <0 0 0 0 0>;
386                         #size-cells = <2>;
387                         #address-cells = <3>;
388                         device_type = "pci";
389                         ranges = <0x02000000 0x0 0x80000000
390                                   0x02000000 0x0 0x80000000
391                                   0x0 0x20000000
392
393                                   0x01000000 0x0 0x00000000
394                                   0x01000000 0x0 0x00000000
395                                   0x0 0x00100000>;
396                 };
397
398         };
399
400         pci1: pcie@f8009000 {
401                 cell-index = <1>;
402                 compatible = "fsl,mpc8641-pcie";
403                 device_type = "pci";
404                 #interrupt-cells = <1>;
405                 #size-cells = <2>;
406                 #address-cells = <3>;
407                 reg = <0xf8009000 0x1000>;
408                 bus-range = <0 0xff>;
409                 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
410                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
411                 clock-frequency = <33333333>;
412                 interrupt-parent = <&mpic>;
413                 interrupts = <25 2>;
414                 interrupt-map-mask = <0xf800 0 0 7>;
415                 interrupt-map = <
416                         /* IDSEL 0x0 */
417                         0x0000 0 0 1 &mpic 4 1
418                         0x0000 0 0 2 &mpic 5 1
419                         0x0000 0 0 3 &mpic 6 1
420                         0x0000 0 0 4 &mpic 7 1
421                         >;
422
423                 pcie@0 {
424                         reg = <0 0 0 0 0>;
425                         #size-cells = <2>;
426                         #address-cells = <3>;
427                         device_type = "pci";
428                         ranges = <0x02000000 0x0 0xa0000000
429                                   0x02000000 0x0 0xa0000000
430                                   0x0 0x20000000
431
432                                   0x01000000 0x0 0x00000000
433                                   0x01000000 0x0 0x00000000
434                                   0x0 0x00100000>;
435                 };
436         };
437 };