3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
34 #include <media/v4l2-common.h>
37 #include "mt352_priv.h"
38 #ifdef HAVE_VP3054_I2C
39 # include "cx88-vp3054-i2c.h"
50 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
51 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
52 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
53 MODULE_LICENSE("GPL");
55 static unsigned int debug = 0;
56 module_param(debug, int, 0644);
57 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
59 #define dprintk(level,fmt, arg...) if (debug >= level) \
60 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
62 /* ------------------------------------------------------------------ */
64 static int dvb_buf_setup(struct videobuf_queue *q,
65 unsigned int *count, unsigned int *size)
67 struct cx8802_dev *dev = q->priv_data;
69 dev->ts_packet_size = 188 * 4;
70 dev->ts_packet_count = 32;
72 *size = dev->ts_packet_size * dev->ts_packet_count;
77 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
78 enum v4l2_field field)
80 struct cx8802_dev *dev = q->priv_data;
81 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
84 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
86 struct cx8802_dev *dev = q->priv_data;
87 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
90 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
92 cx88_free_buffer(q, (struct cx88_buffer*)vb);
95 static struct videobuf_queue_ops dvb_qops = {
96 .buf_setup = dvb_buf_setup,
97 .buf_prepare = dvb_buf_prepare,
98 .buf_queue = dvb_buf_queue,
99 .buf_release = dvb_buf_release,
102 /* ------------------------------------------------------------------ */
103 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
105 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
106 static u8 reset [] = { RESET, 0x80 };
107 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
108 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
109 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
110 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
112 mt352_write(fe, clock_config, sizeof(clock_config));
114 mt352_write(fe, reset, sizeof(reset));
115 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
117 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
118 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
119 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
123 static int dvico_dual_demod_init(struct dvb_frontend *fe)
125 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
126 static u8 reset [] = { RESET, 0x80 };
127 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
128 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
129 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
130 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
132 mt352_write(fe, clock_config, sizeof(clock_config));
134 mt352_write(fe, reset, sizeof(reset));
135 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
137 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
138 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
139 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
144 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
146 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
147 static u8 reset [] = { 0x50, 0x80 };
148 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
149 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
150 0x00, 0xFF, 0x00, 0x40, 0x40 };
151 static u8 dntv_extra[] = { 0xB5, 0x7A };
152 static u8 capt_range_cfg[] = { 0x75, 0x32 };
154 mt352_write(fe, clock_config, sizeof(clock_config));
156 mt352_write(fe, reset, sizeof(reset));
157 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
159 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
161 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
162 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
167 static struct mt352_config dvico_fusionhdtv = {
168 .demod_address = 0x0f,
169 .demod_init = dvico_fusionhdtv_demod_init,
172 static struct mt352_config dntv_live_dvbt_config = {
173 .demod_address = 0x0f,
174 .demod_init = dntv_live_dvbt_demod_init,
177 static struct mt352_config dvico_fusionhdtv_dual = {
178 .demod_address = 0x0f,
179 .demod_init = dvico_dual_demod_init,
182 #ifdef HAVE_VP3054_I2C
183 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
185 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
186 static u8 reset [] = { 0x50, 0x80 };
187 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
188 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
189 0x00, 0xFF, 0x00, 0x40, 0x40 };
190 static u8 dntv_extra[] = { 0xB5, 0x7A };
191 static u8 capt_range_cfg[] = { 0x75, 0x32 };
193 mt352_write(fe, clock_config, sizeof(clock_config));
195 mt352_write(fe, reset, sizeof(reset));
196 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
198 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
200 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
201 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
206 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
208 struct cx8802_dev *dev= fe->dvb->priv;
210 /* this message is to set up ATC and ALC */
211 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
213 { .addr = dev->core->pll_addr, .flags = 0,
214 .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
217 if (fe->ops.i2c_gate_ctrl)
218 fe->ops.i2c_gate_ctrl(fe, 1);
219 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
229 static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
230 struct dvb_frontend_parameters* params)
232 struct cx8802_dev *dev= fe->dvb->priv;
235 { .addr = dev->core->pll_addr, .flags = 0,
236 .buf = buf, .len = 4 };
239 /* Switch PLL to DVB mode */
240 err = philips_fmd1216_pll_init(fe);
245 dvb_pll_configure(dev->core->pll_desc, buf,
247 params->u.ofdm.bandwidth);
248 if (fe->ops.i2c_gate_ctrl)
249 fe->ops.i2c_gate_ctrl(fe, 1);
250 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
252 printk(KERN_WARNING "cx88-dvb: %s error "
253 "(addr %02x <- %02x, err = %i)\n",
254 __FUNCTION__, dev->core->pll_addr, buf[0], err);
264 static struct mt352_config dntv_live_dvbt_pro_config = {
265 .demod_address = 0x0f,
267 .demod_init = dntv_live_dvbt_pro_demod_init,
271 static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
272 struct dvb_frontend_parameters *params)
275 struct cx8802_dev *dev= fe->dvb->priv;
277 { .addr = dev->core->pll_addr, .flags = 0,
278 .buf = pllbuf, .len = 4 };
281 dvb_pll_configure(dev->core->pll_desc, pllbuf,
283 params->u.ofdm.bandwidth);
285 if (fe->ops.i2c_gate_ctrl)
286 fe->ops.i2c_gate_ctrl(fe, 1);
287 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
288 printk(KERN_WARNING "cx88-dvb: %s error "
289 "(addr %02x <- %02x, err = %i)\n",
290 __FUNCTION__, pllbuf[0], pllbuf[1], err);
300 static struct zl10353_config dvico_fusionhdtv_hybrid = {
301 .demod_address = 0x0f,
305 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
306 .demod_address = 0x0f,
309 static struct cx22702_config connexant_refboard_config = {
310 .demod_address = 0x43,
311 .output_mode = CX22702_SERIAL_OUTPUT,
314 static struct cx22702_config hauppauge_novat_config = {
315 .demod_address = 0x43,
316 .output_mode = CX22702_SERIAL_OUTPUT,
318 static struct cx22702_config hauppauge_hvr1100_config = {
319 .demod_address = 0x63,
320 .output_mode = CX22702_SERIAL_OUTPUT,
322 static struct cx22702_config hauppauge_hvr3000_config = {
323 .demod_address = 0x63,
324 .output_mode = CX22702_SERIAL_OUTPUT,
327 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe,
330 struct cx8802_dev *dev= fe->dvb->priv;
331 struct cx8802_driver *drv = NULL;
334 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
337 ret = drv->request_acquire(drv);
339 ret = drv->request_release(drv);
345 static struct cx22702_config hauppauge_hvr1300_config = {
346 .demod_address = 0x63,
347 .output_mode = CX22702_SERIAL_OUTPUT,
350 static int or51132_set_ts_param(struct dvb_frontend* fe,
353 struct cx8802_dev *dev= fe->dvb->priv;
354 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
358 static struct or51132_config pchdtv_hd3000 = {
359 .demod_address = 0x15,
360 .set_ts_params = or51132_set_ts_param,
363 static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
364 struct dvb_frontend_parameters* params)
366 /* FIXME make this routine use the tuner-simple code.
367 * It could probably be shared with a number of ATSC
368 * frontends. Many share the same tuner with analog TV. */
370 struct cx8802_dev *dev= fe->dvb->priv;
371 struct cx88_core *core = dev->core;
374 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
377 dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
378 dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
379 __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
381 if (fe->ops.i2c_gate_ctrl)
382 fe->ops.i2c_gate_ctrl(fe, 1);
383 if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
384 printk(KERN_WARNING "cx88-dvb: %s error "
385 "(addr %02x <- %02x, err = %i)\n",
386 __FUNCTION__, buf[0], buf[1], err);
395 static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
396 struct dvb_frontend_parameters* params)
398 struct cx8802_dev *dev= fe->dvb->priv;
399 struct cx88_core *core = dev->core;
401 /* Put the analog decoder in standby to keep it quiet */
402 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
404 return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
407 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
409 struct cx8802_dev *dev= fe->dvb->priv;
410 struct cx88_core *core = dev->core;
412 dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
414 cx_clear(MO_GP0_IO, 8);
416 cx_set(MO_GP0_IO, 8);
420 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
422 struct cx8802_dev *dev= fe->dvb->priv;
424 dev->ts_gen_cntrl |= 0x04;
426 dev->ts_gen_cntrl &= ~0x04;
430 static struct lgdt330x_config fusionhdtv_3_gold = {
431 .demod_address = 0x0e,
432 .demod_chip = LGDT3302,
433 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
434 .set_ts_params = lgdt330x_set_ts_param,
437 static struct lgdt330x_config fusionhdtv_5_gold = {
438 .demod_address = 0x0e,
439 .demod_chip = LGDT3303,
440 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
441 .set_ts_params = lgdt330x_set_ts_param,
444 static struct lgdt330x_config pchdtv_hd5500 = {
445 .demod_address = 0x59,
446 .demod_chip = LGDT3303,
447 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
448 .set_ts_params = lgdt330x_set_ts_param,
451 static int nxt200x_set_ts_param(struct dvb_frontend* fe,
454 struct cx8802_dev *dev= fe->dvb->priv;
455 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
459 static int nxt200x_set_pll_input(u8* buf, int input)
468 static struct nxt200x_config ati_hdtvwonder = {
469 .demod_address = 0x0a,
470 .set_pll_input = nxt200x_set_pll_input,
471 .set_ts_params = nxt200x_set_ts_param,
474 static int cx24123_set_ts_param(struct dvb_frontend* fe,
477 struct cx8802_dev *dev= fe->dvb->priv;
478 dev->ts_gen_cntrl = 0x02;
482 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
483 fe_sec_voltage_t voltage)
485 struct cx8802_dev *dev= fe->dvb->priv;
486 struct cx88_core *core = dev->core;
488 if (voltage == SEC_VOLTAGE_OFF) {
489 cx_write(MO_GP0_IO, 0x000006fb);
491 cx_write(MO_GP0_IO, 0x000006f9);
494 if (core->prev_set_voltage)
495 return core->prev_set_voltage(fe, voltage);
499 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
500 fe_sec_voltage_t voltage)
502 struct cx8802_dev *dev= fe->dvb->priv;
503 struct cx88_core *core = dev->core;
505 if (voltage == SEC_VOLTAGE_OFF) {
506 dprintk(1,"LNB Voltage OFF\n");
507 cx_write(MO_GP0_IO, 0x0000efff);
510 if (core->prev_set_voltage)
511 return core->prev_set_voltage(fe, voltage);
515 static struct cx24123_config geniatech_dvbs_config = {
516 .demod_address = 0x55,
517 .set_ts_params = cx24123_set_ts_param,
520 static struct cx24123_config hauppauge_novas_config = {
521 .demod_address = 0x55,
522 .set_ts_params = cx24123_set_ts_param,
525 static struct cx24123_config kworld_dvbs_100_config = {
526 .demod_address = 0x15,
527 .set_ts_params = cx24123_set_ts_param,
531 static int dvb_register(struct cx8802_dev *dev)
533 /* init struct videobuf_dvb */
534 dev->dvb.name = dev->core->name;
535 dev->ts_gen_cntrl = 0x0c;
538 switch (dev->core->board) {
539 case CX88_BOARD_HAUPPAUGE_DVB_T1:
540 dev->dvb.frontend = dvb_attach(cx22702_attach,
541 &hauppauge_novat_config,
542 &dev->core->i2c_adap);
543 if (dev->dvb.frontend != NULL) {
544 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
545 &dev->core->i2c_adap,
546 &dvb_pll_thomson_dtt759x);
549 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
550 case CX88_BOARD_CONEXANT_DVB_T1:
551 case CX88_BOARD_KWORLD_DVB_T_CX22702:
552 case CX88_BOARD_WINFAST_DTV1000:
553 dev->dvb.frontend = dvb_attach(cx22702_attach,
554 &connexant_refboard_config,
555 &dev->core->i2c_adap);
556 if (dev->dvb.frontend != NULL) {
557 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
558 &dev->core->i2c_adap,
559 &dvb_pll_thomson_dtt7579);
562 case CX88_BOARD_WINFAST_DTV2000H:
563 case CX88_BOARD_HAUPPAUGE_HVR1100:
564 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
565 dev->dvb.frontend = dvb_attach(cx22702_attach,
566 &hauppauge_hvr1100_config,
567 &dev->core->i2c_adap);
568 if (dev->dvb.frontend != NULL) {
569 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
570 &dev->core->i2c_adap,
574 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
575 dev->dvb.frontend = dvb_attach(mt352_attach,
577 &dev->core->i2c_adap);
578 if (dev->dvb.frontend != NULL) {
579 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
580 NULL, &dvb_pll_thomson_dtt7579);
583 /* ZL10353 replaces MT352 on later cards */
584 dev->dvb.frontend = dvb_attach(zl10353_attach,
585 &dvico_fusionhdtv_plus_v1_1,
586 &dev->core->i2c_adap);
587 if (dev->dvb.frontend != NULL) {
588 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
589 NULL, &dvb_pll_thomson_dtt7579);
592 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
593 /* The tin box says DEE1601, but it seems to be DTT7579
594 * compatible, with a slightly different MT352 AGC gain. */
595 dev->dvb.frontend = dvb_attach(mt352_attach,
596 &dvico_fusionhdtv_dual,
597 &dev->core->i2c_adap);
598 if (dev->dvb.frontend != NULL) {
599 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
600 NULL, &dvb_pll_thomson_dtt7579);
603 /* ZL10353 replaces MT352 on later cards */
604 dev->dvb.frontend = dvb_attach(zl10353_attach,
605 &dvico_fusionhdtv_plus_v1_1,
606 &dev->core->i2c_adap);
607 if (dev->dvb.frontend != NULL) {
608 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
609 NULL, &dvb_pll_thomson_dtt7579);
612 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
613 dev->dvb.frontend = dvb_attach(mt352_attach,
615 &dev->core->i2c_adap);
616 if (dev->dvb.frontend != NULL) {
617 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
618 NULL, &dvb_pll_lg_z201);
621 case CX88_BOARD_KWORLD_DVB_T:
622 case CX88_BOARD_DNTV_LIVE_DVB_T:
623 case CX88_BOARD_ADSTECH_DVB_T_PCI:
624 dev->dvb.frontend = dvb_attach(mt352_attach,
625 &dntv_live_dvbt_config,
626 &dev->core->i2c_adap);
627 if (dev->dvb.frontend != NULL) {
628 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
629 NULL, &dvb_pll_unknown_1);
632 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
633 #ifdef HAVE_VP3054_I2C
634 dev->core->pll_addr = 0x61;
635 dev->core->pll_desc = &dvb_pll_fmd1216me;
636 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
637 &((struct vp3054_i2c_state *)dev->card_priv)->adap);
638 if (dev->dvb.frontend != NULL) {
639 dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
642 printk("%s: built without vp3054 support\n", dev->core->name);
645 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
646 dev->core->pll_addr = 0x61;
647 dev->core->pll_desc = &dvb_pll_thomson_fe6600;
648 dev->dvb.frontend = dvb_attach(zl10353_attach,
649 &dvico_fusionhdtv_hybrid,
650 &dev->core->i2c_adap);
651 if (dev->dvb.frontend != NULL) {
652 dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
655 case CX88_BOARD_PCHDTV_HD3000:
656 dev->dvb.frontend = dvb_attach(or51132_attach,
658 &dev->core->i2c_adap);
659 if (dev->dvb.frontend != NULL) {
660 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
661 &dev->core->i2c_adap,
662 &dvb_pll_thomson_dtt761x);
665 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
666 dev->ts_gen_cntrl = 0x08;
668 /* Do a hardware reset of chip before using it. */
669 struct cx88_core *core = dev->core;
671 cx_clear(MO_GP0_IO, 1);
673 cx_set(MO_GP0_IO, 1);
676 /* Select RF connector callback */
677 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
678 dev->core->pll_addr = 0x61;
679 dev->core->pll_desc = &dvb_pll_microtune_4042;
680 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
682 &dev->core->i2c_adap);
683 if (dev->dvb.frontend != NULL) {
684 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
688 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
689 dev->ts_gen_cntrl = 0x08;
691 /* Do a hardware reset of chip before using it. */
692 struct cx88_core *core = dev->core;
694 cx_clear(MO_GP0_IO, 1);
696 cx_set(MO_GP0_IO, 9);
698 dev->core->pll_addr = 0x61;
699 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
700 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
702 &dev->core->i2c_adap);
703 if (dev->dvb.frontend != NULL) {
704 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
708 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
709 dev->ts_gen_cntrl = 0x08;
711 /* Do a hardware reset of chip before using it. */
712 struct cx88_core *core = dev->core;
714 cx_clear(MO_GP0_IO, 1);
716 cx_set(MO_GP0_IO, 1);
718 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
720 &dev->core->i2c_adap);
721 if (dev->dvb.frontend != NULL) {
722 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
726 case CX88_BOARD_PCHDTV_HD5500:
727 dev->ts_gen_cntrl = 0x08;
729 /* Do a hardware reset of chip before using it. */
730 struct cx88_core *core = dev->core;
732 cx_clear(MO_GP0_IO, 1);
734 cx_set(MO_GP0_IO, 1);
736 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
738 &dev->core->i2c_adap);
739 if (dev->dvb.frontend != NULL) {
740 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
744 case CX88_BOARD_ATI_HDTVWONDER:
745 dev->dvb.frontend = dvb_attach(nxt200x_attach,
747 &dev->core->i2c_adap);
748 if (dev->dvb.frontend != NULL) {
749 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
750 NULL, &dvb_pll_tuv1236d);
753 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
754 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
755 dev->dvb.frontend = dvb_attach(cx24123_attach,
756 &hauppauge_novas_config,
757 &dev->core->i2c_adap);
758 if (dev->dvb.frontend) {
759 dvb_attach(isl6421_attach, dev->dvb.frontend,
760 &dev->core->i2c_adap, 0x08, 0x00, 0x00);
763 case CX88_BOARD_KWORLD_DVBS_100:
764 dev->dvb.frontend = dvb_attach(cx24123_attach,
765 &kworld_dvbs_100_config,
766 &dev->core->i2c_adap);
767 if (dev->dvb.frontend) {
768 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
769 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
772 case CX88_BOARD_GENIATECH_DVBS:
773 dev->dvb.frontend = dvb_attach(cx24123_attach,
774 &geniatech_dvbs_config,
775 &dev->core->i2c_adap);
776 if (dev->dvb.frontend) {
777 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
778 dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
781 case CX88_BOARD_HAUPPAUGE_HVR1300:
782 dev->dvb.frontend = dvb_attach(cx22702_attach,
783 &hauppauge_hvr1300_config,
784 &dev->core->i2c_adap);
785 if (dev->dvb.frontend != NULL) {
786 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
787 &dev->core->i2c_adap,
791 case CX88_BOARD_HAUPPAUGE_HVR3000:
792 dev->dvb.frontend = dvb_attach(cx22702_attach,
793 &hauppauge_hvr3000_config,
794 &dev->core->i2c_adap);
795 if (dev->dvb.frontend != NULL) {
796 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
797 &dev->core->i2c_adap,
802 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
806 if (NULL == dev->dvb.frontend) {
807 printk("%s: frontend initialization failed\n",dev->core->name);
811 if (dev->core->pll_desc) {
812 dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
813 dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
815 /* Ensure all frontends negotiate bus access */
816 dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
818 /* Put the analog decoder in standby to keep it quiet */
819 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
821 /* register everything */
822 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
825 /* ----------------------------------------------------------- */
827 /* CX8802 MPEG -> mini driver - We have been given the hardware */
828 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
830 struct cx88_core *core = drv->core;
832 dprintk( 1, "%s\n", __FUNCTION__);
834 switch (core->board) {
835 case CX88_BOARD_HAUPPAUGE_HVR1300:
836 /* We arrive here with either the cx23416 or the cx22702
837 * on the bus. Take the bus from the cx23416 and enable the
840 cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
841 cx_clear(MO_GP0_IO, 0x00000004);
850 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
851 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
853 struct cx88_core *core = drv->core;
855 dprintk( 1, "%s\n", __FUNCTION__);
857 switch (core->board) {
858 case CX88_BOARD_HAUPPAUGE_HVR1300:
859 /* Do Nothing, leave the cx22702 on the bus. */
867 static int cx8802_dvb_probe(struct cx8802_driver *drv)
869 struct cx88_core *core = drv->core;
870 struct cx8802_dev *dev = drv->core->dvbdev;
873 dprintk( 1, "%s\n", __FUNCTION__);
874 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
881 if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
884 #ifdef HAVE_VP3054_I2C
885 err = vp3054_i2c_probe(dev);
891 printk("%s/2: cx2388x based dvb card\n", core->name);
892 videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
893 dev->pci, &dev->slock,
894 V4L2_BUF_TYPE_VIDEO_CAPTURE,
896 sizeof(struct cx88_buffer),
898 err = dvb_register(dev);
900 printk("%s dvb_register failed err = %d\n", __FUNCTION__, err);
906 static int cx8802_dvb_remove(struct cx8802_driver *drv)
908 struct cx8802_dev *dev = drv->core->dvbdev;
911 videobuf_dvb_unregister(&dev->dvb);
913 #ifdef HAVE_VP3054_I2C
914 vp3054_i2c_remove(dev);
920 static struct cx8802_driver cx8802_dvb_driver = {
921 .type_id = CX88_MPEG_DVB,
922 .hw_access = CX8802_DRVCTL_SHARED,
923 .probe = cx8802_dvb_probe,
924 .remove = cx8802_dvb_remove,
925 .advise_acquire = cx8802_dvb_advise_acquire,
926 .advise_release = cx8802_dvb_advise_release,
929 static int dvb_init(void)
931 printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
932 (CX88_VERSION_CODE >> 16) & 0xff,
933 (CX88_VERSION_CODE >> 8) & 0xff,
934 CX88_VERSION_CODE & 0xff);
936 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
937 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
939 return cx8802_register_driver(&cx8802_dvb_driver);
942 static void dvb_fini(void)
944 cx8802_unregister_driver(&cx8802_dvb_driver);
947 module_init(dvb_init);
948 module_exit(dvb_fini);
953 * compile-command: "make DVB=1"