2 * MPC8349E MDS Device Tree Source
4 * Copyright 2005, 2006 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
13 model = "MPC8349EMDS";
14 compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
34 d-cache-line-size = <20>; // 32 bytes
35 i-cache-line-size = <20>; // 32 bytes
36 d-cache-size = <8000>; // L1, 32K
37 i-cache-size = <8000>; // L1, 32K
38 timebase-frequency = <0>; // from bootloader
39 bus-frequency = <0>; // from bootloader
40 clock-frequency = <0>; // from bootloader
45 device_type = "memory";
46 reg = <00000000 10000000>; // 256MB at 0
50 device_type = "board-control";
51 reg = <e2400000 8000>;
58 ranges = <0 e0000000 00100000>;
59 reg = <e0000000 00000200>;
63 device_type = "watchdog";
64 compatible = "mpc83xx_wdt";
72 compatible = "fsl-i2c";
75 interrupt-parent = < &ipic >;
79 compatible = "dallas,ds1374";
88 compatible = "fsl-i2c";
91 interrupt-parent = < &ipic >;
97 compatible = "fsl_spi";
100 interrupt-parent = < &ipic >;
104 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
107 compatible = "fsl-usb2-mph";
109 #address-cells = <1>;
111 interrupt-parent = < &ipic >;
116 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
118 compatible = "fsl-usb2-dr";
120 #address-cells = <1>;
122 interrupt-parent = < &ipic >;
129 #address-cells = <1>;
131 compatible = "fsl,gianfar-mdio";
134 phy0: ethernet-phy@0 {
135 interrupt-parent = < &ipic >;
138 device_type = "ethernet-phy";
140 phy1: ethernet-phy@1 {
141 interrupt-parent = < &ipic >;
144 device_type = "ethernet-phy";
148 enet0: ethernet@24000 {
150 device_type = "network";
152 compatible = "gianfar";
154 local-mac-address = [ 00 00 00 00 00 00 ];
155 interrupts = <20 8 21 8 22 8>;
156 interrupt-parent = < &ipic >;
157 phy-handle = < &phy0 >;
158 linux,network-index = <0>;
161 enet1: ethernet@25000 {
163 device_type = "network";
165 compatible = "gianfar";
167 local-mac-address = [ 00 00 00 00 00 00 ];
168 interrupts = <23 8 24 8 25 8>;
169 interrupt-parent = < &ipic >;
170 phy-handle = < &phy1 >;
171 linux,network-index = <1>;
174 serial0: serial@4500 {
176 device_type = "serial";
177 compatible = "ns16550";
179 clock-frequency = <0>;
181 interrupt-parent = < &ipic >;
184 serial1: serial@4600 {
186 device_type = "serial";
187 compatible = "ns16550";
189 clock-frequency = <0>;
191 interrupt-parent = < &ipic >;
194 /* May need to remove if on a part without crypto engine */
196 device_type = "crypto";
198 compatible = "talitos";
201 interrupt-parent = < &ipic >;
203 channel-fifo-len = <18>;
204 exec-units-mask = <0000007e>;
205 /* desc mask is for rev2.0,
206 * we need runtime fixup for >2.0 */
207 descriptor-types-mask = <01010ebf>;
211 * interrupts cell = <intr #, sense>
212 * sense values match linux IORESOURCE_IRQ_* defines:
213 * sense == 8: Level, low assertion
214 * sense == 2: Edge, high-to-low change
217 interrupt-controller;
218 #address-cells = <0>;
219 #interrupt-cells = <2>;
221 device_type = "ipic";
227 interrupt-map-mask = <f800 0 0 7>;
231 8800 0 0 1 &ipic 14 8
232 8800 0 0 2 &ipic 15 8
233 8800 0 0 3 &ipic 16 8
234 8800 0 0 4 &ipic 17 8
237 9000 0 0 1 &ipic 16 8
238 9000 0 0 2 &ipic 17 8
239 9000 0 0 3 &ipic 14 8
240 9000 0 0 4 &ipic 15 8
243 9800 0 0 1 &ipic 17 8
244 9800 0 0 2 &ipic 14 8
245 9800 0 0 3 &ipic 15 8
246 9800 0 0 4 &ipic 16 8
249 a800 0 0 1 &ipic 14 8
250 a800 0 0 2 &ipic 15 8
251 a800 0 0 3 &ipic 16 8
252 a800 0 0 4 &ipic 17 8
255 b000 0 0 1 &ipic 17 8
256 b000 0 0 2 &ipic 14 8
257 b000 0 0 3 &ipic 15 8
258 b000 0 0 4 &ipic 16 8
261 b800 0 0 1 &ipic 16 8
262 b800 0 0 2 &ipic 17 8
263 b800 0 0 3 &ipic 14 8
264 b800 0 0 4 &ipic 15 8
267 c000 0 0 1 &ipic 15 8
268 c000 0 0 2 &ipic 16 8
269 c000 0 0 3 &ipic 17 8
270 c000 0 0 4 &ipic 14 8>;
271 interrupt-parent = < &ipic >;
274 ranges = <02000000 0 90000000 90000000 0 10000000
275 42000000 0 80000000 80000000 0 10000000
276 01000000 0 00000000 e2000000 0 00100000>;
277 clock-frequency = <3f940aa>;
278 #interrupt-cells = <1>;
280 #address-cells = <3>;
281 reg = <e0008500 100>;
282 compatible = "fsl,mpc8349-pci";
288 interrupt-map-mask = <f800 0 0 7>;
292 8800 0 0 1 &ipic 14 8
293 8800 0 0 2 &ipic 15 8
294 8800 0 0 3 &ipic 16 8
295 8800 0 0 4 &ipic 17 8
298 9000 0 0 1 &ipic 16 8
299 9000 0 0 2 &ipic 17 8
300 9000 0 0 3 &ipic 14 8
301 9000 0 0 4 &ipic 15 8
304 9800 0 0 1 &ipic 17 8
305 9800 0 0 2 &ipic 14 8
306 9800 0 0 3 &ipic 15 8
307 9800 0 0 4 &ipic 16 8
310 a800 0 0 1 &ipic 14 8
311 a800 0 0 2 &ipic 15 8
312 a800 0 0 3 &ipic 16 8
313 a800 0 0 4 &ipic 17 8
316 b000 0 0 1 &ipic 17 8
317 b000 0 0 2 &ipic 14 8
318 b000 0 0 3 &ipic 15 8
319 b000 0 0 4 &ipic 16 8
322 b800 0 0 1 &ipic 16 8
323 b800 0 0 2 &ipic 17 8
324 b800 0 0 3 &ipic 14 8
325 b800 0 0 4 &ipic 15 8
328 c000 0 0 1 &ipic 15 8
329 c000 0 0 2 &ipic 16 8
330 c000 0 0 3 &ipic 17 8
331 c000 0 0 4 &ipic 14 8>;
332 interrupt-parent = < &ipic >;
335 ranges = <02000000 0 b0000000 b0000000 0 10000000
336 42000000 0 a0000000 a0000000 0 10000000
337 01000000 0 00000000 e2100000 0 00100000>;
338 clock-frequency = <3f940aa>;
339 #interrupt-cells = <1>;
341 #address-cells = <3>;
342 reg = <e0008600 100>;
343 compatible = "fsl,mpc8349-pci";