[SPARC]: Fix robust futex syscalls and wire up migrate_pages.
[linux-2.6] / arch / sparc64 / kernel / prom.c
1 /*
2  * Procedures for creating, accessing and interpreting the device tree.
3  *
4  * Paul Mackerras       August 1996.
5  * Copyright (C) 1996-2005 Paul Mackerras.
6  * 
7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
8  *    {engebret|bergner}@us.ibm.com 
9  *
10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
11  *
12  *      This program is free software; you can redistribute it and/or
13  *      modify it under the terms of the GNU General Public License
14  *      as published by the Free Software Foundation; either version
15  *      2 of the License, or (at your option) any later version.
16  */
17
18 #include <linux/kernel.h>
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <linux/mm.h>
22 #include <linux/bootmem.h>
23 #include <linux/module.h>
24
25 #include <asm/prom.h>
26 #include <asm/of_device.h>
27 #include <asm/oplib.h>
28 #include <asm/irq.h>
29 #include <asm/asi.h>
30 #include <asm/upa.h>
31
32 static struct device_node *allnodes;
33
34 /* use when traversing tree through the allnext, child, sibling,
35  * or parent members of struct device_node.
36  */
37 static DEFINE_RWLOCK(devtree_lock);
38
39 int of_device_is_compatible(struct device_node *device, const char *compat)
40 {
41         const char* cp;
42         int cplen, l;
43
44         cp = (char *) of_get_property(device, "compatible", &cplen);
45         if (cp == NULL)
46                 return 0;
47         while (cplen > 0) {
48                 if (strncmp(cp, compat, strlen(compat)) == 0)
49                         return 1;
50                 l = strlen(cp) + 1;
51                 cp += l;
52                 cplen -= l;
53         }
54
55         return 0;
56 }
57 EXPORT_SYMBOL(of_device_is_compatible);
58
59 struct device_node *of_get_parent(const struct device_node *node)
60 {
61         struct device_node *np;
62
63         if (!node)
64                 return NULL;
65
66         np = node->parent;
67
68         return np;
69 }
70 EXPORT_SYMBOL(of_get_parent);
71
72 struct device_node *of_get_next_child(const struct device_node *node,
73         struct device_node *prev)
74 {
75         struct device_node *next;
76
77         next = prev ? prev->sibling : node->child;
78         for (; next != 0; next = next->sibling) {
79                 break;
80         }
81
82         return next;
83 }
84 EXPORT_SYMBOL(of_get_next_child);
85
86 struct device_node *of_find_node_by_path(const char *path)
87 {
88         struct device_node *np = allnodes;
89
90         for (; np != 0; np = np->allnext) {
91                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
92                         break;
93         }
94
95         return np;
96 }
97 EXPORT_SYMBOL(of_find_node_by_path);
98
99 struct device_node *of_find_node_by_phandle(phandle handle)
100 {
101         struct device_node *np;
102
103         for (np = allnodes; np != 0; np = np->allnext)
104                 if (np->node == handle)
105                         break;
106
107         return np;
108 }
109 EXPORT_SYMBOL(of_find_node_by_phandle);
110
111 struct device_node *of_find_node_by_name(struct device_node *from,
112         const char *name)
113 {
114         struct device_node *np;
115
116         np = from ? from->allnext : allnodes;
117         for (; np != NULL; np = np->allnext)
118                 if (np->name != NULL && strcmp(np->name, name) == 0)
119                         break;
120
121         return np;
122 }
123 EXPORT_SYMBOL(of_find_node_by_name);
124
125 struct device_node *of_find_node_by_type(struct device_node *from,
126         const char *type)
127 {
128         struct device_node *np;
129
130         np = from ? from->allnext : allnodes;
131         for (; np != 0; np = np->allnext)
132                 if (np->type != 0 && strcmp(np->type, type) == 0)
133                         break;
134
135         return np;
136 }
137 EXPORT_SYMBOL(of_find_node_by_type);
138
139 struct device_node *of_find_compatible_node(struct device_node *from,
140         const char *type, const char *compatible)
141 {
142         struct device_node *np;
143
144         np = from ? from->allnext : allnodes;
145         for (; np != 0; np = np->allnext) {
146                 if (type != NULL
147                     && !(np->type != 0 && strcmp(np->type, type) == 0))
148                         continue;
149                 if (of_device_is_compatible(np, compatible))
150                         break;
151         }
152
153         return np;
154 }
155 EXPORT_SYMBOL(of_find_compatible_node);
156
157 struct property *of_find_property(struct device_node *np, const char *name,
158                                   int *lenp)
159 {
160         struct property *pp;
161
162         for (pp = np->properties; pp != 0; pp = pp->next) {
163                 if (strcmp(pp->name, name) == 0) {
164                         if (lenp != 0)
165                                 *lenp = pp->length;
166                         break;
167                 }
168         }
169         return pp;
170 }
171 EXPORT_SYMBOL(of_find_property);
172
173 /*
174  * Find a property with a given name for a given node
175  * and return the value.
176  */
177 void *of_get_property(struct device_node *np, const char *name, int *lenp)
178 {
179         struct property *pp = of_find_property(np,name,lenp);
180         return pp ? pp->value : NULL;
181 }
182 EXPORT_SYMBOL(of_get_property);
183
184 int of_getintprop_default(struct device_node *np, const char *name, int def)
185 {
186         struct property *prop;
187         int len;
188
189         prop = of_find_property(np, name, &len);
190         if (!prop || len != 4)
191                 return def;
192
193         return *(int *) prop->value;
194 }
195 EXPORT_SYMBOL(of_getintprop_default);
196
197 int of_n_addr_cells(struct device_node *np)
198 {
199         int* ip;
200         do {
201                 if (np->parent)
202                         np = np->parent;
203                 ip = of_get_property(np, "#address-cells", NULL);
204                 if (ip != NULL)
205                         return *ip;
206         } while (np->parent);
207         /* No #address-cells property for the root node, default to 2 */
208         return 2;
209 }
210 EXPORT_SYMBOL(of_n_addr_cells);
211
212 int of_n_size_cells(struct device_node *np)
213 {
214         int* ip;
215         do {
216                 if (np->parent)
217                         np = np->parent;
218                 ip = of_get_property(np, "#size-cells", NULL);
219                 if (ip != NULL)
220                         return *ip;
221         } while (np->parent);
222         /* No #size-cells property for the root node, default to 1 */
223         return 1;
224 }
225 EXPORT_SYMBOL(of_n_size_cells);
226
227 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
228 {
229         struct property **prevp;
230         void *new_val;
231         int err;
232
233         new_val = kmalloc(len, GFP_KERNEL);
234         if (!new_val)
235                 return -ENOMEM;
236
237         memcpy(new_val, val, len);
238
239         err = -ENODEV;
240
241         write_lock(&devtree_lock);
242         prevp = &dp->properties;
243         while (*prevp) {
244                 struct property *prop = *prevp;
245
246                 if (!strcmp(prop->name, name)) {
247                         void *old_val = prop->value;
248                         int ret;
249
250                         ret = prom_setprop(dp->node, name, val, len);
251                         err = -EINVAL;
252                         if (ret >= 0) {
253                                 prop->value = new_val;
254                                 prop->length = len;
255
256                                 if (OF_IS_DYNAMIC(prop))
257                                         kfree(old_val);
258
259                                 OF_MARK_DYNAMIC(prop);
260
261                                 err = 0;
262                         }
263                         break;
264                 }
265                 prevp = &(*prevp)->next;
266         }
267         write_unlock(&devtree_lock);
268
269         /* XXX Upate procfs if necessary... */
270
271         return err;
272 }
273 EXPORT_SYMBOL(of_set_property);
274
275 static unsigned int prom_early_allocated;
276
277 static void * __init prom_early_alloc(unsigned long size)
278 {
279         void *ret;
280
281         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
282         if (ret != NULL)
283                 memset(ret, 0, size);
284
285         prom_early_allocated += size;
286
287         return ret;
288 }
289
290 #ifdef CONFIG_PCI
291 /* PSYCHO interrupt mapping support. */
292 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
293 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
294 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
295 {
296         unsigned int bus =  (ino & 0x10) >> 4;
297         unsigned int slot = (ino & 0x0c) >> 2;
298
299         if (bus == 0)
300                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
301         else
302                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
303 }
304
305 #define PSYCHO_IMAP_SCSI        0x1000UL
306 #define PSYCHO_IMAP_ETH         0x1008UL
307 #define PSYCHO_IMAP_BPP         0x1010UL
308 #define PSYCHO_IMAP_AU_REC      0x1018UL
309 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
310 #define PSYCHO_IMAP_PFAIL       0x1028UL
311 #define PSYCHO_IMAP_KMS         0x1030UL
312 #define PSYCHO_IMAP_FLPY        0x1038UL
313 #define PSYCHO_IMAP_SHW         0x1040UL
314 #define PSYCHO_IMAP_KBD         0x1048UL
315 #define PSYCHO_IMAP_MS          0x1050UL
316 #define PSYCHO_IMAP_SER         0x1058UL
317 #define PSYCHO_IMAP_TIM0        0x1060UL
318 #define PSYCHO_IMAP_TIM1        0x1068UL
319 #define PSYCHO_IMAP_UE          0x1070UL
320 #define PSYCHO_IMAP_CE          0x1078UL
321 #define PSYCHO_IMAP_A_ERR       0x1080UL
322 #define PSYCHO_IMAP_B_ERR       0x1088UL
323 #define PSYCHO_IMAP_PMGMT       0x1090UL
324 #define PSYCHO_IMAP_GFX         0x1098UL
325 #define PSYCHO_IMAP_EUPA        0x10a0UL
326
327 static unsigned long __psycho_onboard_imap_off[] = {
328 /*0x20*/        PSYCHO_IMAP_SCSI,
329 /*0x21*/        PSYCHO_IMAP_ETH,
330 /*0x22*/        PSYCHO_IMAP_BPP,
331 /*0x23*/        PSYCHO_IMAP_AU_REC,
332 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
333 /*0x25*/        PSYCHO_IMAP_PFAIL,
334 /*0x26*/        PSYCHO_IMAP_KMS,
335 /*0x27*/        PSYCHO_IMAP_FLPY,
336 /*0x28*/        PSYCHO_IMAP_SHW,
337 /*0x29*/        PSYCHO_IMAP_KBD,
338 /*0x2a*/        PSYCHO_IMAP_MS,
339 /*0x2b*/        PSYCHO_IMAP_SER,
340 /*0x2c*/        PSYCHO_IMAP_TIM0,
341 /*0x2d*/        PSYCHO_IMAP_TIM1,
342 /*0x2e*/        PSYCHO_IMAP_UE,
343 /*0x2f*/        PSYCHO_IMAP_CE,
344 /*0x30*/        PSYCHO_IMAP_A_ERR,
345 /*0x31*/        PSYCHO_IMAP_B_ERR,
346 /*0x32*/        PSYCHO_IMAP_PMGMT,
347 /*0x33*/        PSYCHO_IMAP_GFX,
348 /*0x34*/        PSYCHO_IMAP_EUPA,
349 };
350 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
351 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
352 #define psycho_onboard_imap_offset(__ino) \
353         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
354
355 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
356 #define PSYCHO_ICLR_SCSI        0x1800UL
357
358 #define psycho_iclr_offset(ino)                                       \
359         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
360                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
361
362 static unsigned int psycho_irq_build(struct device_node *dp,
363                                      unsigned int ino,
364                                      void *_data)
365 {
366         unsigned long controller_regs = (unsigned long) _data;
367         unsigned long imap, iclr;
368         unsigned long imap_off, iclr_off;
369         int inofixup = 0;
370
371         ino &= 0x3f;
372         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
373                 /* PCI slot */
374                 imap_off = psycho_pcislot_imap_offset(ino);
375         } else {
376                 /* Onboard device */
377                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
378                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
379                         prom_halt();
380                 }
381                 imap_off = psycho_onboard_imap_offset(ino);
382         }
383
384         /* Now build the IRQ bucket. */
385         imap = controller_regs + imap_off;
386         imap += 4;
387
388         iclr_off = psycho_iclr_offset(ino);
389         iclr = controller_regs + iclr_off;
390         iclr += 4;
391
392         if ((ino & 0x20) == 0)
393                 inofixup = ino & 0x03;
394
395         return build_irq(inofixup, iclr, imap);
396 }
397
398 static void psycho_irq_trans_init(struct device_node *dp)
399 {
400         struct linux_prom64_registers *regs;
401
402         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
403         dp->irq_trans->irq_build = psycho_irq_build;
404
405         regs = of_get_property(dp, "reg", NULL);
406         dp->irq_trans->data = (void *) regs[2].phys_addr;
407 }
408
409 #define sabre_read(__reg) \
410 ({      u64 __ret; \
411         __asm__ __volatile__("ldxa [%1] %2, %0" \
412                              : "=r" (__ret) \
413                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
414                              : "memory"); \
415         __ret; \
416 })
417
418 struct sabre_irq_data {
419         unsigned long controller_regs;
420         unsigned int pci_first_busno;
421 };
422 #define SABRE_CONFIGSPACE       0x001000000UL
423 #define SABRE_WRSYNC            0x1c20UL
424
425 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
426         (CONFIG_SPACE | (1UL << 24))
427 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
428         (((unsigned long)(BUS)   << 16) |       \
429          ((unsigned long)(DEVFN) << 8)  |       \
430          ((unsigned long)(REG)))
431
432 /* When a device lives behind a bridge deeper in the PCI bus topology
433  * than APB, a special sequence must run to make sure all pending DMA
434  * transfers at the time of IRQ delivery are visible in the coherency
435  * domain by the cpu.  This sequence is to perform a read on the far
436  * side of the non-APB bridge, then perform a read of Sabre's DMA
437  * write-sync register.
438  */
439 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
440 {
441         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
442         struct sabre_irq_data *irq_data = _arg2;
443         unsigned long controller_regs = irq_data->controller_regs;
444         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
445         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
446         unsigned int bus, devfn;
447         u16 _unused;
448
449         config_space = SABRE_CONFIG_BASE(config_space);
450
451         bus = (phys_hi >> 16) & 0xff;
452         devfn = (phys_hi >> 8) & 0xff;
453
454         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
455
456         __asm__ __volatile__("membar #Sync\n\t"
457                              "lduha [%1] %2, %0\n\t"
458                              "membar #Sync"
459                              : "=r" (_unused)
460                              : "r" ((u16 *) config_space),
461                                "i" (ASI_PHYS_BYPASS_EC_E_L)
462                              : "memory");
463
464         sabre_read(sync_reg);
465 }
466
467 #define SABRE_IMAP_A_SLOT0      0x0c00UL
468 #define SABRE_IMAP_B_SLOT0      0x0c20UL
469 #define SABRE_IMAP_SCSI         0x1000UL
470 #define SABRE_IMAP_ETH          0x1008UL
471 #define SABRE_IMAP_BPP          0x1010UL
472 #define SABRE_IMAP_AU_REC       0x1018UL
473 #define SABRE_IMAP_AU_PLAY      0x1020UL
474 #define SABRE_IMAP_PFAIL        0x1028UL
475 #define SABRE_IMAP_KMS          0x1030UL
476 #define SABRE_IMAP_FLPY         0x1038UL
477 #define SABRE_IMAP_SHW          0x1040UL
478 #define SABRE_IMAP_KBD          0x1048UL
479 #define SABRE_IMAP_MS           0x1050UL
480 #define SABRE_IMAP_SER          0x1058UL
481 #define SABRE_IMAP_UE           0x1070UL
482 #define SABRE_IMAP_CE           0x1078UL
483 #define SABRE_IMAP_PCIERR       0x1080UL
484 #define SABRE_IMAP_GFX          0x1098UL
485 #define SABRE_IMAP_EUPA         0x10a0UL
486 #define SABRE_ICLR_A_SLOT0      0x1400UL
487 #define SABRE_ICLR_B_SLOT0      0x1480UL
488 #define SABRE_ICLR_SCSI         0x1800UL
489 #define SABRE_ICLR_ETH          0x1808UL
490 #define SABRE_ICLR_BPP          0x1810UL
491 #define SABRE_ICLR_AU_REC       0x1818UL
492 #define SABRE_ICLR_AU_PLAY      0x1820UL
493 #define SABRE_ICLR_PFAIL        0x1828UL
494 #define SABRE_ICLR_KMS          0x1830UL
495 #define SABRE_ICLR_FLPY         0x1838UL
496 #define SABRE_ICLR_SHW          0x1840UL
497 #define SABRE_ICLR_KBD          0x1848UL
498 #define SABRE_ICLR_MS           0x1850UL
499 #define SABRE_ICLR_SER          0x1858UL
500 #define SABRE_ICLR_UE           0x1870UL
501 #define SABRE_ICLR_CE           0x1878UL
502 #define SABRE_ICLR_PCIERR       0x1880UL
503
504 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
505 {
506         unsigned int bus =  (ino & 0x10) >> 4;
507         unsigned int slot = (ino & 0x0c) >> 2;
508
509         if (bus == 0)
510                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
511         else
512                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
513 }
514
515 static unsigned long __sabre_onboard_imap_off[] = {
516 /*0x20*/        SABRE_IMAP_SCSI,
517 /*0x21*/        SABRE_IMAP_ETH,
518 /*0x22*/        SABRE_IMAP_BPP,
519 /*0x23*/        SABRE_IMAP_AU_REC,
520 /*0x24*/        SABRE_IMAP_AU_PLAY,
521 /*0x25*/        SABRE_IMAP_PFAIL,
522 /*0x26*/        SABRE_IMAP_KMS,
523 /*0x27*/        SABRE_IMAP_FLPY,
524 /*0x28*/        SABRE_IMAP_SHW,
525 /*0x29*/        SABRE_IMAP_KBD,
526 /*0x2a*/        SABRE_IMAP_MS,
527 /*0x2b*/        SABRE_IMAP_SER,
528 /*0x2c*/        0 /* reserved */,
529 /*0x2d*/        0 /* reserved */,
530 /*0x2e*/        SABRE_IMAP_UE,
531 /*0x2f*/        SABRE_IMAP_CE,
532 /*0x30*/        SABRE_IMAP_PCIERR,
533 /*0x31*/        0 /* reserved */,
534 /*0x32*/        0 /* reserved */,
535 /*0x33*/        SABRE_IMAP_GFX,
536 /*0x34*/        SABRE_IMAP_EUPA,
537 };
538 #define SABRE_ONBOARD_IRQ_BASE          0x20
539 #define SABRE_ONBOARD_IRQ_LAST          0x30
540 #define sabre_onboard_imap_offset(__ino) \
541         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
542
543 #define sabre_iclr_offset(ino)                                        \
544         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
545                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
546
547 static int sabre_device_needs_wsync(struct device_node *dp)
548 {
549         struct device_node *parent = dp->parent;
550         char *parent_model, *parent_compat;
551
552         /* This traversal up towards the root is meant to
553          * handle two cases:
554          *
555          * 1) non-PCI bus sitting under PCI, such as 'ebus'
556          * 2) the PCI controller interrupts themselves, which
557          *    will use the sabre_irq_build but do not need
558          *    the DMA synchronization handling
559          */
560         while (parent) {
561                 if (!strcmp(parent->type, "pci"))
562                         break;
563                 parent = parent->parent;
564         }
565
566         if (!parent)
567                 return 0;
568
569         parent_model = of_get_property(parent,
570                                        "model", NULL);
571         if (parent_model &&
572             (!strcmp(parent_model, "SUNW,sabre") ||
573              !strcmp(parent_model, "SUNW,simba")))
574                 return 0;
575
576         parent_compat = of_get_property(parent,
577                                         "compatible", NULL);
578         if (parent_compat &&
579             (!strcmp(parent_compat, "pci108e,a000") ||
580              !strcmp(parent_compat, "pci108e,a001")))
581                 return 0;
582
583         return 1;
584 }
585
586 static unsigned int sabre_irq_build(struct device_node *dp,
587                                     unsigned int ino,
588                                     void *_data)
589 {
590         struct sabre_irq_data *irq_data = _data;
591         unsigned long controller_regs = irq_data->controller_regs;
592         struct linux_prom_pci_registers *regs;
593         unsigned long imap, iclr;
594         unsigned long imap_off, iclr_off;
595         int inofixup = 0;
596         int virt_irq;
597
598         ino &= 0x3f;
599         if (ino < SABRE_ONBOARD_IRQ_BASE) {
600                 /* PCI slot */
601                 imap_off = sabre_pcislot_imap_offset(ino);
602         } else {
603                 /* onboard device */
604                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
605                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
606                         prom_halt();
607                 }
608                 imap_off = sabre_onboard_imap_offset(ino);
609         }
610
611         /* Now build the IRQ bucket. */
612         imap = controller_regs + imap_off;
613         imap += 4;
614
615         iclr_off = sabre_iclr_offset(ino);
616         iclr = controller_regs + iclr_off;
617         iclr += 4;
618
619         if ((ino & 0x20) == 0)
620                 inofixup = ino & 0x03;
621
622         virt_irq = build_irq(inofixup, iclr, imap);
623
624         /* If the parent device is a PCI<->PCI bridge other than
625          * APB, we have to install a pre-handler to ensure that
626          * all pending DMA is drained before the interrupt handler
627          * is run.
628          */
629         regs = of_get_property(dp, "reg", NULL);
630         if (regs && sabre_device_needs_wsync(dp)) {
631                 irq_install_pre_handler(virt_irq,
632                                         sabre_wsync_handler,
633                                         (void *) (long) regs->phys_hi,
634                                         (void *) irq_data);
635         }
636
637         return virt_irq;
638 }
639
640 static void sabre_irq_trans_init(struct device_node *dp)
641 {
642         struct linux_prom64_registers *regs;
643         struct sabre_irq_data *irq_data;
644         u32 *busrange;
645
646         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
647         dp->irq_trans->irq_build = sabre_irq_build;
648
649         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
650
651         regs = of_get_property(dp, "reg", NULL);
652         irq_data->controller_regs = regs[0].phys_addr;
653
654         busrange = of_get_property(dp, "bus-range", NULL);
655         irq_data->pci_first_busno = busrange[0];
656
657         dp->irq_trans->data = irq_data;
658 }
659
660 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
661  * imap/iclr registers are per-PBM.
662  */
663 #define SCHIZO_IMAP_BASE        0x1000UL
664 #define SCHIZO_ICLR_BASE        0x1400UL
665
666 static unsigned long schizo_imap_offset(unsigned long ino)
667 {
668         return SCHIZO_IMAP_BASE + (ino * 8UL);
669 }
670
671 static unsigned long schizo_iclr_offset(unsigned long ino)
672 {
673         return SCHIZO_ICLR_BASE + (ino * 8UL);
674 }
675
676 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
677                                         unsigned int ino)
678 {
679         return pbm_regs + schizo_iclr_offset(ino) + 4;
680 }
681
682 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
683                                         unsigned int ino)
684 {
685         return pbm_regs + schizo_imap_offset(ino) + 4;
686 }
687
688 #define schizo_read(__reg) \
689 ({      u64 __ret; \
690         __asm__ __volatile__("ldxa [%1] %2, %0" \
691                              : "=r" (__ret) \
692                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
693                              : "memory"); \
694         __ret; \
695 })
696 #define schizo_write(__reg, __val) \
697         __asm__ __volatile__("stxa %0, [%1] %2" \
698                              : /* no outputs */ \
699                              : "r" (__val), "r" (__reg), \
700                                "i" (ASI_PHYS_BYPASS_EC_E) \
701                              : "memory")
702
703 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
704 {
705         unsigned long sync_reg = (unsigned long) _arg2;
706         u64 mask = 1UL << (ino & IMAP_INO);
707         u64 val;
708         int limit;
709
710         schizo_write(sync_reg, mask);
711
712         limit = 100000;
713         val = 0;
714         while (--limit) {
715                 val = schizo_read(sync_reg);
716                 if (!(val & mask))
717                         break;
718         }
719         if (limit <= 0) {
720                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
721                        val, mask);
722         }
723
724         if (_arg1) {
725                 static unsigned char cacheline[64]
726                         __attribute__ ((aligned (64)));
727
728                 __asm__ __volatile__("rd %%fprs, %0\n\t"
729                                      "or %0, %4, %1\n\t"
730                                      "wr %1, 0x0, %%fprs\n\t"
731                                      "stda %%f0, [%5] %6\n\t"
732                                      "wr %0, 0x0, %%fprs\n\t"
733                                      "membar #Sync"
734                                      : "=&r" (mask), "=&r" (val)
735                                      : "0" (mask), "1" (val),
736                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
737                                      "i" (ASI_BLK_COMMIT_P));
738         }
739 }
740
741 struct schizo_irq_data {
742         unsigned long pbm_regs;
743         unsigned long sync_reg;
744         u32 portid;
745         int chip_version;
746 };
747
748 static unsigned int schizo_irq_build(struct device_node *dp,
749                                      unsigned int ino,
750                                      void *_data)
751 {
752         struct schizo_irq_data *irq_data = _data;
753         unsigned long pbm_regs = irq_data->pbm_regs;
754         unsigned long imap, iclr;
755         int ign_fixup;
756         int virt_irq;
757         int is_tomatillo;
758
759         ino &= 0x3f;
760
761         /* Now build the IRQ bucket. */
762         imap = schizo_ino_to_imap(pbm_regs, ino);
763         iclr = schizo_ino_to_iclr(pbm_regs, ino);
764
765         /* On Schizo, no inofixup occurs.  This is because each
766          * INO has it's own IMAP register.  On Psycho and Sabre
767          * there is only one IMAP register for each PCI slot even
768          * though four different INOs can be generated by each
769          * PCI slot.
770          *
771          * But, for JBUS variants (essentially, Tomatillo), we have
772          * to fixup the lowest bit of the interrupt group number.
773          */
774         ign_fixup = 0;
775
776         is_tomatillo = (irq_data->sync_reg != 0UL);
777
778         if (is_tomatillo) {
779                 if (irq_data->portid & 1)
780                         ign_fixup = (1 << 6);
781         }
782
783         virt_irq = build_irq(ign_fixup, iclr, imap);
784
785         if (is_tomatillo) {
786                 irq_install_pre_handler(virt_irq,
787                                         tomatillo_wsync_handler,
788                                         ((irq_data->chip_version <= 4) ?
789                                          (void *) 1 : (void *) 0),
790                                         (void *) irq_data->sync_reg);
791         }
792
793         return virt_irq;
794 }
795
796 static void __schizo_irq_trans_init(struct device_node *dp, int is_tomatillo)
797 {
798         struct linux_prom64_registers *regs;
799         struct schizo_irq_data *irq_data;
800
801         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
802         dp->irq_trans->irq_build = schizo_irq_build;
803
804         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
805
806         regs = of_get_property(dp, "reg", NULL);
807         dp->irq_trans->data = irq_data;
808
809         irq_data->pbm_regs = regs[0].phys_addr;
810         if (is_tomatillo)
811                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
812         else
813                 irq_data->sync_reg = 0UL;
814         irq_data->portid = of_getintprop_default(dp, "portid", 0);
815         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
816 }
817
818 static void schizo_irq_trans_init(struct device_node *dp)
819 {
820         __schizo_irq_trans_init(dp, 0);
821 }
822
823 static void tomatillo_irq_trans_init(struct device_node *dp)
824 {
825         __schizo_irq_trans_init(dp, 1);
826 }
827
828 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
829                                         unsigned int devino,
830                                         void *_data)
831 {
832         u32 devhandle = (u32) (unsigned long) _data;
833
834         return sun4v_build_irq(devhandle, devino);
835 }
836
837 static void pci_sun4v_irq_trans_init(struct device_node *dp)
838 {
839         struct linux_prom64_registers *regs;
840
841         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
842         dp->irq_trans->irq_build = pci_sun4v_irq_build;
843
844         regs = of_get_property(dp, "reg", NULL);
845         dp->irq_trans->data = (void *) (unsigned long)
846                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
847 }
848 #endif /* CONFIG_PCI */
849
850 #ifdef CONFIG_SBUS
851 /* INO number to IMAP register offset for SYSIO external IRQ's.
852  * This should conform to both Sunfire/Wildfire server and Fusion
853  * desktop designs.
854  */
855 #define SYSIO_IMAP_SLOT0        0x2c04UL
856 #define SYSIO_IMAP_SLOT1        0x2c0cUL
857 #define SYSIO_IMAP_SLOT2        0x2c14UL
858 #define SYSIO_IMAP_SLOT3        0x2c1cUL
859 #define SYSIO_IMAP_SCSI         0x3004UL
860 #define SYSIO_IMAP_ETH          0x300cUL
861 #define SYSIO_IMAP_BPP          0x3014UL
862 #define SYSIO_IMAP_AUDIO        0x301cUL
863 #define SYSIO_IMAP_PFAIL        0x3024UL
864 #define SYSIO_IMAP_KMS          0x302cUL
865 #define SYSIO_IMAP_FLPY         0x3034UL
866 #define SYSIO_IMAP_SHW          0x303cUL
867 #define SYSIO_IMAP_KBD          0x3044UL
868 #define SYSIO_IMAP_MS           0x304cUL
869 #define SYSIO_IMAP_SER          0x3054UL
870 #define SYSIO_IMAP_TIM0         0x3064UL
871 #define SYSIO_IMAP_TIM1         0x306cUL
872 #define SYSIO_IMAP_UE           0x3074UL
873 #define SYSIO_IMAP_CE           0x307cUL
874 #define SYSIO_IMAP_SBERR        0x3084UL
875 #define SYSIO_IMAP_PMGMT        0x308cUL
876 #define SYSIO_IMAP_GFX          0x3094UL
877 #define SYSIO_IMAP_EUPA         0x309cUL
878
879 #define bogon     ((unsigned long) -1)
880 static unsigned long sysio_irq_offsets[] = {
881         /* SBUS Slot 0 --> 3, level 1 --> 7 */
882         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
883         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
884         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
885         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
886         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
887         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
888         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
889         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
890
891         /* Onboard devices (not relevant/used on SunFire). */
892         SYSIO_IMAP_SCSI,
893         SYSIO_IMAP_ETH,
894         SYSIO_IMAP_BPP,
895         bogon,
896         SYSIO_IMAP_AUDIO,
897         SYSIO_IMAP_PFAIL,
898         bogon,
899         bogon,
900         SYSIO_IMAP_KMS,
901         SYSIO_IMAP_FLPY,
902         SYSIO_IMAP_SHW,
903         SYSIO_IMAP_KBD,
904         SYSIO_IMAP_MS,
905         SYSIO_IMAP_SER,
906         bogon,
907         bogon,
908         SYSIO_IMAP_TIM0,
909         SYSIO_IMAP_TIM1,
910         bogon,
911         bogon,
912         SYSIO_IMAP_UE,
913         SYSIO_IMAP_CE,
914         SYSIO_IMAP_SBERR,
915         SYSIO_IMAP_PMGMT,
916         SYSIO_IMAP_GFX,
917         SYSIO_IMAP_EUPA,
918 };
919
920 #undef bogon
921
922 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
923
924 /* Convert Interrupt Mapping register pointer to associated
925  * Interrupt Clear register pointer, SYSIO specific version.
926  */
927 #define SYSIO_ICLR_UNUSED0      0x3400UL
928 #define SYSIO_ICLR_SLOT0        0x340cUL
929 #define SYSIO_ICLR_SLOT1        0x344cUL
930 #define SYSIO_ICLR_SLOT2        0x348cUL
931 #define SYSIO_ICLR_SLOT3        0x34ccUL
932 static unsigned long sysio_imap_to_iclr(unsigned long imap)
933 {
934         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
935         return imap + diff;
936 }
937
938 static unsigned int sbus_of_build_irq(struct device_node *dp,
939                                       unsigned int ino,
940                                       void *_data)
941 {
942         unsigned long reg_base = (unsigned long) _data;
943         struct linux_prom_registers *regs;
944         unsigned long imap, iclr;
945         int sbus_slot = 0;
946         int sbus_level = 0;
947
948         ino &= 0x3f;
949
950         regs = of_get_property(dp, "reg", NULL);
951         if (regs)
952                 sbus_slot = regs->which_io;
953
954         if (ino < 0x20)
955                 ino += (sbus_slot * 8);
956
957         imap = sysio_irq_offsets[ino];
958         if (imap == ((unsigned long)-1)) {
959                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
960                             ino);
961                 prom_halt();
962         }
963         imap += reg_base;
964
965         /* SYSIO inconsistency.  For external SLOTS, we have to select
966          * the right ICLR register based upon the lower SBUS irq level
967          * bits.
968          */
969         if (ino >= 0x20) {
970                 iclr = sysio_imap_to_iclr(imap);
971         } else {
972                 sbus_level = ino & 0x7;
973
974                 switch(sbus_slot) {
975                 case 0:
976                         iclr = reg_base + SYSIO_ICLR_SLOT0;
977                         break;
978                 case 1:
979                         iclr = reg_base + SYSIO_ICLR_SLOT1;
980                         break;
981                 case 2:
982                         iclr = reg_base + SYSIO_ICLR_SLOT2;
983                         break;
984                 default:
985                 case 3:
986                         iclr = reg_base + SYSIO_ICLR_SLOT3;
987                         break;
988                 };
989
990                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
991         }
992         return build_irq(sbus_level, iclr, imap);
993 }
994
995 static void sbus_irq_trans_init(struct device_node *dp)
996 {
997         struct linux_prom64_registers *regs;
998
999         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1000         dp->irq_trans->irq_build = sbus_of_build_irq;
1001
1002         regs = of_get_property(dp, "reg", NULL);
1003         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
1004 }
1005 #endif /* CONFIG_SBUS */
1006
1007
1008 static unsigned int central_build_irq(struct device_node *dp,
1009                                       unsigned int ino,
1010                                       void *_data)
1011 {
1012         struct device_node *central_dp = _data;
1013         struct of_device *central_op = of_find_device_by_node(central_dp);
1014         struct resource *res;
1015         unsigned long imap, iclr;
1016         u32 tmp;
1017
1018         if (!strcmp(dp->name, "eeprom")) {
1019                 res = &central_op->resource[5];
1020         } else if (!strcmp(dp->name, "zs")) {
1021                 res = &central_op->resource[4];
1022         } else if (!strcmp(dp->name, "clock-board")) {
1023                 res = &central_op->resource[3];
1024         } else {
1025                 return ino;
1026         }
1027
1028         imap = res->start + 0x00UL;
1029         iclr = res->start + 0x10UL;
1030
1031         /* Set the INO state to idle, and disable.  */
1032         upa_writel(0, iclr);
1033         upa_readl(iclr);
1034
1035         tmp = upa_readl(imap);
1036         tmp &= ~0x80000000;
1037         upa_writel(tmp, imap);
1038
1039         return build_irq(0, iclr, imap);
1040 }
1041
1042 static void central_irq_trans_init(struct device_node *dp)
1043 {
1044         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1045         dp->irq_trans->irq_build = central_build_irq;
1046
1047         dp->irq_trans->data = dp;
1048 }
1049
1050 struct irq_trans {
1051         const char *name;
1052         void (*init)(struct device_node *);
1053 };
1054
1055 #ifdef CONFIG_PCI
1056 static struct irq_trans pci_irq_trans_table[] = {
1057         { "SUNW,sabre", sabre_irq_trans_init },
1058         { "pci108e,a000", sabre_irq_trans_init },
1059         { "pci108e,a001", sabre_irq_trans_init },
1060         { "SUNW,psycho", psycho_irq_trans_init },
1061         { "pci108e,8000", psycho_irq_trans_init },
1062         { "SUNW,schizo", schizo_irq_trans_init },
1063         { "pci108e,8001", schizo_irq_trans_init },
1064         { "SUNW,schizo+", schizo_irq_trans_init },
1065         { "pci108e,8002", schizo_irq_trans_init },
1066         { "SUNW,tomatillo", tomatillo_irq_trans_init },
1067         { "pci108e,a801", tomatillo_irq_trans_init },
1068         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1069 };
1070 #endif
1071
1072 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1073                                          unsigned int devino,
1074                                          void *_data)
1075 {
1076         u32 devhandle = (u32) (unsigned long) _data;
1077
1078         return sun4v_build_irq(devhandle, devino);
1079 }
1080
1081 static void sun4v_vdev_irq_trans_init(struct device_node *dp)
1082 {
1083         struct linux_prom64_registers *regs;
1084
1085         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1086         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1087
1088         regs = of_get_property(dp, "reg", NULL);
1089         dp->irq_trans->data = (void *) (unsigned long)
1090                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1091 }
1092
1093 static void irq_trans_init(struct device_node *dp)
1094 {
1095 #ifdef CONFIG_PCI
1096         const char *model;
1097         int i;
1098 #endif
1099
1100 #ifdef CONFIG_PCI
1101         model = of_get_property(dp, "model", NULL);
1102         if (!model)
1103                 model = of_get_property(dp, "compatible", NULL);
1104         if (model) {
1105                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1106                         struct irq_trans *t = &pci_irq_trans_table[i];
1107
1108                         if (!strcmp(model, t->name))
1109                                 return t->init(dp);
1110                 }
1111         }
1112 #endif
1113 #ifdef CONFIG_SBUS
1114         if (!strcmp(dp->name, "sbus") ||
1115             !strcmp(dp->name, "sbi"))
1116                 return sbus_irq_trans_init(dp);
1117 #endif
1118         if (!strcmp(dp->name, "fhc") &&
1119             !strcmp(dp->parent->name, "central"))
1120                 return central_irq_trans_init(dp);
1121         if (!strcmp(dp->name, "virtual-devices"))
1122                 return sun4v_vdev_irq_trans_init(dp);
1123 }
1124
1125 static int is_root_node(const struct device_node *dp)
1126 {
1127         if (!dp)
1128                 return 0;
1129
1130         return (dp->parent == NULL);
1131 }
1132
1133 /* The following routines deal with the black magic of fully naming a
1134  * node.
1135  *
1136  * Certain well known named nodes are just the simple name string.
1137  *
1138  * Actual devices have an address specifier appended to the base name
1139  * string, like this "foo@addr".  The "addr" can be in any number of
1140  * formats, and the platform plus the type of the node determine the
1141  * format and how it is constructed.
1142  *
1143  * For children of the ROOT node, the naming convention is fixed and
1144  * determined by whether this is a sun4u or sun4v system.
1145  *
1146  * For children of other nodes, it is bus type specific.  So
1147  * we walk up the tree until we discover a "device_type" property
1148  * we recognize and we go from there.
1149  *
1150  * As an example, the boot device on my workstation has a full path:
1151  *
1152  *      /pci@1e,600000/ide@d/disk@0,0:c
1153  */
1154 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1155 {
1156         struct linux_prom64_registers *regs;
1157         struct property *rprop;
1158         u32 high_bits, low_bits, type;
1159
1160         rprop = of_find_property(dp, "reg", NULL);
1161         if (!rprop)
1162                 return;
1163
1164         regs = rprop->value;
1165         if (!is_root_node(dp->parent)) {
1166                 sprintf(tmp_buf, "%s@%x,%x",
1167                         dp->name,
1168                         (unsigned int) (regs->phys_addr >> 32UL),
1169                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1170                 return;
1171         }
1172
1173         type = regs->phys_addr >> 60UL;
1174         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1175         low_bits = (regs->phys_addr & 0xffffffffUL);
1176
1177         if (type == 0 || type == 8) {
1178                 const char *prefix = (type == 0) ? "m" : "i";
1179
1180                 if (low_bits)
1181                         sprintf(tmp_buf, "%s@%s%x,%x",
1182                                 dp->name, prefix,
1183                                 high_bits, low_bits);
1184                 else
1185                         sprintf(tmp_buf, "%s@%s%x",
1186                                 dp->name,
1187                                 prefix,
1188                                 high_bits);
1189         } else if (type == 12) {
1190                 sprintf(tmp_buf, "%s@%x",
1191                         dp->name, high_bits);
1192         }
1193 }
1194
1195 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1196 {
1197         struct linux_prom64_registers *regs;
1198         struct property *prop;
1199
1200         prop = of_find_property(dp, "reg", NULL);
1201         if (!prop)
1202                 return;
1203
1204         regs = prop->value;
1205         if (!is_root_node(dp->parent)) {
1206                 sprintf(tmp_buf, "%s@%x,%x",
1207                         dp->name,
1208                         (unsigned int) (regs->phys_addr >> 32UL),
1209                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1210                 return;
1211         }
1212
1213         prop = of_find_property(dp, "upa-portid", NULL);
1214         if (!prop)
1215                 prop = of_find_property(dp, "portid", NULL);
1216         if (prop) {
1217                 unsigned long mask = 0xffffffffUL;
1218
1219                 if (tlb_type >= cheetah)
1220                         mask = 0x7fffff;
1221
1222                 sprintf(tmp_buf, "%s@%x,%x",
1223                         dp->name,
1224                         *(u32 *)prop->value,
1225                         (unsigned int) (regs->phys_addr & mask));
1226         }
1227 }
1228
1229 /* "name@slot,offset"  */
1230 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1231 {
1232         struct linux_prom_registers *regs;
1233         struct property *prop;
1234
1235         prop = of_find_property(dp, "reg", NULL);
1236         if (!prop)
1237                 return;
1238
1239         regs = prop->value;
1240         sprintf(tmp_buf, "%s@%x,%x",
1241                 dp->name,
1242                 regs->which_io,
1243                 regs->phys_addr);
1244 }
1245
1246 /* "name@devnum[,func]" */
1247 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1248 {
1249         struct linux_prom_pci_registers *regs;
1250         struct property *prop;
1251         unsigned int devfn;
1252
1253         prop = of_find_property(dp, "reg", NULL);
1254         if (!prop)
1255                 return;
1256
1257         regs = prop->value;
1258         devfn = (regs->phys_hi >> 8) & 0xff;
1259         if (devfn & 0x07) {
1260                 sprintf(tmp_buf, "%s@%x,%x",
1261                         dp->name,
1262                         devfn >> 3,
1263                         devfn & 0x07);
1264         } else {
1265                 sprintf(tmp_buf, "%s@%x",
1266                         dp->name,
1267                         devfn >> 3);
1268         }
1269 }
1270
1271 /* "name@UPA_PORTID,offset" */
1272 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1273 {
1274         struct linux_prom64_registers *regs;
1275         struct property *prop;
1276
1277         prop = of_find_property(dp, "reg", NULL);
1278         if (!prop)
1279                 return;
1280
1281         regs = prop->value;
1282
1283         prop = of_find_property(dp, "upa-portid", NULL);
1284         if (!prop)
1285                 return;
1286
1287         sprintf(tmp_buf, "%s@%x,%x",
1288                 dp->name,
1289                 *(u32 *) prop->value,
1290                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1291 }
1292
1293 /* "name@reg" */
1294 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1295 {
1296         struct property *prop;
1297         u32 *regs;
1298
1299         prop = of_find_property(dp, "reg", NULL);
1300         if (!prop)
1301                 return;
1302
1303         regs = prop->value;
1304
1305         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1306 }
1307
1308 /* "name@addrhi,addrlo" */
1309 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1310 {
1311         struct linux_prom64_registers *regs;
1312         struct property *prop;
1313
1314         prop = of_find_property(dp, "reg", NULL);
1315         if (!prop)
1316                 return;
1317
1318         regs = prop->value;
1319
1320         sprintf(tmp_buf, "%s@%x,%x",
1321                 dp->name,
1322                 (unsigned int) (regs->phys_addr >> 32UL),
1323                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1324 }
1325
1326 /* "name@bus,addr" */
1327 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1328 {
1329         struct property *prop;
1330         u32 *regs;
1331
1332         prop = of_find_property(dp, "reg", NULL);
1333         if (!prop)
1334                 return;
1335
1336         regs = prop->value;
1337
1338         /* This actually isn't right... should look at the #address-cells
1339          * property of the i2c bus node etc. etc.
1340          */
1341         sprintf(tmp_buf, "%s@%x,%x",
1342                 dp->name, regs[0], regs[1]);
1343 }
1344
1345 /* "name@reg0[,reg1]" */
1346 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1347 {
1348         struct property *prop;
1349         u32 *regs;
1350
1351         prop = of_find_property(dp, "reg", NULL);
1352         if (!prop)
1353                 return;
1354
1355         regs = prop->value;
1356
1357         if (prop->length == sizeof(u32) || regs[1] == 1) {
1358                 sprintf(tmp_buf, "%s@%x",
1359                         dp->name, regs[0]);
1360         } else {
1361                 sprintf(tmp_buf, "%s@%x,%x",
1362                         dp->name, regs[0], regs[1]);
1363         }
1364 }
1365
1366 /* "name@reg0reg1[,reg2reg3]" */
1367 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1368 {
1369         struct property *prop;
1370         u32 *regs;
1371
1372         prop = of_find_property(dp, "reg", NULL);
1373         if (!prop)
1374                 return;
1375
1376         regs = prop->value;
1377
1378         if (regs[2] || regs[3]) {
1379                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1380                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1381         } else {
1382                 sprintf(tmp_buf, "%s@%08x%08x",
1383                         dp->name, regs[0], regs[1]);
1384         }
1385 }
1386
1387 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1388 {
1389         struct device_node *parent = dp->parent;
1390
1391         if (parent != NULL) {
1392                 if (!strcmp(parent->type, "pci") ||
1393                     !strcmp(parent->type, "pciex"))
1394                         return pci_path_component(dp, tmp_buf);
1395                 if (!strcmp(parent->type, "sbus"))
1396                         return sbus_path_component(dp, tmp_buf);
1397                 if (!strcmp(parent->type, "upa"))
1398                         return upa_path_component(dp, tmp_buf);
1399                 if (!strcmp(parent->type, "ebus"))
1400                         return ebus_path_component(dp, tmp_buf);
1401                 if (!strcmp(parent->name, "usb") ||
1402                     !strcmp(parent->name, "hub"))
1403                         return usb_path_component(dp, tmp_buf);
1404                 if (!strcmp(parent->type, "i2c"))
1405                         return i2c_path_component(dp, tmp_buf);
1406                 if (!strcmp(parent->type, "firewire"))
1407                         return ieee1394_path_component(dp, tmp_buf);
1408                 if (!strcmp(parent->type, "virtual-devices"))
1409                         return vdev_path_component(dp, tmp_buf);
1410
1411                 /* "isa" is handled with platform naming */
1412         }
1413
1414         /* Use platform naming convention.  */
1415         if (tlb_type == hypervisor)
1416                 return sun4v_path_component(dp, tmp_buf);
1417         else
1418                 return sun4u_path_component(dp, tmp_buf);
1419 }
1420
1421 static char * __init build_path_component(struct device_node *dp)
1422 {
1423         char tmp_buf[64], *n;
1424
1425         tmp_buf[0] = '\0';
1426         __build_path_component(dp, tmp_buf);
1427         if (tmp_buf[0] == '\0')
1428                 strcpy(tmp_buf, dp->name);
1429
1430         n = prom_early_alloc(strlen(tmp_buf) + 1);
1431         strcpy(n, tmp_buf);
1432
1433         return n;
1434 }
1435
1436 static char * __init build_full_name(struct device_node *dp)
1437 {
1438         int len, ourlen, plen;
1439         char *n;
1440
1441         plen = strlen(dp->parent->full_name);
1442         ourlen = strlen(dp->path_component_name);
1443         len = ourlen + plen + 2;
1444
1445         n = prom_early_alloc(len);
1446         strcpy(n, dp->parent->full_name);
1447         if (!is_root_node(dp->parent)) {
1448                 strcpy(n + plen, "/");
1449                 plen++;
1450         }
1451         strcpy(n + plen, dp->path_component_name);
1452
1453         return n;
1454 }
1455
1456 static unsigned int unique_id;
1457
1458 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1459 {
1460         static struct property *tmp = NULL;
1461         struct property *p;
1462
1463         if (tmp) {
1464                 p = tmp;
1465                 memset(p, 0, sizeof(*p) + 32);
1466                 tmp = NULL;
1467         } else {
1468                 p = prom_early_alloc(sizeof(struct property) + 32);
1469                 p->unique_id = unique_id++;
1470         }
1471
1472         p->name = (char *) (p + 1);
1473         if (special_name) {
1474                 strcpy(p->name, special_name);
1475                 p->length = special_len;
1476                 p->value = prom_early_alloc(special_len);
1477                 memcpy(p->value, special_val, special_len);
1478         } else {
1479                 if (prev == NULL) {
1480                         prom_firstprop(node, p->name);
1481                 } else {
1482                         prom_nextprop(node, prev, p->name);
1483                 }
1484                 if (strlen(p->name) == 0) {
1485                         tmp = p;
1486                         return NULL;
1487                 }
1488                 p->length = prom_getproplen(node, p->name);
1489                 if (p->length <= 0) {
1490                         p->length = 0;
1491                 } else {
1492                         p->value = prom_early_alloc(p->length + 1);
1493                         prom_getproperty(node, p->name, p->value, p->length);
1494                         ((unsigned char *)p->value)[p->length] = '\0';
1495                 }
1496         }
1497         return p;
1498 }
1499
1500 static struct property * __init build_prop_list(phandle node)
1501 {
1502         struct property *head, *tail;
1503
1504         head = tail = build_one_prop(node, NULL,
1505                                      ".node", &node, sizeof(node));
1506
1507         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1508         tail = tail->next;
1509         while(tail) {
1510                 tail->next = build_one_prop(node, tail->name,
1511                                             NULL, NULL, 0);
1512                 tail = tail->next;
1513         }
1514
1515         return head;
1516 }
1517
1518 static char * __init get_one_property(phandle node, const char *name)
1519 {
1520         char *buf = "<NULL>";
1521         int len;
1522
1523         len = prom_getproplen(node, name);
1524         if (len > 0) {
1525                 buf = prom_early_alloc(len);
1526                 prom_getproperty(node, name, buf, len);
1527         }
1528
1529         return buf;
1530 }
1531
1532 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1533 {
1534         struct device_node *dp;
1535
1536         if (!node)
1537                 return NULL;
1538
1539         dp = prom_early_alloc(sizeof(*dp));
1540         dp->unique_id = unique_id++;
1541         dp->parent = parent;
1542
1543         kref_init(&dp->kref);
1544
1545         dp->name = get_one_property(node, "name");
1546         dp->type = get_one_property(node, "device_type");
1547         dp->node = node;
1548
1549         dp->properties = build_prop_list(node);
1550
1551         irq_trans_init(dp);
1552
1553         return dp;
1554 }
1555
1556 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1557 {
1558         struct device_node *dp;
1559
1560         dp = create_node(node, parent);
1561         if (dp) {
1562                 *(*nextp) = dp;
1563                 *nextp = &dp->allnext;
1564
1565                 dp->path_component_name = build_path_component(dp);
1566                 dp->full_name = build_full_name(dp);
1567
1568                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1569
1570                 dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
1571         }
1572
1573         return dp;
1574 }
1575
1576 void __init prom_build_devicetree(void)
1577 {
1578         struct device_node **nextp;
1579
1580         allnodes = create_node(prom_root_node, NULL);
1581         allnodes->path_component_name = "";
1582         allnodes->full_name = "/";
1583
1584         nextp = &allnodes->allnext;
1585         allnodes->child = build_tree(allnodes,
1586                                      prom_getchild(allnodes->node),
1587                                      &nextp);
1588         printk("PROM: Built device tree with %u bytes of memory.\n",
1589                prom_early_allocated);
1590 }