git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/boot/dts/kuroboxHG.dts

   1 /*
   2  * Device Tree Souce for Buffalo KuroboxHG
   3  *
   4  * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use
   5  * the default configuration linkstation_defconfig.
   6  *
   7  * Based on sandpoint.dts
   8  *
   9  * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
  10  * Copyright 2008 Freescale Semiconductor, Inc.
  11  *
  12  * This file is licensed under
  13  * the terms of the GNU General Public License version 2.  This program
  14  * is licensed "as is" without any warranty of any kind, whether express
  15  * or implied.
  16
  17 XXXX add flash parts, rtc, ??
  18
  19  */
  20
  21 /dts-v1/;
  22
  23 / {
  24         model = "KuroboxHG";
  25         compatible = "linkstation";
  26         #address-cells = <1>;
  27         #size-cells = <1>;
  28
  29         aliases {
  30                 serial0 = &serial0;
  31                 serial1 = &serial1;
  32                 pci0 = &pci0;
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 PowerPC,603e { /* Really 8241 */
  40                         device_type = "cpu";
  41                         reg = <0x0>;
  42                         clock-frequency = <266000000>;  /* Fixed by bootloader */
  43                         timebase-frequency = <32522240>; /* Fixed by bootloader */
  44                         bus-frequency = <0>;            /* Fixed by bootloader */
  45                         /* Following required by dtc but not used */
  46                         i-cache-size = <0x4000>;
  47                         d-cache-size = <0x4000>;
  48                 };
  49         };
  50
  51         memory {
  52                 device_type = "memory";
  53                 reg = <0x0 0x8000000>;
  54         };
  55
  56         soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
  57                 #address-cells = <1>;
  58                 #size-cells = <1>;
  59                 device_type = "soc";
  60                 compatible = "mpc10x";
  61                 store-gathering = <0>; /* 0 == off, !0 == on */
  62                 reg = <0x80000000 0x100000>;
  63                 ranges = <0x80000000 0x80000000 0x70000000      /* pci mem space */
  64                           0xfc000000 0xfc000000 0x100000        /* EUMB */
  65                           0xfe000000 0xfe000000 0xc00000        /* pci i/o space */
  66                           0xfec00000 0xfec00000 0x300000        /* pci cfg regs */
  67                           0xfef00000 0xfef00000 0x100000>;      /* pci iack */
  68
  69                 i2c@80003000 {
  70                         #address-cells = <1>;
  71                         #size-cells = <0>;
  72                         cell-index = <0>;
  73                         compatible = "fsl-i2c";
  74                         reg = <0x80003000 0x1000>;
  75                         interrupts = <5 2>;
  76                         interrupt-parent = <&mpic>;
  77
  78                         rtc@32 {
  79                                 device_type = "rtc";
  80                                 compatible = "ricoh,rs5c372a";
  81                                 reg = <0x32>;
  82                         };
  83                 };
  84
  85                 serial0: serial@80004500 {
  86                         cell-index = <0>;
  87                         device_type = "serial";
  88                         compatible = "ns16550";
  89                         reg = <0x80004500 0x8>;
  90                         clock-frequency = <130041000>;
  91                         current-speed = <9600>;
  92                         interrupts = <9 0>;
  93                         interrupt-parent = <&mpic>;
  94                 };
  95
  96                 serial1: serial@80004600 {
  97                         cell-index = <1>;
  98                         device_type = "serial";
  99                         compatible = "ns16550";
 100                         reg = <0x80004600 0x8>;
 101                         clock-frequency = <130041000>;
 102                         current-speed = <57600>;
 103                         interrupts = <10 0>;
 104                         interrupt-parent = <&mpic>;
 105                 };
 106
 107                 mpic: interrupt-controller@80040000 {
 108                         #interrupt-cells = <2>;
 109                         #address-cells = <0>;
 110                         device_type = "open-pic";
 111                         compatible = "chrp,open-pic";
 112                         interrupt-controller;
 113                         reg = <0x80040000 0x40000>;
 114                 };
 115
 116                 pci0: pci@fec00000 {
 117                         #address-cells = <3>;
 118                         #size-cells = <2>;
 119                         #interrupt-cells = <1>;
 120                         device_type = "pci";
 121                         compatible = "mpc10x-pci";
 122                         reg = <0xfec00000 0x400000>;
 123                         ranges = <0x1000000 0x0        0x0 0xfe000000 0x0 0xc00000
 124                                   0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
 125                         bus-range = <0 255>;
 126                         clock-frequency = <133333333>;
 127                         interrupt-parent = <&mpic>;
 128                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 129                         interrupt-map = <
 130                                 /* IDSEL 11 - IRQ0 ETH */
 131                                 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
 132                                 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
 133                                 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
 134                                 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
 135                                 /* IDSEL 12 - IRQ1 IDE0 */
 136                                 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
 137                                 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
 138                                 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
 139                                 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
 140                                 /* IDSEL 14 - IRQ3 USB2.0 */
 141                                 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
 142                                 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
 143                                 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
 144                                 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
 145                         >;
 146                 };
 147         };
 148 };