2 * arch/arm/mach-iop32x/irq.c
4 * Generic IOP32X IRQ handling functionality
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <asm/mach/irq.h>
19 #include <asm/hardware.h>
20 #include <asm/mach-types.h>
22 static u32 iop32x_mask;
24 static inline void intctl_write(u32 val)
27 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
31 static inline void intstr_write(u32 val)
34 asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val));
39 iop32x_irq_mask(unsigned int irq)
41 iop32x_mask &= ~(1 << irq);
42 intctl_write(iop32x_mask);
46 iop32x_irq_unmask(unsigned int irq)
48 iop32x_mask |= 1 << irq;
49 intctl_write(iop32x_mask);
52 struct irq_chip ext_chip = {
54 .ack = iop32x_irq_mask,
55 .mask = iop32x_irq_mask,
56 .unmask = iop32x_irq_unmask,
59 void __init iop32x_init_irq(void)
63 iop_init_cp6_handler();
67 if (machine_is_glantank() ||
68 machine_is_iq80321() ||
69 machine_is_iq31244() ||
71 *IOP3XX_PCIIRSR = 0x0f;
73 for (i = 0; i < NR_IRQS; i++) {
74 set_irq_chip(i, &ext_chip);
75 set_irq_handler(i, handle_level_irq);
76 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);