2 * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
5 * MPC832xE MDS board specific routines.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
13 #include <linux/stddef.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/errno.h>
17 #include <linux/reboot.h>
18 #include <linux/pci.h>
19 #include <linux/kdev_t.h>
20 #include <linux/major.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/seq_file.h>
24 #include <linux/root_dev.h>
25 #include <linux/initrd.h>
26 #include <linux/of_platform.h>
27 #include <linux/of_device.h>
29 #include <asm/system.h>
30 #include <asm/atomic.h>
33 #include <asm/machdep.h>
38 #include <sysdev/fsl_soc.h>
39 #include <sysdev/fsl_pci.h>
41 #include <asm/qe_ic.h>
47 #define DBG(fmt...) udbg_printf(fmt)
52 /* ************************************************************************
54 * Setup the architecture
57 static void __init mpc832x_sys_setup_arch(void)
59 struct device_node *np;
60 u8 __iomem *bcsr_regs = NULL;
63 ppc_md.progress("mpc832x_sys_setup_arch()", 0);
66 np = of_find_node_by_name(NULL, "bcsr");
70 of_address_to_resource(np, 0, &res);
71 bcsr_regs = ioremap(res.start, res.end - res.start +1);
76 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
77 mpc83xx_add_bridge(np);
80 #ifdef CONFIG_QUICC_ENGINE
83 if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
87 for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
91 if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
93 /* Reset the Ethernet PHYs */
94 #define BCSR8_FETH_RST 0x50
95 clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
97 setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
101 #endif /* CONFIG_QUICC_ENGINE */
104 static struct of_device_id mpc832x_ids[] = {
106 { .compatible = "soc", },
107 { .compatible = "simple-bus", },
109 { .compatible = "fsl,qe", },
113 static int __init mpc832x_declare_of_platform_devices(void)
115 /* Publish the QE devices */
116 of_platform_bus_probe(NULL, mpc832x_ids, NULL);
120 machine_device_initcall(mpc832x_mds, mpc832x_declare_of_platform_devices);
122 static void __init mpc832x_sys_init_IRQ(void)
124 struct device_node *np;
126 np = of_find_node_by_type(NULL, "ipic");
132 /* Initialize the default interrupt mapping priorities,
133 * in case the boot rom changed something on us.
135 ipic_set_default_priority();
138 #ifdef CONFIG_QUICC_ENGINE
139 np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
141 np = of_find_node_by_type(NULL, "qeic");
145 qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
147 #endif /* CONFIG_QUICC_ENGINE */
151 * Called very early, MMU is off, device-tree isn't unflattened
153 static int __init mpc832x_sys_probe(void)
155 unsigned long root = of_get_flat_dt_root();
157 return of_flat_dt_is_compatible(root, "MPC832xMDS");
160 define_machine(mpc832x_mds) {
161 .name = "MPC832x MDS",
162 .probe = mpc832x_sys_probe,
163 .setup_arch = mpc832x_sys_setup_arch,
164 .init_IRQ = mpc832x_sys_init_IRQ,
165 .get_irq = ipic_get_irq,
166 .restart = mpc83xx_restart,
167 .time_init = mpc83xx_time_init,
168 .calibrate_decr = generic_calibrate_decr,
169 .progress = udbg_progress,