2 * Copyright (C) 2003 PMC-Sierra Inc.
3 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
5 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 #include <linux/bcd.h>
28 #include <linux/init.h>
29 #include <linux/kernel.h>
30 #include <linux/types.h>
32 #include <linux/bootmem.h>
33 #include <linux/swap.h>
34 #include <linux/ioport.h>
35 #include <linux/sched.h>
36 #include <linux/interrupt.h>
37 #include <linux/timex.h>
38 #include <linux/termios.h>
39 #include <linux/tty.h>
40 #include <linux/serial.h>
41 #include <linux/serial_core.h>
44 #include <asm/bootinfo.h>
48 #include <asm/processor.h>
49 #include <asm/reboot.h>
50 #include <asm/serial.h>
51 #include <asm/titan_dep.h>
52 #include <asm/m48t37.h>
56 unsigned char titan_ge_mac_addr_base[6] = {
57 // 0x00, 0x03, 0xcc, 0x1d, 0x22, 0x00
58 0x00, 0xe0, 0x04, 0x00, 0x00, 0x21
61 unsigned long cpu_clock;
62 unsigned long yosemite_base;
64 static struct m48t37_rtc *m48t37_base;
66 void __init bus_error_init(void)
72 unsigned long m48t37y_get_time(void)
74 unsigned int year, month, day, hour, min, sec;
77 spin_lock_irqsave(&rtc_lock, flags);
78 /* Stop the update to the time */
79 m48t37_base->control = 0x40;
81 year = BCD2BIN(m48t37_base->year);
82 year += BCD2BIN(m48t37_base->century) * 100;
84 month = BCD2BIN(m48t37_base->month);
85 day = BCD2BIN(m48t37_base->date);
86 hour = BCD2BIN(m48t37_base->hour);
87 min = BCD2BIN(m48t37_base->min);
88 sec = BCD2BIN(m48t37_base->sec);
90 /* Start the update to the time again */
91 m48t37_base->control = 0x00;
92 spin_unlock_irqrestore(&rtc_lock, flags);
94 return mktime(year, month, day, hour, min, sec);
97 int m48t37y_set_time(unsigned long sec)
102 /* convert to a more useful format -- note months count from 0 */
106 spin_lock_irqsave(&rtc_lock, flags);
108 m48t37_base->control = 0x80;
111 m48t37_base->year = BIN2BCD(tm.tm_year % 100);
112 m48t37_base->century = BIN2BCD(tm.tm_year / 100);
115 m48t37_base->month = BIN2BCD(tm.tm_mon);
118 m48t37_base->date = BIN2BCD(tm.tm_mday);
121 m48t37_base->hour = BIN2BCD(tm.tm_hour);
122 m48t37_base->min = BIN2BCD(tm.tm_min);
123 m48t37_base->sec = BIN2BCD(tm.tm_sec);
125 /* day of week -- not really used, but let's keep it up-to-date */
126 m48t37_base->day = BIN2BCD(tm.tm_wday + 1);
128 /* disable writing */
129 m48t37_base->control = 0x00;
130 spin_unlock_irqrestore(&rtc_lock, flags);
135 void __init plat_timer_setup(struct irqaction *irq)
140 void yosemite_time_init(void)
142 mips_hpt_frequency = cpu_clock / 2;
143 mips_hpt_frequency = 33000000 * 3 * 5;
146 /* No other usable initialization hook than this ... */
147 extern void (*late_time_init)(void);
149 unsigned long ocd_base;
151 EXPORT_SYMBOL(ocd_base);
154 * Common setup before any secondaries are started
157 #define TITAN_UART_CLK 3686400
158 #define TITAN_SERIAL_BASE_BAUD (TITAN_UART_CLK / 16)
159 #define TITAN_SERIAL_IRQ 4
160 #define TITAN_SERIAL_BASE 0xfd000008UL
162 static void __init py_map_ocd(void)
164 ocd_base = (unsigned long) ioremap(OCD_BASE, OCD_SIZE);
166 panic("Mapping OCD failed - game over. Your score is 0.");
168 /* Kludge for PMON bug ... */
169 OCD_WRITE(0x0710, 0x0ffff029);
172 static void __init py_uart_setup(void)
177 * Register to interrupt zero because we share the interrupt with
178 * the serial driver which we don't properly support yet.
180 memset(&up, 0, sizeof(up));
181 up.membase = (unsigned char *) ioremap(TITAN_SERIAL_BASE, 8);
182 up.irq = TITAN_SERIAL_IRQ;
183 up.uartclk = TITAN_UART_CLK;
185 up.iotype = UPIO_MEM;
186 up.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
189 if (early_serial_setup(&up))
190 printk(KERN_ERR "Early serial init of port 0 failed\n");
193 static void __init py_rtc_setup(void)
195 m48t37_base = ioremap(YOSEMITE_RTC_BASE, YOSEMITE_RTC_SIZE);
197 printk(KERN_ERR "Mapping the RTC failed\n");
199 rtc_mips_get_time = m48t37y_get_time;
200 rtc_mips_set_time = m48t37y_set_time;
202 write_seqlock(&xtime_lock);
203 xtime.tv_sec = m48t37y_get_time();
206 set_normalized_timespec(&wall_to_monotonic,
207 -xtime.tv_sec, -xtime.tv_nsec);
208 write_sequnlock(&xtime_lock);
211 /* Not only time init but that's what the hook it's called through is named */
212 static void __init py_late_time_init(void)
219 void __init plat_mem_setup(void)
221 board_time_init = yosemite_time_init;
222 late_time_init = py_late_time_init;
224 /* Add memory regions */
225 add_memory_region(0x00000000, 0x10000000, BOOT_MEM_RAM);
227 #if 0 /* XXX Crash ... */
228 OCD_WRITE(RM9000x2_OCD_HTSC,
229 OCD_READ(RM9000x2_OCD_HTSC) | HYPERTRANSPORT_ENABLE);
231 /* Set the BAR. Shifted mode */
232 OCD_WRITE(RM9000x2_OCD_HTBAR0, HYPERTRANSPORT_BAR0_ADDR);
233 OCD_WRITE(RM9000x2_OCD_HTMASK0, HYPERTRANSPORT_SIZE0);