1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2005 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
9 * This program is free software; you can redistribute it and/or *
10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
20 *******************************************************************/
22 #include <linux/blkdev.h>
23 #include <linux/pci.h>
24 #include <linux/interrupt.h>
28 #include "lpfc_disc.h"
29 #include "lpfc_scsi.h"
31 #include "lpfc_logmsg.h"
32 #include "lpfc_crtn.h"
33 #include "lpfc_compat.h"
35 /**********************************************/
38 /**********************************************/
40 lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset)
48 /* Setup to dump VPD region */
49 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
50 mb->mbxCommand = MBX_DUMP_MEMORY;
52 mb->un.varDmp.type = DMP_NV_PARAMS;
53 mb->un.varDmp.entry_index = offset;
54 mb->un.varDmp.region_id = DMP_REGION_VPD;
55 mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
57 mb->un.varDmp.resp_offset = 0;
59 mb->mbxOwner = OWN_HOST;
63 /**********************************************/
64 /* lpfc_read_nv Issue a READ NVPARAM */
66 /**********************************************/
68 lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
73 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
74 mb->mbxCommand = MBX_READ_NV;
75 mb->mbxOwner = OWN_HOST;
79 /**********************************************/
80 /* lpfc_read_la Issue a READ LA */
82 /**********************************************/
84 lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp)
87 struct lpfc_sli *psli;
91 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
93 INIT_LIST_HEAD(&mp->list);
94 mb->mbxCommand = MBX_READ_LA64;
95 mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
96 mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
97 mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);
99 /* Save address for later completion and set the owner to host so that
100 * the FW knows this mailbox is available for processing.
102 pmb->context1 = (uint8_t *) mp;
103 mb->mbxOwner = OWN_HOST;
107 /**********************************************/
108 /* lpfc_clear_la Issue a CLEAR LA */
109 /* mailbox command */
110 /**********************************************/
112 lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
117 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
119 mb->un.varClearLA.eventTag = phba->fc_eventTag;
120 mb->mbxCommand = MBX_CLEAR_LA;
121 mb->mbxOwner = OWN_HOST;
125 /**************************************************/
126 /* lpfc_config_link Issue a CONFIG LINK */
127 /* mailbox command */
128 /**************************************************/
130 lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
132 MAILBOX_t *mb = &pmb->mb;
133 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
136 * SLI-2, Coalescing Response Feature.
138 if (phba->cfg_cr_delay) {
139 mb->un.varCfgLnk.cr = 1;
140 mb->un.varCfgLnk.ci = 1;
141 mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
142 mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
145 mb->un.varCfgLnk.myId = phba->fc_myDID;
146 mb->un.varCfgLnk.edtov = phba->fc_edtov;
147 mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
148 mb->un.varCfgLnk.ratov = phba->fc_ratov;
149 mb->un.varCfgLnk.rttov = phba->fc_rttov;
150 mb->un.varCfgLnk.altov = phba->fc_altov;
151 mb->un.varCfgLnk.crtov = phba->fc_crtov;
152 mb->un.varCfgLnk.citov = phba->fc_citov;
155 mb->un.varCfgLnk.ack0_enable = 1;
157 mb->mbxCommand = MBX_CONFIG_LINK;
158 mb->mbxOwner = OWN_HOST;
162 /**********************************************/
163 /* lpfc_init_link Issue an INIT LINK */
164 /* mailbox command */
165 /**********************************************/
167 lpfc_init_link(struct lpfc_hba * phba,
168 LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
171 struct lpfc_sli *psli;
175 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
179 case FLAGS_TOPOLOGY_MODE_LOOP_PT:
180 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
181 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
183 case FLAGS_TOPOLOGY_MODE_PT_PT:
184 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
186 case FLAGS_TOPOLOGY_MODE_LOOP:
187 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
189 case FLAGS_TOPOLOGY_MODE_PT_LOOP:
190 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
191 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
196 * Setting up the link speed
199 if (vpd->rev.feaLevelHigh >= 0x02){
204 mb->un.varInitLnk.link_flags |=
206 mb->un.varInitLnk.link_speed = linkspeed;
208 case LINK_SPEED_AUTO:
210 mb->un.varInitLnk.link_speed =
217 mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;
219 mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
220 mb->mbxOwner = OWN_HOST;
221 mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
225 /**********************************************/
226 /* lpfc_read_sparam Issue a READ SPARAM */
227 /* mailbox command */
228 /**********************************************/
230 lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
232 struct lpfc_dmabuf *mp;
234 struct lpfc_sli *psli;
238 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
240 mb->mbxOwner = OWN_HOST;
242 /* Get a buffer to hold the HBAs Service Parameters */
244 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) ||
245 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
248 mb->mbxCommand = MBX_READ_SPARM64;
249 /* READ_SPARAM: no buffers */
250 lpfc_printf_log(phba,
253 "%d:0301 READ_SPARAM: no buffers\n",
257 INIT_LIST_HEAD(&mp->list);
258 mb->mbxCommand = MBX_READ_SPARM64;
259 mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
260 mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
261 mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);
263 /* save address for completion */
269 /********************************************/
270 /* lpfc_unreg_did Issue a UNREG_DID */
271 /* mailbox command */
272 /********************************************/
274 lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
279 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
281 mb->un.varUnregDID.did = did;
283 mb->mbxCommand = MBX_UNREG_D_ID;
284 mb->mbxOwner = OWN_HOST;
288 /***********************************************/
290 /* command to write slim */
291 /***********************************************/
293 lpfc_set_slim(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint32_t addr,
299 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
301 /* addr = 0x090597 is AUTO ABTS disable for ELS commands */
302 /* addr = 0x052198 is DELAYED ABTS enable for ELS commands */
305 * Always turn on DELAYED ABTS for ELS timeouts
307 if ((addr == 0x052198) && (value == 0))
310 mb->un.varWords[0] = addr;
311 mb->un.varWords[1] = value;
313 mb->mbxCommand = MBX_SET_SLIM;
314 mb->mbxOwner = OWN_HOST;
318 /**********************************************/
319 /* lpfc_read_nv Issue a READ CONFIG */
320 /* mailbox command */
321 /**********************************************/
323 lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
328 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
330 mb->mbxCommand = MBX_READ_CONFIG;
331 mb->mbxOwner = OWN_HOST;
335 /********************************************/
336 /* lpfc_reg_login Issue a REG_LOGIN */
337 /* mailbox command */
338 /********************************************/
340 lpfc_reg_login(struct lpfc_hba * phba,
341 uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
344 struct lpfc_dmabuf *mp;
346 struct lpfc_sli *psli;
350 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
352 mb->un.varRegLogin.rpi = 0;
353 mb->un.varRegLogin.did = did;
354 mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */
356 mb->mbxOwner = OWN_HOST;
358 /* Get a buffer to hold NPorts Service Parameters */
359 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) ||
360 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
364 mb->mbxCommand = MBX_REG_LOGIN64;
365 /* REG_LOGIN: no buffers */
366 lpfc_printf_log(phba,
369 "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
371 (uint32_t) did, (uint32_t) flag);
374 INIT_LIST_HEAD(&mp->list);
377 /* Copy param's into a new buffer */
378 memcpy(sparam, param, sizeof (struct serv_parm));
380 /* save address for completion */
381 pmb->context1 = (uint8_t *) mp;
383 mb->mbxCommand = MBX_REG_LOGIN64;
384 mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
385 mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
386 mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);
391 /**********************************************/
392 /* lpfc_unreg_login Issue a UNREG_LOGIN */
393 /* mailbox command */
394 /**********************************************/
396 lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
401 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
403 mb->un.varUnregLogin.rpi = (uint16_t) rpi;
404 mb->un.varUnregLogin.rsvd1 = 0;
406 mb->mbxCommand = MBX_UNREG_LOGIN;
407 mb->mbxOwner = OWN_HOST;
412 lpfc_config_pcb_setup(struct lpfc_hba * phba)
414 struct lpfc_sli *psli = &phba->sli;
415 struct lpfc_sli_ring *pring;
416 PCB_t *pcbp = &phba->slim2p->pcb;
417 dma_addr_t pdma_addr;
422 pcbp->maxRing = (psli->num_rings - 1);
425 for (i = 0; i < psli->num_rings; i++) {
426 pring = &psli->ring[i];
427 /* A ring MUST have both cmd and rsp entries defined to be
429 if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) {
430 pcbp->rdsc[i].cmdEntries = 0;
431 pcbp->rdsc[i].rspEntries = 0;
432 pcbp->rdsc[i].cmdAddrHigh = 0;
433 pcbp->rdsc[i].rspAddrHigh = 0;
434 pcbp->rdsc[i].cmdAddrLow = 0;
435 pcbp->rdsc[i].rspAddrLow = 0;
436 pring->cmdringaddr = NULL;
437 pring->rspringaddr = NULL;
440 /* Command ring setup for ring */
442 (void *)&phba->slim2p->IOCBs[iocbCnt];
443 pcbp->rdsc[i].cmdEntries = pring->numCiocb;
445 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
446 (uint8_t *)phba->slim2p;
447 pdma_addr = phba->slim2p_mapping + offset;
448 pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
449 pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
450 iocbCnt += pring->numCiocb;
452 /* Response ring setup for ring */
454 (void *)&phba->slim2p->IOCBs[iocbCnt];
456 pcbp->rdsc[i].rspEntries = pring->numRiocb;
457 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
458 (uint8_t *)phba->slim2p;
459 pdma_addr = phba->slim2p_mapping + offset;
460 pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
461 pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
462 iocbCnt += pring->numRiocb;
467 lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
472 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
473 mb->un.varRdRev.cv = 1;
474 mb->mbxCommand = MBX_READ_REV;
475 mb->mbxOwner = OWN_HOST;
480 lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
483 MAILBOX_t *mb = &pmb->mb;
484 struct lpfc_sli *psli;
485 struct lpfc_sli_ring *pring;
487 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
489 mb->un.varCfgRing.ring = ring;
490 mb->un.varCfgRing.maxOrigXchg = 0;
491 mb->un.varCfgRing.maxRespXchg = 0;
492 mb->un.varCfgRing.recvNotify = 1;
495 pring = &psli->ring[ring];
496 mb->un.varCfgRing.numMask = pring->num_mask;
497 mb->mbxCommand = MBX_CONFIG_RING;
498 mb->mbxOwner = OWN_HOST;
500 /* Is this ring configured for a specific profile */
501 if (pring->prt[0].profile) {
502 mb->un.varCfgRing.profile = pring->prt[0].profile;
506 /* Otherwise we setup specific rctl / type masks for this ring */
507 for (i = 0; i < pring->num_mask; i++) {
508 mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
509 if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
510 mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
512 mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
513 mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
514 mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
521 lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
523 MAILBOX_t *mb = &pmb->mb;
524 dma_addr_t pdma_addr;
525 uint32_t bar_low, bar_high;
528 void __iomem *to_slim;
530 memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
531 mb->mbxCommand = MBX_CONFIG_PORT;
532 mb->mbxOwner = OWN_HOST;
534 mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
536 offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
537 pdma_addr = phba->slim2p_mapping + offset;
538 mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
539 mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
542 phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
543 phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
545 /* Setup Mailbox pointers */
546 phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
547 offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
548 pdma_addr = phba->slim2p_mapping + offset;
549 phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
550 phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
553 * Setup Host Group ring pointer.
555 * For efficiency reasons, the ring get/put pointers can be
556 * placed in adapter memory (SLIM) rather than in host memory.
557 * This allows firmware to avoid PCI reads/writes when updating
558 * and checking pointers.
560 * The firmware recognizes the use of SLIM memory by comparing
561 * the address of the get/put pointers structure with that of
562 * the SLIM BAR (BAR0).
564 * Caution: be sure to use the PCI config space value of BAR0/BAR1
565 * (the hardware's view of the base address), not the OS's
566 * value of pci_resource_start() as the OS value may be a cookie
571 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
572 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
575 /* mask off BAR0's flag bits 0 - 3 */
576 phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
577 (SLIMOFF*sizeof(uint32_t));
578 if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
579 phba->slim2p->pcb.hgpAddrHigh = bar_high;
581 phba->slim2p->pcb.hgpAddrHigh = 0;
582 /* write HGP data to SLIM at the required longword offset */
583 memset(&hgp, 0, sizeof(struct lpfc_hgp));
584 to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));
585 lpfc_memcpy_to_slim(to_slim, &hgp, sizeof(struct lpfc_hgp));
587 /* Setup Port Group ring pointer */
588 offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
589 (uint8_t *)phba->slim2p;
590 pdma_addr = phba->slim2p_mapping + offset;
591 phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
592 phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
594 /* Use callback routine to setp rings in the pcb */
595 lpfc_config_pcb_setup(phba);
597 /* special handling for LC HBAs */
598 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
601 lpfc_hba_init(phba, hbainit);
603 memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
606 /* Swap PCB if needed */
607 lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
610 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
611 "%d:0405 Service Level Interface (SLI) 2 selected\n",
616 lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
618 struct lpfc_sli *psli;
622 list_add_tail(&mbq->list, &psli->mboxq);
630 lpfc_mbox_get(struct lpfc_hba * phba)
632 LPFC_MBOXQ_t *mbq = NULL;
633 struct lpfc_sli *psli = &phba->sli;
635 list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t,