Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
[linux-2.6] / arch / mn10300 / kernel / gdb-cache.S
1 ###############################################################################
2 #
3 # MN10300 Low-level cache purging routines for gdbstub
4 #
5 # Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6 # Written by David Howells (dhowells@redhat.com)
7 #
8 # This program is free software; you can redistribute it and/or
9 # modify it under the terms of the GNU General Public Licence
10 # as published by the Free Software Foundation; either version
11 # 2 of the Licence, or (at your option) any later version.
12 #
13 ###############################################################################
14 #include <linux/sys.h>
15 #include <linux/linkage.h>
16 #include <asm/smp.h>
17 #include <asm/cache.h>
18 #include <asm/cpu-regs.h>
19 #include <asm/exceptions.h>
20 #include <asm/frame.inc>
21 #include <asm/serial-regs.h>
22
23         .text
24
25 ###############################################################################
26 #
27 # GDB stub cache purge
28 #
29 ###############################################################################
30         .type   gdbstub_purge_cache,@function
31 ENTRY(gdbstub_purge_cache)
32         #######################################################################
33         # read the addresses tagged in the cache's tag RAM and attempt to flush
34         # those addresses specifically
35         # - we rely on the hardware to filter out invalid tag entry addresses
36         mov     DCACHE_TAG(0,0),a0              # dcache tag RAM access address
37         mov     DCACHE_PURGE(0,0),a1            # dcache purge request address
38         mov     L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1  # total number of entries
39
40 mn10300_dcache_flush_loop:
41         mov     (a0),d0
42         and     L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0
43         or      L1_CACHE_TAG_VALID,d0           # retain valid entries in the
44                                                 # cache
45         mov     d0,(a1)                         # conditional purge
46
47 mn10300_dcache_flush_skip:
48         add     L1_CACHE_BYTES,a0
49         add     L1_CACHE_BYTES,a1
50         add     -1,d1
51         bne     mn10300_dcache_flush_loop
52
53 ;;      # unconditionally flush and invalidate the dcache
54 ;;      mov     DCACHE_PURGE(0,0),a1            # dcache purge request address
55 ;;      mov     L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1     # total number of
56 ;;                                                      # entries
57 ;;
58 ;; gdbstub_purge_cache__dcache_loop:
59 ;;      mov     (a1),d0                         # unconditional purge
60 ;;
61 ;;      add     L1_CACHE_BYTES,a1
62 ;;      add     -1,d1
63 ;;      bne     gdbstub_purge_cache__dcache_loop
64
65         #######################################################################
66         # now invalidate the icache
67         mov     CHCTR,a0
68         movhu   (a0),a1
69
70         mov     epsw,d1
71         and     ~EPSW_IE,epsw
72         nop
73         nop
74
75         # disable the icache
76         and     ~CHCTR_ICEN,d0
77         movhu   d0,(a0)
78
79         # and wait for it to calm down
80         setlb
81         movhu   (a0),d0
82         btst    CHCTR_ICBUSY,d0
83         lne
84
85         # invalidate
86         or      CHCTR_ICINV,d0
87         movhu   d0,(a0)
88
89         # wait for the cache to finish
90         mov     CHCTR,a0
91         setlb
92         movhu   (a0),d0
93         btst    CHCTR_ICBUSY,d0
94         lne
95
96         # and reenable it
97         movhu   a1,(a0)
98         movhu   (a0),d0                 # read back to flush
99                                         # (SIGILLs all over without this)
100
101         mov     d1,epsw
102
103         ret     [],0
104
105         .size   gdbstub_purge_cache,.-gdbstub_purge_cache