1 #ifndef __ASM_SH_DMA_MAPPING_H
2 #define __ASM_SH_DMA_MAPPING_H
5 #include <linux/scatterlist.h>
6 #include <linux/dma-debug.h>
7 #include <asm/cacheflush.h>
9 #include <asm-generic/dma-coherent.h>
11 extern struct bus_type pci_bus_type;
13 #define dma_supported(dev, mask) (1)
15 static inline int dma_set_mask(struct device *dev, u64 mask)
17 if (!dev->dma_mask || !dma_supported(dev, mask))
20 *dev->dma_mask = mask;
25 void *dma_alloc_coherent(struct device *dev, size_t size,
26 dma_addr_t *dma_handle, gfp_t flag);
28 void dma_free_coherent(struct device *dev, size_t size,
29 void *vaddr, dma_addr_t dma_handle);
31 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
32 enum dma_data_direction dir);
34 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
35 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
36 #define dma_is_consistent(d, h) (1)
38 static inline dma_addr_t dma_map_single(struct device *dev,
39 void *ptr, size_t size,
40 enum dma_data_direction dir)
42 dma_addr_t addr = virt_to_phys(ptr);
44 #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
45 if (dev->bus == &pci_bus_type)
48 dma_cache_sync(dev, ptr, size, dir);
50 debug_dma_map_page(dev, virt_to_page(ptr),
51 (unsigned long)ptr & ~PAGE_MASK, size,
57 static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,
58 size_t size, enum dma_data_direction dir)
60 debug_dma_unmap_page(dev, addr, size, dir, true);
63 static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
64 int nents, enum dma_data_direction dir)
68 for (i = 0; i < nents; i++) {
69 #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
70 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
72 sg[i].dma_address = sg_phys(&sg[i]);
73 sg[i].dma_length = sg[i].length;
76 debug_dma_map_sg(dev, sg, nents, i, dir);
81 static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
82 int nents, enum dma_data_direction dir)
84 debug_dma_unmap_sg(dev, sg, nents, dir);
87 static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
88 unsigned long offset, size_t size,
89 enum dma_data_direction dir)
91 return dma_map_single(dev, page_address(page) + offset, size, dir);
94 static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
95 size_t size, enum dma_data_direction dir)
97 dma_unmap_single(dev, dma_address, size, dir);
100 static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle,
101 size_t size, enum dma_data_direction dir)
103 #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
104 if (dev->bus == &pci_bus_type)
107 dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir);
110 static inline void dma_sync_single_range(struct device *dev,
111 dma_addr_t dma_handle,
112 unsigned long offset, size_t size,
113 enum dma_data_direction dir)
115 #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
116 if (dev->bus == &pci_bus_type)
119 dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir);
122 static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
123 int nelems, enum dma_data_direction dir)
127 for (i = 0; i < nelems; i++) {
128 #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
129 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
131 sg[i].dma_address = sg_phys(&sg[i]);
132 sg[i].dma_length = sg[i].length;
136 static inline void dma_sync_single_for_cpu(struct device *dev,
137 dma_addr_t dma_handle, size_t size,
138 enum dma_data_direction dir)
140 dma_sync_single(dev, dma_handle, size, dir);
141 debug_dma_sync_single_for_cpu(dev, dma_handle, size, dir);
144 static inline void dma_sync_single_for_device(struct device *dev,
145 dma_addr_t dma_handle,
147 enum dma_data_direction dir)
149 dma_sync_single(dev, dma_handle, size, dir);
150 debug_dma_sync_single_for_device(dev, dma_handle, size, dir);
153 static inline void dma_sync_single_range_for_cpu(struct device *dev,
154 dma_addr_t dma_handle,
155 unsigned long offset,
157 enum dma_data_direction direction)
159 dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction);
160 debug_dma_sync_single_range_for_cpu(dev, dma_handle,
161 offset, size, direction);
164 static inline void dma_sync_single_range_for_device(struct device *dev,
165 dma_addr_t dma_handle,
166 unsigned long offset,
168 enum dma_data_direction direction)
170 dma_sync_single_for_device(dev, dma_handle+offset, size, direction);
171 debug_dma_sync_single_range_for_device(dev, dma_handle,
172 offset, size, direction);
176 static inline void dma_sync_sg_for_cpu(struct device *dev,
177 struct scatterlist *sg, int nelems,
178 enum dma_data_direction dir)
180 dma_sync_sg(dev, sg, nelems, dir);
181 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
184 static inline void dma_sync_sg_for_device(struct device *dev,
185 struct scatterlist *sg, int nelems,
186 enum dma_data_direction dir)
188 dma_sync_sg(dev, sg, nelems, dir);
189 debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
192 static inline int dma_get_cache_alignment(void)
195 * Each processor family will define its own L1_CACHE_SHIFT,
196 * L1_CACHE_BYTES wraps to this, so this is always safe.
198 return L1_CACHE_BYTES;
201 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
203 return dma_addr == 0;
206 #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
209 dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
210 dma_addr_t device_addr, size_t size, int flags);
213 dma_release_declared_memory(struct device *dev);
216 dma_mark_declared_memory_occupied(struct device *dev,
217 dma_addr_t device_addr, size_t size);
219 #endif /* __ASM_SH_DMA_MAPPING_H */