Merge master.kernel.org:/home/rmk/linux-2.6-arm
[linux-2.6] / drivers / serial / bfin_5xx.c
1 /*
2  * Blackfin On-Chip Serial Driver
3  *
4  * Copyright 2006-2007 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
28 #endif
29
30 #include <asm/gpio.h>
31 #include <asm/mach/bfin_serial_5xx.h>
32
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
37 #include <asm/cacheflush.h>
38 #endif
39
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME        "ttyBF"
42 #define BFIN_SERIAL_MAJOR       204
43 #define BFIN_SERIAL_MINOR       64
44
45 /*
46  * Setup for console. Argument comes from the menuconfig
47  */
48 #define DMA_RX_XCOUNT           512
49 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
50
51 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
52
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
55 #else
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
57 #endif
58
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
60
61 /*
62  * interrupts are disabled on entry
63  */
64 static void bfin_serial_stop_tx(struct uart_port *port)
65 {
66         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67         struct circ_buf *xmit = &uart->port.info->xmit;
68
69         while (!(UART_GET_LSR(uart) & TEMT))
70                 cpu_relax();
71
72 #ifdef CONFIG_SERIAL_BFIN_DMA
73         disable_dma(uart->tx_dma_channel);
74         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
75         uart->port.icount.tx += uart->tx_count;
76         uart->tx_count = 0;
77         uart->tx_done = 1;
78 #else
79 #ifdef CONFIG_BF54x
80         /* Clear TFI bit */
81         UART_PUT_LSR(uart, TFI);
82 #endif
83         UART_CLEAR_IER(uart, ETBEI);
84 #endif
85 }
86
87 /*
88  * port is locked and interrupts are disabled
89  */
90 static void bfin_serial_start_tx(struct uart_port *port)
91 {
92         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
93
94 #ifdef CONFIG_SERIAL_BFIN_DMA
95         if (uart->tx_done)
96                 bfin_serial_dma_tx_chars(uart);
97 #else
98         UART_SET_IER(uart, ETBEI);
99         bfin_serial_tx_chars(uart);
100 #endif
101 }
102
103 /*
104  * Interrupts are enabled
105  */
106 static void bfin_serial_stop_rx(struct uart_port *port)
107 {
108         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
109 #ifdef CONFIG_KGDB_UART
110         if (uart->port.line != CONFIG_KGDB_UART_PORT)
111 #endif
112         UART_CLEAR_IER(uart, ERBFI);
113 }
114
115 /*
116  * Set the modem control timer to fire immediately.
117  */
118 static void bfin_serial_enable_ms(struct uart_port *port)
119 {
120 }
121
122 #ifdef CONFIG_KGDB_UART
123 static int kgdb_entry_state;
124
125 void kgdb_put_debug_char(int chr)
126 {
127         struct bfin_serial_port *uart;
128         
129         if (CONFIG_KGDB_UART_PORT < 0
130                 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
131                 uart = &bfin_serial_ports[0];
132         else
133                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
134         
135         while (!(UART_GET_LSR(uart) & THRE)) {
136                 SSYNC();
137         }
138
139         UART_CLEAR_DLAB(uart);
140         UART_PUT_CHAR(uart, (unsigned char)chr);
141         SSYNC();
142 }
143
144 int kgdb_get_debug_char(void)
145 {
146         struct bfin_serial_port *uart;
147         unsigned char chr;
148
149         if (CONFIG_KGDB_UART_PORT < 0
150                 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
151                 uart = &bfin_serial_ports[0];
152         else
153                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
154         
155         while(!(UART_GET_LSR(uart) & DR)) {
156                 SSYNC();
157         }
158         UART_CLEAR_DLAB(uart);
159         chr = UART_GET_CHAR(uart);
160         SSYNC();
161
162         return chr;
163 }
164 #endif
165
166 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
167 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
168 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
169 #else
170 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
171 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
172 #endif
173
174 #ifdef CONFIG_SERIAL_BFIN_PIO
175 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
176 {
177         struct tty_struct *tty = uart->port.info->tty;
178         unsigned int status, ch, flg;
179         static struct timeval anomaly_start = { .tv_sec = 0 };
180
181         status = UART_GET_LSR(uart);
182         UART_CLEAR_LSR(uart);
183
184         ch = UART_GET_CHAR(uart);
185         uart->port.icount.rx++;
186
187 #ifdef CONFIG_KGDB_UART
188         if (uart->port.line == CONFIG_KGDB_UART_PORT) {
189                 struct pt_regs *regs = get_irq_regs();
190                 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
191                         kgdb_breakkey_pressed(regs);
192                         return;
193                 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
194                         kgdb_entry_state = 1;
195                 } else if (kgdb_entry_state == 1 && ch == 'q') {
196                         kgdb_entry_state = 0;
197                         kgdb_breakkey_pressed(regs);
198                         return;
199                 } else if (ch == 0x3) {/* Ctrl + C */
200                         kgdb_entry_state = 0;
201                         kgdb_breakkey_pressed(regs);
202                         return;
203                 } else {
204                         kgdb_entry_state = 0;
205                 }
206         }
207 #endif
208
209         if (ANOMALY_05000363) {
210                 /* The BF533 (and BF561) family of processors have a nice anomaly
211                  * where they continuously generate characters for a "single" break.
212                  * We have to basically ignore this flood until the "next" valid
213                  * character comes across.  Due to the nature of the flood, it is
214                  * not possible to reliably catch bytes that are sent too quickly
215                  * after this break.  So application code talking to the Blackfin
216                  * which sends a break signal must allow at least 1.5 character
217                  * times after the end of the break for things to stabilize.  This
218                  * timeout was picked as it must absolutely be larger than 1
219                  * character time +/- some percent.  So 1.5 sounds good.  All other
220                  * Blackfin families operate properly.  Woo.
221                  */
222                 if (anomaly_start.tv_sec) {
223                         struct timeval curr;
224                         suseconds_t usecs;
225
226                         if ((~ch & (~ch + 1)) & 0xff)
227                                 goto known_good_char;
228
229                         do_gettimeofday(&curr);
230                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
231                                 goto known_good_char;
232
233                         usecs = 0;
234                         if (curr.tv_sec != anomaly_start.tv_sec)
235                                 usecs += USEC_PER_SEC;
236                         usecs += curr.tv_usec - anomaly_start.tv_usec;
237
238                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
239                                 goto known_good_char;
240
241                         if (ch)
242                                 anomaly_start.tv_sec = 0;
243                         else
244                                 anomaly_start = curr;
245
246                         return;
247
248  known_good_char:
249                         anomaly_start.tv_sec = 0;
250                 }
251         }
252
253         if (status & BI) {
254                 if (ANOMALY_05000363)
255                         if (bfin_revid() < 5)
256                                 do_gettimeofday(&anomaly_start);
257                 uart->port.icount.brk++;
258                 if (uart_handle_break(&uart->port))
259                         goto ignore_char;
260                 status &= ~(PE | FE);
261         }
262         if (status & PE)
263                 uart->port.icount.parity++;
264         if (status & OE)
265                 uart->port.icount.overrun++;
266         if (status & FE)
267                 uart->port.icount.frame++;
268
269         status &= uart->port.read_status_mask;
270
271         if (status & BI)
272                 flg = TTY_BREAK;
273         else if (status & PE)
274                 flg = TTY_PARITY;
275         else if (status & FE)
276                 flg = TTY_FRAME;
277         else
278                 flg = TTY_NORMAL;
279
280         if (uart_handle_sysrq_char(&uart->port, ch))
281                 goto ignore_char;
282
283         uart_insert_char(&uart->port, status, OE, ch, flg);
284
285  ignore_char:
286         tty_flip_buffer_push(tty);
287 }
288
289 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
290 {
291         struct circ_buf *xmit = &uart->port.info->xmit;
292
293         if (uart->port.x_char) {
294                 UART_PUT_CHAR(uart, uart->port.x_char);
295                 uart->port.icount.tx++;
296                 uart->port.x_char = 0;
297         }
298         /*
299          * Check the modem control lines before
300          * transmitting anything.
301          */
302         bfin_serial_mctrl_check(uart);
303
304         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
305                 bfin_serial_stop_tx(&uart->port);
306                 return;
307         }
308
309         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
310                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
311                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
312                 uart->port.icount.tx++;
313                 SSYNC();
314         }
315
316         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
317                 uart_write_wakeup(&uart->port);
318
319         if (uart_circ_empty(xmit))
320                 bfin_serial_stop_tx(&uart->port);
321 }
322
323 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
324 {
325         struct bfin_serial_port *uart = dev_id;
326
327         spin_lock(&uart->port.lock);
328         while (UART_GET_LSR(uart) & DR)
329                 bfin_serial_rx_chars(uart);
330         spin_unlock(&uart->port.lock);
331
332         return IRQ_HANDLED;
333 }
334
335 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
336 {
337         struct bfin_serial_port *uart = dev_id;
338
339         spin_lock(&uart->port.lock);
340         if (UART_GET_LSR(uart) & THRE)
341                 bfin_serial_tx_chars(uart);
342         spin_unlock(&uart->port.lock);
343
344         return IRQ_HANDLED;
345 }
346 #endif
347
348 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
349 static void bfin_serial_do_work(struct work_struct *work)
350 {
351         struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
352
353         bfin_serial_mctrl_check(uart);
354 }
355 #endif
356
357 #ifdef CONFIG_SERIAL_BFIN_DMA
358 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
359 {
360         struct circ_buf *xmit = &uart->port.info->xmit;
361
362         uart->tx_done = 0;
363
364         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
365                 uart->tx_count = 0;
366                 uart->tx_done = 1;
367                 return;
368         }
369
370         if (uart->port.x_char) {
371                 UART_PUT_CHAR(uart, uart->port.x_char);
372                 uart->port.icount.tx++;
373                 uart->port.x_char = 0;
374         }
375
376         /*
377          * Check the modem control lines before
378          * transmitting anything.
379          */
380         bfin_serial_mctrl_check(uart);
381
382         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
383         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
384                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
385         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
386                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
387         set_dma_config(uart->tx_dma_channel,
388                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
389                         INTR_ON_BUF,
390                         DIMENSION_LINEAR,
391                         DATA_SIZE_8,
392                         DMA_SYNC_RESTART));
393         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
394         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
395         set_dma_x_modify(uart->tx_dma_channel, 1);
396         enable_dma(uart->tx_dma_channel);
397
398         UART_SET_IER(uart, ETBEI);
399 }
400
401 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
402 {
403         struct tty_struct *tty = uart->port.info->tty;
404         int i, flg, status;
405
406         status = UART_GET_LSR(uart);
407         UART_CLEAR_LSR(uart);
408
409         uart->port.icount.rx +=
410                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
411                 UART_XMIT_SIZE);
412
413         if (status & BI) {
414                 uart->port.icount.brk++;
415                 if (uart_handle_break(&uart->port))
416                         goto dma_ignore_char;
417                 status &= ~(PE | FE);
418         }
419         if (status & PE)
420                 uart->port.icount.parity++;
421         if (status & OE)
422                 uart->port.icount.overrun++;
423         if (status & FE)
424                 uart->port.icount.frame++;
425
426         status &= uart->port.read_status_mask;
427
428         if (status & BI)
429                 flg = TTY_BREAK;
430         else if (status & PE)
431                 flg = TTY_PARITY;
432         else if (status & FE)
433                 flg = TTY_FRAME;
434         else
435                 flg = TTY_NORMAL;
436
437         for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
438                 if (i >= UART_XMIT_SIZE)
439                         i = 0;
440                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
441                         uart_insert_char(&uart->port, status, OE,
442                                 uart->rx_dma_buf.buf[i], flg);
443         }
444
445  dma_ignore_char:
446         tty_flip_buffer_push(tty);
447 }
448
449 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
450 {
451         int x_pos, pos;
452
453         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
454         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
455         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
456         if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
457                 uart->rx_dma_nrows = 0;
458         x_pos = DMA_RX_XCOUNT - x_pos;
459         if (x_pos == DMA_RX_XCOUNT)
460                 x_pos = 0;
461
462         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
463         if (pos != uart->rx_dma_buf.tail) {
464                 uart->rx_dma_buf.head = pos;
465                 bfin_serial_dma_rx_chars(uart);
466                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
467         }
468
469         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
470 }
471
472 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
473 {
474         struct bfin_serial_port *uart = dev_id;
475         struct circ_buf *xmit = &uart->port.info->xmit;
476
477         spin_lock(&uart->port.lock);
478         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
479                 disable_dma(uart->tx_dma_channel);
480                 clear_dma_irqstat(uart->tx_dma_channel);
481                 UART_CLEAR_IER(uart, ETBEI);
482                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
483                 uart->port.icount.tx += uart->tx_count;
484
485                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
486                         uart_write_wakeup(&uart->port);
487
488                 bfin_serial_dma_tx_chars(uart);
489         }
490
491         spin_unlock(&uart->port.lock);
492         return IRQ_HANDLED;
493 }
494
495 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
496 {
497         struct bfin_serial_port *uart = dev_id;
498         unsigned short irqstat;
499
500         spin_lock(&uart->port.lock);
501         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
502         clear_dma_irqstat(uart->rx_dma_channel);
503         spin_unlock(&uart->port.lock);
504
505         mod_timer(&(uart->rx_dma_timer), jiffies);
506
507         return IRQ_HANDLED;
508 }
509 #endif
510
511 /*
512  * Return TIOCSER_TEMT when transmitter is not busy.
513  */
514 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
515 {
516         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
517         unsigned short lsr;
518
519         lsr = UART_GET_LSR(uart);
520         if (lsr & TEMT)
521                 return TIOCSER_TEMT;
522         else
523                 return 0;
524 }
525
526 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
527 {
528 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
529         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
530         if (uart->cts_pin < 0)
531                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
532
533 # ifdef BF54x
534         if (UART_GET_MSR(uart) & CTS)
535 # else
536         if (gpio_get_value(uart->cts_pin))
537 # endif
538                 return TIOCM_DSR | TIOCM_CAR;
539         else
540 #endif
541                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
542 }
543
544 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
545 {
546 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
547         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
548         if (uart->rts_pin < 0)
549                 return;
550
551         if (mctrl & TIOCM_RTS)
552 # ifdef BF54x
553                 UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
554 # else
555                 gpio_set_value(uart->rts_pin, 0);
556 # endif
557         else
558 # ifdef BF54x
559                 UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
560 # else
561                 gpio_set_value(uart->rts_pin, 1);
562 # endif
563 #endif
564 }
565
566 /*
567  * Handle any change of modem status signal since we were last called.
568  */
569 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
570 {
571 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
572         unsigned int status;
573         struct uart_info *info = uart->port.info;
574         struct tty_struct *tty = info->tty;
575
576         status = bfin_serial_get_mctrl(&uart->port);
577         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
578         if (!(status & TIOCM_CTS)) {
579                 tty->hw_stopped = 1;
580                 schedule_work(&uart->cts_workqueue);
581         } else {
582                 tty->hw_stopped = 0;
583         }
584 #endif
585 }
586
587 /*
588  * Interrupts are always disabled.
589  */
590 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
591 {
592         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
593         u16 lcr = UART_GET_LCR(uart);
594         if (break_state)
595                 lcr |= SB;
596         else
597                 lcr &= ~SB;
598         UART_PUT_LCR(uart, lcr);
599         SSYNC();
600 }
601
602 static int bfin_serial_startup(struct uart_port *port)
603 {
604         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
605
606 #ifdef CONFIG_SERIAL_BFIN_DMA
607         dma_addr_t dma_handle;
608
609         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
610                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
611                 return -EBUSY;
612         }
613
614         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
615                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
616                 free_dma(uart->rx_dma_channel);
617                 return -EBUSY;
618         }
619
620         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
621         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
622
623         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
624         uart->rx_dma_buf.head = 0;
625         uart->rx_dma_buf.tail = 0;
626         uart->rx_dma_nrows = 0;
627
628         set_dma_config(uart->rx_dma_channel,
629                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
630                                 INTR_ON_ROW, DIMENSION_2D,
631                                 DATA_SIZE_8,
632                                 DMA_SYNC_RESTART));
633         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
634         set_dma_x_modify(uart->rx_dma_channel, 1);
635         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
636         set_dma_y_modify(uart->rx_dma_channel, 1);
637         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
638         enable_dma(uart->rx_dma_channel);
639
640         uart->rx_dma_timer.data = (unsigned long)(uart);
641         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
642         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
643         add_timer(&(uart->rx_dma_timer));
644 #else
645         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
646              "BFIN_UART_RX", uart)) {
647 # ifdef CONFIG_KGDB_UART
648                 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
649 # endif
650                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
651                 return -EBUSY;
652 # ifdef CONFIG_KGDB_UART
653                 }
654 # endif
655         }
656
657         if (request_irq
658             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
659              "BFIN_UART_TX", uart)) {
660                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
661                 free_irq(uart->port.irq, uart);
662                 return -EBUSY;
663         }
664 #endif
665         UART_SET_IER(uart, ERBFI);
666         return 0;
667 }
668
669 static void bfin_serial_shutdown(struct uart_port *port)
670 {
671         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
672
673 #ifdef CONFIG_SERIAL_BFIN_DMA
674         disable_dma(uart->tx_dma_channel);
675         free_dma(uart->tx_dma_channel);
676         disable_dma(uart->rx_dma_channel);
677         free_dma(uart->rx_dma_channel);
678         del_timer(&(uart->rx_dma_timer));
679         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
680 #else
681 #ifdef  CONFIG_KGDB_UART
682         if (uart->port.line != CONFIG_KGDB_UART_PORT)
683 #endif
684         free_irq(uart->port.irq, uart);
685         free_irq(uart->port.irq+1, uart);
686 #endif
687 }
688
689 static void
690 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
691                    struct ktermios *old)
692 {
693         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
694         unsigned long flags;
695         unsigned int baud, quot;
696         unsigned short val, ier, lcr = 0;
697
698         switch (termios->c_cflag & CSIZE) {
699         case CS8:
700                 lcr = WLS(8);
701                 break;
702         case CS7:
703                 lcr = WLS(7);
704                 break;
705         case CS6:
706                 lcr = WLS(6);
707                 break;
708         case CS5:
709                 lcr = WLS(5);
710                 break;
711         default:
712                 printk(KERN_ERR "%s: word lengh not supported\n",
713                         __func__);
714         }
715
716         if (termios->c_cflag & CSTOPB)
717                 lcr |= STB;
718         if (termios->c_cflag & PARENB)
719                 lcr |= PEN;
720         if (!(termios->c_cflag & PARODD))
721                 lcr |= EPS;
722         if (termios->c_cflag & CMSPAR)
723                 lcr |= STP;
724
725         port->read_status_mask = OE;
726         if (termios->c_iflag & INPCK)
727                 port->read_status_mask |= (FE | PE);
728         if (termios->c_iflag & (BRKINT | PARMRK))
729                 port->read_status_mask |= BI;
730
731         /*
732          * Characters to ignore
733          */
734         port->ignore_status_mask = 0;
735         if (termios->c_iflag & IGNPAR)
736                 port->ignore_status_mask |= FE | PE;
737         if (termios->c_iflag & IGNBRK) {
738                 port->ignore_status_mask |= BI;
739                 /*
740                  * If we're ignoring parity and break indicators,
741                  * ignore overruns too (for real raw support).
742                  */
743                 if (termios->c_iflag & IGNPAR)
744                         port->ignore_status_mask |= OE;
745         }
746
747         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
748         quot = uart_get_divisor(port, baud);
749         spin_lock_irqsave(&uart->port.lock, flags);
750
751         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
752
753         /* Disable UART */
754         ier = UART_GET_IER(uart);
755 #ifdef CONFIG_BF54x
756         UART_CLEAR_IER(uart, 0xF);
757 #else
758         UART_PUT_IER(uart, 0);
759 #endif
760
761         /* Set DLAB in LCR to Access DLL and DLH */
762         UART_SET_DLAB(uart);
763
764         UART_PUT_DLL(uart, quot & 0xFF);
765         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
766         SSYNC();
767
768         /* Clear DLAB in LCR to Access THR RBR IER */
769         UART_CLEAR_DLAB(uart);
770
771         UART_PUT_LCR(uart, lcr);
772
773         /* Enable UART */
774 #ifdef CONFIG_BF54x
775         UART_SET_IER(uart, ier);
776 #else
777         UART_PUT_IER(uart, ier);
778 #endif
779
780         val = UART_GET_GCTL(uart);
781         val |= UCEN;
782         UART_PUT_GCTL(uart, val);
783
784         spin_unlock_irqrestore(&uart->port.lock, flags);
785 }
786
787 static const char *bfin_serial_type(struct uart_port *port)
788 {
789         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
790
791         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
792 }
793
794 /*
795  * Release the memory region(s) being used by 'port'.
796  */
797 static void bfin_serial_release_port(struct uart_port *port)
798 {
799 }
800
801 /*
802  * Request the memory region(s) being used by 'port'.
803  */
804 static int bfin_serial_request_port(struct uart_port *port)
805 {
806         return 0;
807 }
808
809 /*
810  * Configure/autoconfigure the port.
811  */
812 static void bfin_serial_config_port(struct uart_port *port, int flags)
813 {
814         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
815
816         if (flags & UART_CONFIG_TYPE &&
817             bfin_serial_request_port(&uart->port) == 0)
818                 uart->port.type = PORT_BFIN;
819 }
820
821 /*
822  * Verify the new serial_struct (for TIOCSSERIAL).
823  * The only change we allow are to the flags and type, and
824  * even then only between PORT_BFIN and PORT_UNKNOWN
825  */
826 static int
827 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
828 {
829         return 0;
830 }
831
832 /*
833  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
834  * In other cases, disable IrDA function.
835  */
836 static void bfin_set_ldisc(struct tty_struct *tty)
837 {
838         int line = tty->index;
839         unsigned short val;
840
841         if (line >= tty->driver->num)
842                 return;
843
844         switch (tty->ldisc.num) {
845         case N_IRDA:
846                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
847                 val |= (IREN | RPOLC);
848                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
849                 break;
850         default:
851                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
852                 val &= ~(IREN | RPOLC);
853                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
854         }
855 }
856
857 static struct uart_ops bfin_serial_pops = {
858         .tx_empty       = bfin_serial_tx_empty,
859         .set_mctrl      = bfin_serial_set_mctrl,
860         .get_mctrl      = bfin_serial_get_mctrl,
861         .stop_tx        = bfin_serial_stop_tx,
862         .start_tx       = bfin_serial_start_tx,
863         .stop_rx        = bfin_serial_stop_rx,
864         .enable_ms      = bfin_serial_enable_ms,
865         .break_ctl      = bfin_serial_break_ctl,
866         .startup        = bfin_serial_startup,
867         .shutdown       = bfin_serial_shutdown,
868         .set_termios    = bfin_serial_set_termios,
869         .type           = bfin_serial_type,
870         .release_port   = bfin_serial_release_port,
871         .request_port   = bfin_serial_request_port,
872         .config_port    = bfin_serial_config_port,
873         .verify_port    = bfin_serial_verify_port,
874 };
875
876 static void __init bfin_serial_init_ports(void)
877 {
878         static int first = 1;
879         int i;
880
881         if (!first)
882                 return;
883         first = 0;
884
885         for (i = 0; i < nr_ports; i++) {
886                 bfin_serial_ports[i].port.uartclk   = get_sclk();
887                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
888                 bfin_serial_ports[i].port.line      = i;
889                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
890                 bfin_serial_ports[i].port.membase   =
891                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
892                 bfin_serial_ports[i].port.mapbase   =
893                         bfin_serial_resource[i].uart_base_addr;
894                 bfin_serial_ports[i].port.irq       =
895                         bfin_serial_resource[i].uart_irq;
896                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
897 #ifdef CONFIG_SERIAL_BFIN_DMA
898                 bfin_serial_ports[i].tx_done        = 1;
899                 bfin_serial_ports[i].tx_count       = 0;
900                 bfin_serial_ports[i].tx_dma_channel =
901                         bfin_serial_resource[i].uart_tx_dma_channel;
902                 bfin_serial_ports[i].rx_dma_channel =
903                         bfin_serial_resource[i].uart_rx_dma_channel;
904                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
905 #endif
906 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
907                 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
908                 bfin_serial_ports[i].cts_pin        =
909                         bfin_serial_resource[i].uart_cts_pin;
910                 bfin_serial_ports[i].rts_pin        =
911                         bfin_serial_resource[i].uart_rts_pin;
912 #endif
913                 bfin_serial_hw_init(&bfin_serial_ports[i]);
914         }
915
916 }
917
918 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
919 /*
920  * If the port was already initialised (eg, by a boot loader),
921  * try to determine the current setup.
922  */
923 static void __init
924 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
925                            int *parity, int *bits)
926 {
927         unsigned short status;
928
929         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
930         if (status == (ERBFI | ETBEI)) {
931                 /* ok, the port was enabled */
932                 u16 lcr, dlh, dll;
933
934                 lcr = UART_GET_LCR(uart);
935
936                 *parity = 'n';
937                 if (lcr & PEN) {
938                         if (lcr & EPS)
939                                 *parity = 'e';
940                         else
941                                 *parity = 'o';
942                 }
943                 switch (lcr & 0x03) {
944                         case 0: *bits = 5; break;
945                         case 1: *bits = 6; break;
946                         case 2: *bits = 7; break;
947                         case 3: *bits = 8; break;
948                 }
949                 /* Set DLAB in LCR to Access DLL and DLH */
950                 UART_SET_DLAB(uart);
951
952                 dll = UART_GET_DLL(uart);
953                 dlh = UART_GET_DLH(uart);
954
955                 /* Clear DLAB in LCR to Access THR RBR IER */
956                 UART_CLEAR_DLAB(uart);
957
958                 *baud = get_sclk() / (16*(dll | dlh << 8));
959         }
960         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
961 }
962 #endif
963
964 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
965 static struct uart_driver bfin_serial_reg;
966
967 static int __init
968 bfin_serial_console_setup(struct console *co, char *options)
969 {
970         struct bfin_serial_port *uart;
971 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
972         int baud = 57600;
973         int bits = 8;
974         int parity = 'n';
975 #  ifdef CONFIG_SERIAL_BFIN_CTSRTS
976         int flow = 'r';
977 #  else
978         int flow = 'n';
979 #  endif
980 # endif
981
982         /*
983          * Check whether an invalid uart number has been specified, and
984          * if so, search for the first available port that does have
985          * console support.
986          */
987         if (co->index == -1 || co->index >= nr_ports)
988                 co->index = 0;
989         uart = &bfin_serial_ports[co->index];
990
991 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
992         if (options)
993                 uart_parse_options(options, &baud, &parity, &bits, &flow);
994         else
995                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
996
997         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
998 # else
999         return 0;
1000 # endif
1001 }
1002 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1003                                  defined (CONFIG_EARLY_PRINTK) */
1004
1005 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1006 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1007 {
1008         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1009         while (!(UART_GET_LSR(uart) & THRE))
1010                 barrier();
1011         UART_PUT_CHAR(uart, ch);
1012         SSYNC();
1013 }
1014
1015 /*
1016  * Interrupts are disabled on entering
1017  */
1018 static void
1019 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1020 {
1021         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1022         int flags = 0;
1023
1024         spin_lock_irqsave(&uart->port.lock, flags);
1025         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1026         spin_unlock_irqrestore(&uart->port.lock, flags);
1027
1028 }
1029
1030 static struct console bfin_serial_console = {
1031         .name           = BFIN_SERIAL_NAME,
1032         .write          = bfin_serial_console_write,
1033         .device         = uart_console_device,
1034         .setup          = bfin_serial_console_setup,
1035         .flags          = CON_PRINTBUFFER,
1036         .index          = -1,
1037         .data           = &bfin_serial_reg,
1038 };
1039
1040 static int __init bfin_serial_rs_console_init(void)
1041 {
1042         bfin_serial_init_ports();
1043         register_console(&bfin_serial_console);
1044 #ifdef CONFIG_KGDB_UART
1045         kgdb_entry_state = 0;
1046         init_kgdb_uart();
1047 #endif
1048         return 0;
1049 }
1050 console_initcall(bfin_serial_rs_console_init);
1051
1052 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1053 #else
1054 #define BFIN_SERIAL_CONSOLE     NULL
1055 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1056
1057
1058 #ifdef CONFIG_EARLY_PRINTK
1059 static __init void early_serial_putc(struct uart_port *port, int ch)
1060 {
1061         unsigned timeout = 0xffff;
1062         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1063
1064         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1065                 cpu_relax();
1066         UART_PUT_CHAR(uart, ch);
1067 }
1068
1069 static __init void early_serial_write(struct console *con, const char *s,
1070                                         unsigned int n)
1071 {
1072         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1073         unsigned int i;
1074
1075         for (i = 0; i < n; i++, s++) {
1076                 if (*s == '\n')
1077                         early_serial_putc(&uart->port, '\r');
1078                 early_serial_putc(&uart->port, *s);
1079         }
1080 }
1081
1082 static struct __init console bfin_early_serial_console = {
1083         .name = "early_BFuart",
1084         .write = early_serial_write,
1085         .device = uart_console_device,
1086         .flags = CON_PRINTBUFFER,
1087         .setup = bfin_serial_console_setup,
1088         .index = -1,
1089         .data  = &bfin_serial_reg,
1090 };
1091
1092 struct console __init *bfin_earlyserial_init(unsigned int port,
1093                                                 unsigned int cflag)
1094 {
1095         struct bfin_serial_port *uart;
1096         struct ktermios t;
1097
1098         if (port == -1 || port >= nr_ports)
1099                 port = 0;
1100         bfin_serial_init_ports();
1101         bfin_early_serial_console.index = port;
1102         uart = &bfin_serial_ports[port];
1103         t.c_cflag = cflag;
1104         t.c_iflag = 0;
1105         t.c_oflag = 0;
1106         t.c_lflag = ICANON;
1107         t.c_line = port;
1108         bfin_serial_set_termios(&uart->port, &t, &t);
1109         return &bfin_early_serial_console;
1110 }
1111
1112 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1113
1114 static struct uart_driver bfin_serial_reg = {
1115         .owner                  = THIS_MODULE,
1116         .driver_name            = "bfin-uart",
1117         .dev_name               = BFIN_SERIAL_NAME,
1118         .major                  = BFIN_SERIAL_MAJOR,
1119         .minor                  = BFIN_SERIAL_MINOR,
1120         .nr                     = BFIN_UART_NR_PORTS,
1121         .cons                   = BFIN_SERIAL_CONSOLE,
1122 };
1123
1124 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1125 {
1126         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1127
1128         if (uart)
1129                 uart_suspend_port(&bfin_serial_reg, &uart->port);
1130
1131         return 0;
1132 }
1133
1134 static int bfin_serial_resume(struct platform_device *dev)
1135 {
1136         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1137
1138         if (uart)
1139                 uart_resume_port(&bfin_serial_reg, &uart->port);
1140
1141         return 0;
1142 }
1143
1144 static int bfin_serial_probe(struct platform_device *dev)
1145 {
1146         struct resource *res = dev->resource;
1147         int i;
1148
1149         for (i = 0; i < dev->num_resources; i++, res++)
1150                 if (res->flags & IORESOURCE_MEM)
1151                         break;
1152
1153         if (i < dev->num_resources) {
1154                 for (i = 0; i < nr_ports; i++, res++) {
1155                         if (bfin_serial_ports[i].port.mapbase != res->start)
1156                                 continue;
1157                         bfin_serial_ports[i].port.dev = &dev->dev;
1158                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1159                         platform_set_drvdata(dev, &bfin_serial_ports[i]);
1160                 }
1161         }
1162
1163         return 0;
1164 }
1165
1166 static int bfin_serial_remove(struct platform_device *pdev)
1167 {
1168         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1169
1170
1171 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1172         gpio_free(uart->cts_pin);
1173         gpio_free(uart->rts_pin);
1174 #endif
1175
1176         platform_set_drvdata(pdev, NULL);
1177
1178         if (uart)
1179                 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1180
1181         return 0;
1182 }
1183
1184 static struct platform_driver bfin_serial_driver = {
1185         .probe          = bfin_serial_probe,
1186         .remove         = bfin_serial_remove,
1187         .suspend        = bfin_serial_suspend,
1188         .resume         = bfin_serial_resume,
1189         .driver         = {
1190                 .name   = "bfin-uart",
1191                 .owner  = THIS_MODULE,
1192         },
1193 };
1194
1195 static int __init bfin_serial_init(void)
1196 {
1197         int ret;
1198 #ifdef CONFIG_KGDB_UART
1199         struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1200         struct ktermios t;
1201 #endif
1202
1203         pr_info("Serial: Blackfin serial driver\n");
1204
1205         bfin_serial_init_ports();
1206
1207         ret = uart_register_driver(&bfin_serial_reg);
1208         if (ret == 0) {
1209                 bfin_serial_reg.tty_driver->set_ldisc = bfin_set_ldisc;
1210                 ret = platform_driver_register(&bfin_serial_driver);
1211                 if (ret) {
1212                         pr_debug("uart register failed\n");
1213                         uart_unregister_driver(&bfin_serial_reg);
1214                 }
1215         }
1216 #ifdef CONFIG_KGDB_UART
1217         if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1218                 request_irq(uart->port.irq, bfin_serial_rx_int,
1219                         IRQF_DISABLED, "BFIN_UART_RX", uart);
1220                 pr_info("Request irq for kgdb uart port\n");
1221                 UART_SET_IER(uart, ERBFI);
1222                 SSYNC();
1223                 t.c_cflag = CS8|B57600;
1224                 t.c_iflag = 0;
1225                 t.c_oflag = 0;
1226                 t.c_lflag = ICANON;
1227                 t.c_line = CONFIG_KGDB_UART_PORT;
1228                 bfin_serial_set_termios(&uart->port, &t, &t);
1229         }
1230 #endif
1231         return ret;
1232 }
1233
1234 static void __exit bfin_serial_exit(void)
1235 {
1236         platform_driver_unregister(&bfin_serial_driver);
1237         uart_unregister_driver(&bfin_serial_reg);
1238 }
1239
1240 module_init(bfin_serial_init);
1241 module_exit(bfin_serial_exit);
1242
1243 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1244 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1245 MODULE_LICENSE("GPL");
1246 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1247 MODULE_ALIAS("platform:bfin-uart");