2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Linux/SuperH Kernel Configuration"
13 The SuperH is a RISC processor targeted for use in embedded systems
14 and consumer electronics; it was also used in the Sega Dreamcast
15 gaming console. The SuperH port has a home page at
16 <http://www.linux-sh.org/>.
18 config RWSEM_GENERIC_SPINLOCK
22 config RWSEM_XCHGADD_ALGORITHM
29 config GENERIC_FIND_NEXT_BIT
33 config GENERIC_HWEIGHT
37 config GENERIC_HARDIRQS
41 config GENERIC_IRQ_PROBE
45 config GENERIC_CALIBRATE_DELAY
55 config GENERIC_CLOCKEVENTS
58 config SYS_SUPPORTS_PM
61 config SYS_SUPPORTS_APM_EMULATION
63 select SYS_SUPPORTS_PM
65 config SYS_SUPPORTS_SMP
68 config SYS_SUPPORTS_NUMA
71 config SYS_SUPPORTS_PCI
74 config ARCH_MAY_HAVE_PC_FDC
77 config STACKTRACE_SUPPORT
81 config LOCKDEP_SUPPORT
85 config ARCH_HAS_ILOG2_U32
89 config ARCH_HAS_ILOG2_U64
93 config ARCH_NO_VIRT_TO_BUS
100 source "arch/sh/mm/Kconfig"
102 menu "Processor features"
105 prompt "Endianess selection"
106 default CPU_LITTLE_ENDIAN
108 Some SuperH machines can be configured for either little or big
109 endian byte order. These modes require different kernels.
111 config CPU_LITTLE_ENDIAN
114 config CPU_BIG_ENDIAN
121 depends on CPU_HAS_FPU
124 Selecting this option will enable support for SH processors that
125 have FPU units (ie, SH77xx).
127 This option must be set in order to enable the FPU.
130 bool "FPU emulation support"
131 depends on !SH_FPU && EXPERIMENTAL
134 Selecting this option will enable support for software FPU emulation.
135 Most SH-3 users will want to say Y here, whereas most SH-4 users will
140 depends on CPU_HAS_DSP
143 Selecting this option will enable support for SH processors that
144 have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
146 This option must be set in order to enable the DSP.
153 Selecting this option will allow the Linux kernel to use SH3 on-chip
158 config SH_STORE_QUEUES
159 bool "Support for Store Queues"
162 Selecting this option will enable an in-kernel API for manipulating
163 the store queues integrated in the SH-4 processors.
165 config SPECULATIVE_EXECUTION
166 bool "Speculative subroutine return"
167 depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL
169 This enables support for a speculative instruction fetch for
170 subroutine return. There are various pitfalls associated with
171 this, as outlined in the SH7780 hardware manual.
175 config CPU_HAS_INTEVT
178 config CPU_HAS_MASKREG_IRQ
181 config CPU_HAS_IPR_IRQ
187 This will enable the use of SR.RB register bank usage. Processors
188 that are lacking this bit must have another method in place for
189 accomplishing what is taken care of by the banked registers.
191 See <file:Documentation/sh/register-banks.txt> for further
192 information on SR.RB and register banking in the kernel in general.
207 config SOLUTION_ENGINE
210 config SH_SOLUTION_ENGINE
211 bool "SolutionEngine"
212 select SOLUTION_ENGINE
213 select CPU_HAS_IPR_IRQ
214 depends on CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750
216 Select SolutionEngine if configuring for a Hitachi SH7709
217 or SH7750 evaluation board.
219 config SH_7206_SOLUTION_ENGINE
220 bool "SolutionEngine7206"
221 select SOLUTION_ENGINE
222 depends on CPU_SUBTYPE_SH7206
224 Select 7206 SolutionEngine if configuring for a Hitachi SH7206
227 config SH_7619_SOLUTION_ENGINE
228 bool "SolutionEngine7619"
229 select SOLUTION_ENGINE
230 depends on CPU_SUBTYPE_SH7619
232 Select 7619 SolutionEngine if configuring for a Hitachi SH7619
235 config SH_7722_SOLUTION_ENGINE
236 bool "SolutionEngine7722"
237 select SOLUTION_ENGINE
238 depends on CPU_SUBTYPE_SH7722
240 Select 7722 SolutionEngine if configuring for a Hitachi SH772
243 config SH_7751_SOLUTION_ENGINE
244 bool "SolutionEngine7751"
245 select SOLUTION_ENGINE
246 select CPU_HAS_IPR_IRQ
247 depends on CPU_SUBTYPE_SH7751
249 Select 7751 SolutionEngine if configuring for a Hitachi SH7751
252 config SH_7780_SOLUTION_ENGINE
253 bool "SolutionEngine7780"
254 select SOLUTION_ENGINE
255 select SYS_SUPPORTS_PCI
256 depends on CPU_SUBTYPE_SH7780
258 Select 7780 SolutionEngine if configuring for a Renesas SH7780
261 config SH_7343_SOLUTION_ENGINE
262 bool "SolutionEngine7343"
263 select SOLUTION_ENGINE
264 depends on CPU_SUBTYPE_SH7343
266 Select 7343 SolutionEngine if configuring for a Hitachi
267 SH7343 (SH-Mobile 3AS) evaluation board.
269 config SH_7751_SYSTEMH
271 depends on CPU_SUBTYPE_SH7751R
273 Select SystemH if you are configuring for a Renesas SystemH
274 7751R evaluation board.
278 select SYS_SUPPORTS_APM_EMULATION
279 select HD6446X_SERIES
280 depends on CPU_SUBTYPE_SH7709
282 Select HP6XX if configuring for a HP jornada HP6xx.
283 More information (hardware only) at
284 <http://www.hp.com/jornada/>.
288 select SYS_SUPPORTS_PCI
289 depends on CPU_SUBTYPE_SH7091
291 Select Dreamcast if configuring for a SEGA Dreamcast.
292 More information at <http://www.linux-sh.org>
295 bool "Interface MPC1211"
296 depends on CPU_SUBTYPE_SH7751 && BROKEN
298 CTP/PCI-SH02 is a CPU module computer that is produced
299 by Interface Corporation.
300 More information at <http://www.interface.co.jp>
303 bool "Interface CTP/PCI-SH03"
304 depends on CPU_SUBTYPE_SH7751
305 select CPU_HAS_IPR_IRQ
306 select SYS_SUPPORTS_PCI
308 CTP/PCI-SH03 is a CPU module computer that is produced
309 by Interface Corporation.
310 More information at <http://www.interface.co.jp>
312 config SH_SECUREEDGE5410
313 bool "SecureEdge5410"
314 depends on CPU_SUBTYPE_SH7751R
315 select CPU_HAS_IPR_IRQ
316 select SYS_SUPPORTS_PCI
318 Select SecureEdge5410 if configuring for a SnapGear SH board.
319 This includes both the OEM SecureEdge products as well as the
322 config SH_HS7751RVOIP
324 depends on CPU_SUBTYPE_SH7751R
326 Select HS7751RVOIP if configuring for a Renesas Technology
330 bool "SH7710-VOIP-GW"
331 depends on CPU_SUBTYPE_SH7710
333 Select this option to build a kernel for the SH7710 based
338 depends on CPU_SUBTYPE_SH7751R
339 select SYS_SUPPORTS_PCI
341 Select RTS7751R2D if configuring for a Renesas Technology
342 Sales SH-Graphics board.
346 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
347 select SYS_SUPPORTS_PCI
351 depends on CPU_SUBTYPE_SH7705
353 config SH_SH4202_MICRODEV
354 bool "SH4-202 MicroDev"
355 depends on CPU_SUBTYPE_SH4_202
357 Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
362 depends on CPU_SUBTYPE_SH7751R
363 select SYS_SUPPORTS_PCI
365 I-O DATA DEVICE, INC. "LANDISK Series" support.
369 depends on CPU_SUBTYPE_SH7751R
370 select CPU_HAS_IPR_IRQ
371 select SYS_SUPPORTS_PCI
373 Select Titan if you are configuring for a Nimble Microsystems
378 depends on CPU_SUBTYPE_SH7706
379 select CPU_HAS_IPR_IRQ
381 Select SHMIN if configuring for the SHMIN board.
385 depends on CPU_SUBTYPE_SH7751R
386 select SYS_SUPPORTS_PCI
388 Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2.
391 bool "SH-X3 Prototype board"
392 depends on CPU_SUBTYPE_SHX3
394 config SH_MAGIC_PANEL_R2
395 bool "Magic Panel R2"
396 depends on CPU_SUBTYPE_SH7720
398 Select Magic Panel R2 if configuring for Magic Panel R2.
402 source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
403 source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
404 source "arch/sh/boards/renesas/r7780rp/Kconfig"
405 source "arch/sh/boards/magicpanelr2/Kconfig"
407 menu "Timer and clock configuration"
410 bool "TMU timer support"
411 depends on CPU_SH3 || CPU_SH4
413 select GENERIC_CLOCKEVENTS
416 This enables the use of the TMU as the system timer.
419 bool "CMT timer support"
423 This enables the use of the CMT as the system timer.
426 bool "MTU2 timer support"
430 This enables the use of the MTU2 as the system timer.
434 default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
435 default "86" if CPU_SUBTYPE_SH7619
436 default "140" if CPU_SUBTYPE_SH7206
440 int "Peripheral clock frequency (in Hz)"
441 default "27000000" if CPU_SUBTYPE_SH7343
442 default "31250000" if CPU_SUBTYPE_SH7619
443 default "32000000" if CPU_SUBTYPE_SH7722
444 default "33333333" if CPU_SUBTYPE_SH7770 || \
445 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
447 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
448 default "66000000" if CPU_SUBTYPE_SH4_202
451 This option is used to specify the peripheral clock frequency.
452 This is necessary for determining the reference clock value on
453 platforms lacking an RTC.
456 int "CPU Mode Pin Setting"
457 depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
458 default 6 if CPU_SUBTYPE_SH7206
459 default 5 if CPU_SUBTYPE_SH7619
462 MD2 - MD0 pin setting.
464 source "kernel/time/Kconfig"
468 menu "CPU Frequency scaling"
470 source "drivers/cpufreq/Kconfig"
473 tristate "SuperH CPU Frequency driver"
475 select CPU_FREQ_TABLE
477 This adds the cpufreq driver for SuperH. At present, only
478 the SH-4 is supported.
480 For details, take a look at <file:Documentation/cpu-freq>.
486 source "arch/sh/drivers/Kconfig"
492 depends on SH_MPC1211
495 menu "Kernel features"
497 source kernel/Kconfig.hz
500 bool "kexec system call (EXPERIMENTAL)"
501 depends on EXPERIMENTAL
503 kexec is a system call that implements the ability to shutdown your
504 current kernel, and to start another kernel. It is like a reboot
505 but it is independent of the system firmware. And like a reboot
506 you can start any kernel with it, not just Linux.
508 The name comes from the similarity to the exec system call.
510 It is an ongoing process to be certain the hardware in a machine
511 is properly shutdown, so do not be surprised if this code does not
512 initially work for you. It may help to enable device hotplugging
513 support. As of this writing the exact hardware interface is
514 strongly in flux, so no good recommendation can be made.
517 bool "kernel crash dumps (EXPERIMENTAL)"
518 depends on EXPERIMENTAL
520 Generate crash dump after being started by kexec.
521 This should be normally only set in special crash dump kernels
522 which are loaded in the main kernel with kexec-tools into
523 a specially reserved region and then later executed after
524 a crash by kdump/kexec. The crash dump kernel must be compiled
525 to a memory address not used by the main kernel using
528 For more details see Documentation/kdump/kdump.txt
531 bool "Symmetric multi-processing support"
532 depends on SYS_SUPPORTS_SMP
534 This enables support for systems with more than one CPU. If you have
535 a system with only one CPU, like most personal computers, say N. If
536 you have a system with more than one CPU, say Y.
538 If you say N here, the kernel will run on single and multiprocessor
539 machines, but will use only one CPU of a multiprocessor machine. If
540 you say Y here, the kernel will run on many, but not all,
541 singleprocessor machines. On a singleprocessor machine, the kernel
542 will run faster if you say N here.
544 People using multiprocessor machines who say Y here should also say
545 Y to "Enhanced Real Time Clock Support", below.
547 See also the <file:Documentation/smp.txt>,
548 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available
549 at <http://www.tldp.org/docs.html#howto>.
551 If you don't know what to do here, say N.
554 int "Maximum number of CPUs (2-32)"
557 default "4" if CPU_SHX3
560 This allows you to specify the maximum number of CPUs which this
561 kernel will support. The maximum supported value is 32 and the
562 minimum value which makes sense is 2.
564 This is purely to save memory - each supported CPU adds
565 approximately eight kilobytes to the kernel image.
567 source "kernel/Kconfig.preempt"
573 This enables support for gUSA (general UserSpace Atomicity).
574 This is the default implementation for both UP and non-ll/sc
575 CPUs, and is used by the libc, amongst others.
577 For additional information, design information can be found
578 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
580 This should only be disabled for special cases where alternate
581 atomicity implementations exist.
587 config ZERO_PAGE_OFFSET
588 hex "Zero page offset"
589 default "0x00004000" if SH_MPC1211 || SH_SH03
590 default "0x00010000" if PAGE_SIZE_64KB
591 default "0x00002000" if PAGE_SIZE_8KB
594 This sets the default offset of zero page.
596 config BOOT_LINK_OFFSET
597 hex "Link address offset for booting"
600 This option allows you to set the link address offset of the zImage.
601 This can be useful if you are on a board which has a small amount of
605 bool "Wakeup UBC on startup"
608 Selecting this option will wakeup the User Break Controller (UBC) on
609 startup. Although the UBC is left in an awake state when the processor
610 comes up, some boot loaders misbehave by putting the UBC to sleep in a
611 power saving state, which causes issues with things like ptrace().
616 bool "Default bootloader kernel arguments"
619 string "Initial kernel command string"
620 depends on CMDLINE_BOOL
621 default "console=ttySC1,115200"
627 # Even on SuperH devices which don't have an ISA bus,
628 # this variable helps the PCMCIA modules handle
629 # IRQ requesting properly -- Greg Banks.
631 # Though we're generally not interested in it when
632 # we're not using PCMCIA, so we make it dependent on
633 # PCMCIA outright. -- PFM.
636 depends on PCMCIA && HD6446X_SERIES
638 Find out whether you have ISA slots on your motherboard. ISA is the
639 name of a bus system, i.e. the way the CPU talks to the other stuff
640 inside your box. Other bus systems are PCI, EISA, MicroChannel
641 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
642 newer boards don't support it. If you have ISA, say Y, otherwise N.
647 The Extended Industry Standard Architecture (EISA) bus was
648 developed as an open alternative to the IBM MicroChannel bus.
650 The EISA bus provided some of the features of the IBM MicroChannel
651 bus while maintaining backward compatibility with cards made for
652 the older ISA bus. The EISA bus saw limited use between 1988 and
653 1995 when it was made obsolete by the PCI bus.
655 Say Y here if you are building a kernel for an EISA-based machine.
662 MicroChannel Architecture is found in some IBM PS/2 machines and
663 laptops. It is a bus system similar to PCI or ISA. See
664 <file:Documentation/mca.txt> (and especially the web page given
665 there) before attempting to build an MCA bus kernel.
671 tristate "SuperHyway Bus support"
672 depends on CPU_SUBTYPE_SH4_202
675 bool "Maple Bus support"
676 depends on SH_DREAMCAST
678 The Maple Bus is SEGA's serial communication bus for peripherals
679 on the Dreamcast. Without this bus support you won't be able to
680 get your Dreamcast keyboard etc to work, so most users
681 probably want to say 'Y' here, unless you are only using the
682 Dreamcast with a serial line terminal or a remote network
686 bool "Compact Flash Enabler support"
687 depends on SOLUTION_ENGINE || SH_SH03
689 Compact Flash is a small, removable mass storage device introduced
690 in 1994 originally as a PCMCIA device. If you say `Y' here, you
691 compile in support for Compact Flash devices directly connected to
692 a SuperH processor. A Compact Flash FAQ is available at
693 <http://www.compactflash.org/faqs/faq.htm>.
695 If your board has "Directly Connected" CompactFlash at area 5 or 6,
696 you may want to enable this option. Then, you can use CF as
697 primary IDE drive (only tested for SanDisk).
699 If in doubt, select 'N'.
702 prompt "Compact Flash Connection Area"
703 depends on CF_ENABLER
709 If your board has "Directly Connected" CompactFlash, You should
710 select the area where your CF is connected to.
712 - "Area5" if CompactFlash is connected to Area 5 (0x14000000)
713 - "Area6" if it is connected to Area 6 (0x18000000)
715 "Area6" will work for most boards.
724 depends on CF_ENABLER
725 default "0xb8000000" if CF_AREA6
726 default "0xb4000000" if CF_AREA5
728 source "arch/sh/drivers/pci/Kconfig"
730 source "drivers/pci/Kconfig"
732 source "drivers/pcmcia/Kconfig"
734 source "drivers/pci/hotplug/Kconfig"
738 menu "Executable file formats"
740 source "fs/Kconfig.binfmt"
744 menu "Power management options (EXPERIMENTAL)"
745 depends on EXPERIMENTAL && SYS_SUPPORTS_PM
747 source kernel/power/Kconfig
753 source "drivers/Kconfig"
757 source "kernel/Kconfig.instrumentation"
759 source "arch/sh/Kconfig.debug"
761 source "security/Kconfig"
763 source "crypto/Kconfig"