1 /* sound/soc/s3c24xx/s3c-i2c-v2.c
3 * ALSA Soc Audio Layer - I2S core for newer Samsung SoCs.
5 * Copyright (c) 2006 Wolfson Microelectronics PLC.
6 * Graeme Gregory graeme.gregory@wolfsonmicro.com
7 * linux@wolfsonmicro.com
9 * Copyright (c) 2008, 2007, 2004-2005 Simtec Electronics
10 * http://armlinux.simtec.co.uk/
11 * Ben Dooks <ben@simtec.co.uk>
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/device.h>
22 #include <linux/delay.h>
23 #include <linux/clk.h>
24 #include <linux/kernel.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/initval.h>
31 #include <sound/soc.h>
33 #include <plat/regs-s3c2412-iis.h>
35 #include <plat/audio.h>
38 #include "s3c-i2s-v2.h"
40 #define S3C2412_I2S_DEBUG_CON 0
42 static inline struct s3c_i2sv2_info *to_info(struct snd_soc_dai *cpu_dai)
44 return cpu_dai->private_data;
47 #define bit_set(v, b) (((v) & (b)) ? 1 : 0)
49 #if S3C2412_I2S_DEBUG_CON
50 static void dbg_showcon(const char *fn, u32 con)
52 printk(KERN_DEBUG "%s: LRI=%d, TXFEMPT=%d, RXFEMPT=%d, TXFFULL=%d, RXFFULL=%d\n", fn,
53 bit_set(con, S3C2412_IISCON_LRINDEX),
54 bit_set(con, S3C2412_IISCON_TXFIFO_EMPTY),
55 bit_set(con, S3C2412_IISCON_RXFIFO_EMPTY),
56 bit_set(con, S3C2412_IISCON_TXFIFO_FULL),
57 bit_set(con, S3C2412_IISCON_RXFIFO_FULL));
59 printk(KERN_DEBUG "%s: PAUSE: TXDMA=%d, RXDMA=%d, TXCH=%d, RXCH=%d\n",
61 bit_set(con, S3C2412_IISCON_TXDMA_PAUSE),
62 bit_set(con, S3C2412_IISCON_RXDMA_PAUSE),
63 bit_set(con, S3C2412_IISCON_TXCH_PAUSE),
64 bit_set(con, S3C2412_IISCON_RXCH_PAUSE));
65 printk(KERN_DEBUG "%s: ACTIVE: TXDMA=%d, RXDMA=%d, IIS=%d\n", fn,
66 bit_set(con, S3C2412_IISCON_TXDMA_ACTIVE),
67 bit_set(con, S3C2412_IISCON_RXDMA_ACTIVE),
68 bit_set(con, S3C2412_IISCON_IIS_ACTIVE));
71 static inline void dbg_showcon(const char *fn, u32 con)
77 /* Turn on or off the transmission path. */
78 void s3c2412_snd_txctrl(struct s3c_i2sv2_info *i2s, int on)
80 void __iomem *regs = i2s->regs;
83 pr_debug("%s(%d)\n", __func__, on);
85 fic = readl(regs + S3C2412_IISFIC);
86 con = readl(regs + S3C2412_IISCON);
87 mod = readl(regs + S3C2412_IISMOD);
89 pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
92 con |= S3C2412_IISCON_TXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE;
93 con &= ~S3C2412_IISCON_TXDMA_PAUSE;
94 con &= ~S3C2412_IISCON_TXCH_PAUSE;
96 switch (mod & S3C2412_IISMOD_MODE_MASK) {
97 case S3C2412_IISMOD_MODE_TXONLY:
98 case S3C2412_IISMOD_MODE_TXRX:
99 /* do nothing, we are in the right mode */
102 case S3C2412_IISMOD_MODE_RXONLY:
103 mod &= ~S3C2412_IISMOD_MODE_MASK;
104 mod |= S3C2412_IISMOD_MODE_TXRX;
108 dev_err(i2s->dev, "TXEN: Invalid MODE %x in IISMOD\n",
109 mod & S3C2412_IISMOD_MODE_MASK);
113 writel(con, regs + S3C2412_IISCON);
114 writel(mod, regs + S3C2412_IISMOD);
116 /* Note, we do not have any indication that the FIFO problems
117 * tha the S3C2410/2440 had apply here, so we should be able
118 * to disable the DMA and TX without resetting the FIFOS.
121 con |= S3C2412_IISCON_TXDMA_PAUSE;
122 con |= S3C2412_IISCON_TXCH_PAUSE;
123 con &= ~S3C2412_IISCON_TXDMA_ACTIVE;
125 switch (mod & S3C2412_IISMOD_MODE_MASK) {
126 case S3C2412_IISMOD_MODE_TXRX:
127 mod &= ~S3C2412_IISMOD_MODE_MASK;
128 mod |= S3C2412_IISMOD_MODE_RXONLY;
131 case S3C2412_IISMOD_MODE_TXONLY:
132 mod &= ~S3C2412_IISMOD_MODE_MASK;
133 con &= ~S3C2412_IISCON_IIS_ACTIVE;
137 dev_err(i2s->dev, "TXDIS: Invalid MODE %xin IISMOD\n",
138 mod & S3C2412_IISMOD_MODE_MASK);
142 writel(mod, regs + S3C2412_IISMOD);
143 writel(con, regs + S3C2412_IISCON);
146 fic = readl(regs + S3C2412_IISFIC);
147 dbg_showcon(__func__, con);
148 pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
150 EXPORT_SYMBOL_GPL(s3c2412_snd_txctrl);
152 void s3c2412_snd_rxctrl(struct s3c_i2sv2_info *i2s, int on)
154 void __iomem *regs = i2s->regs;
157 pr_debug("%s(%d)\n", __func__, on);
159 fic = readl(regs + S3C2412_IISFIC);
160 con = readl(regs + S3C2412_IISCON);
161 mod = readl(regs + S3C2412_IISMOD);
163 pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
166 con |= S3C2412_IISCON_RXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE;
167 con &= ~S3C2412_IISCON_RXDMA_PAUSE;
168 con &= ~S3C2412_IISCON_RXCH_PAUSE;
170 switch (mod & S3C2412_IISMOD_MODE_MASK) {
171 case S3C2412_IISMOD_MODE_TXRX:
172 case S3C2412_IISMOD_MODE_RXONLY:
173 /* do nothing, we are in the right mode */
176 case S3C2412_IISMOD_MODE_TXONLY:
177 mod &= ~S3C2412_IISMOD_MODE_MASK;
178 mod |= S3C2412_IISMOD_MODE_TXRX;
182 dev_err(i2s->dev, "RXEN: Invalid MODE %x in IISMOD\n",
183 mod & S3C2412_IISMOD_MODE_MASK);
186 writel(mod, regs + S3C2412_IISMOD);
187 writel(con, regs + S3C2412_IISCON);
189 /* See txctrl notes on FIFOs. */
191 con &= ~S3C2412_IISCON_RXDMA_ACTIVE;
192 con |= S3C2412_IISCON_RXDMA_PAUSE;
193 con |= S3C2412_IISCON_RXCH_PAUSE;
195 switch (mod & S3C2412_IISMOD_MODE_MASK) {
196 case S3C2412_IISMOD_MODE_RXONLY:
197 con &= ~S3C2412_IISCON_IIS_ACTIVE;
198 mod &= ~S3C2412_IISMOD_MODE_MASK;
201 case S3C2412_IISMOD_MODE_TXRX:
202 mod &= ~S3C2412_IISMOD_MODE_MASK;
203 mod |= S3C2412_IISMOD_MODE_TXONLY;
207 dev_err(i2s->dev, "RXEN: Invalid MODE %x in IISMOD\n",
208 mod & S3C2412_IISMOD_MODE_MASK);
211 writel(con, regs + S3C2412_IISCON);
212 writel(mod, regs + S3C2412_IISMOD);
215 fic = readl(regs + S3C2412_IISFIC);
216 pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
218 EXPORT_SYMBOL_GPL(s3c2412_snd_rxctrl);
221 * Wait for the LR signal to allow synchronisation to the L/R clock
222 * from the codec. May only be needed for slave mode.
224 static int s3c2412_snd_lrsync(struct s3c_i2sv2_info *i2s)
227 unsigned long timeout = jiffies + msecs_to_jiffies(5);
229 pr_debug("Entered %s\n", __func__);
232 iiscon = readl(i2s->regs + S3C2412_IISCON);
233 if (iiscon & S3C2412_IISCON_LRINDEX)
236 if (timeout < jiffies) {
237 printk(KERN_ERR "%s: timeout\n", __func__);
246 * Set S3C2412 I2S DAI format
248 static int s3c2412_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
251 struct s3c_i2sv2_info *i2s = to_info(cpu_dai);
254 pr_debug("Entered %s\n", __func__);
256 iismod = readl(i2s->regs + S3C2412_IISMOD);
257 pr_debug("hw_params r: IISMOD: %x \n", iismod);
259 #if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
260 #define IISMOD_MASTER_MASK S3C2412_IISMOD_MASTER_MASK
261 #define IISMOD_SLAVE S3C2412_IISMOD_SLAVE
262 #define IISMOD_MASTER S3C2412_IISMOD_MASTER_INTERNAL
265 #if defined(CONFIG_PLAT_S3C64XX)
266 /* From Rev1.1 datasheet, we have two master and two slave modes:
268 * 00 = master mode, fed from PCLK
269 * 01 = master mode, fed from CLKAUDIO
270 * 10 = slave mode, using PCLK
271 * 11 = slave mode, using I2SCLK
273 #define IISMOD_MASTER_MASK (1 << 11)
274 #define IISMOD_SLAVE (1 << 11)
275 #define IISMOD_MASTER (0x0)
278 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
279 case SND_SOC_DAIFMT_CBM_CFM:
281 iismod &= ~IISMOD_MASTER_MASK;
282 iismod |= IISMOD_SLAVE;
284 case SND_SOC_DAIFMT_CBS_CFS:
286 iismod &= ~IISMOD_MASTER_MASK;
287 iismod |= IISMOD_MASTER;
290 pr_err("unknwon master/slave format\n");
294 iismod &= ~S3C2412_IISMOD_SDF_MASK;
296 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
297 case SND_SOC_DAIFMT_RIGHT_J:
298 iismod |= S3C2412_IISMOD_SDF_MSB;
300 case SND_SOC_DAIFMT_LEFT_J:
301 iismod |= S3C2412_IISMOD_SDF_LSB;
303 case SND_SOC_DAIFMT_I2S:
304 iismod |= S3C2412_IISMOD_SDF_IIS;
307 pr_err("Unknown data format\n");
311 writel(iismod, i2s->regs + S3C2412_IISMOD);
312 pr_debug("hw_params w: IISMOD: %x \n", iismod);
316 static int s3c2412_i2s_hw_params(struct snd_pcm_substream *substream,
317 struct snd_pcm_hw_params *params,
318 struct snd_soc_dai *socdai)
320 struct snd_soc_pcm_runtime *rtd = substream->private_data;
321 struct snd_soc_dai_link *dai = rtd->dai;
322 struct s3c_i2sv2_info *i2s = to_info(dai->cpu_dai);
325 pr_debug("Entered %s\n", __func__);
327 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
328 dai->cpu_dai->dma_data = i2s->dma_playback;
330 dai->cpu_dai->dma_data = i2s->dma_capture;
332 /* Working copies of register */
333 iismod = readl(i2s->regs + S3C2412_IISMOD);
334 pr_debug("%s: r: IISMOD: %x\n", __func__, iismod);
336 switch (params_format(params)) {
337 case SNDRV_PCM_FORMAT_S8:
338 iismod |= S3C2412_IISMOD_8BIT;
340 case SNDRV_PCM_FORMAT_S16_LE:
341 iismod &= ~S3C2412_IISMOD_8BIT;
345 writel(iismod, i2s->regs + S3C2412_IISMOD);
346 pr_debug("%s: w: IISMOD: %x\n", __func__, iismod);
350 static int s3c2412_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
351 struct snd_soc_dai *dai)
353 struct snd_soc_pcm_runtime *rtd = substream->private_data;
354 struct s3c_i2sv2_info *i2s = to_info(rtd->dai->cpu_dai);
355 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
359 pr_debug("Entered %s\n", __func__);
362 case SNDRV_PCM_TRIGGER_START:
363 /* On start, ensure that the FIFOs are cleared and reset. */
365 writel(capture ? S3C2412_IISFIC_RXFLUSH : S3C2412_IISFIC_TXFLUSH,
366 i2s->regs + S3C2412_IISFIC);
368 /* clear again, just in case */
369 writel(0x0, i2s->regs + S3C2412_IISFIC);
371 case SNDRV_PCM_TRIGGER_RESUME:
372 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
374 ret = s3c2412_snd_lrsync(i2s);
379 local_irq_save(irqs);
382 s3c2412_snd_rxctrl(i2s, 1);
384 s3c2412_snd_txctrl(i2s, 1);
386 local_irq_restore(irqs);
389 case SNDRV_PCM_TRIGGER_STOP:
390 case SNDRV_PCM_TRIGGER_SUSPEND:
391 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
392 local_irq_save(irqs);
395 s3c2412_snd_rxctrl(i2s, 0);
397 s3c2412_snd_txctrl(i2s, 0);
399 local_irq_restore(irqs);
411 * Set S3C2412 Clock dividers
413 static int s3c2412_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai,
416 struct s3c_i2sv2_info *i2s = to_info(cpu_dai);
419 pr_debug("%s(%p, %d, %d)\n", __func__, cpu_dai, div_id, div);
422 case S3C_I2SV2_DIV_BCLK:
423 reg = readl(i2s->regs + S3C2412_IISMOD);
424 reg &= ~S3C2412_IISMOD_BCLK_MASK;
425 writel(reg | div, i2s->regs + S3C2412_IISMOD);
427 pr_debug("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD));
430 case S3C_I2SV2_DIV_RCLK:
432 /* convert value to bit field */
436 div = S3C2412_IISMOD_RCLK_256FS;
440 div = S3C2412_IISMOD_RCLK_384FS;
444 div = S3C2412_IISMOD_RCLK_512FS;
448 div = S3C2412_IISMOD_RCLK_768FS;
456 reg = readl(i2s->regs + S3C2412_IISMOD);
457 reg &= ~S3C2412_IISMOD_RCLK_MASK;
458 writel(reg | div, i2s->regs + S3C2412_IISMOD);
459 pr_debug("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD));
462 case S3C_I2SV2_DIV_PRESCALER:
464 writel((div << 8) | S3C2412_IISPSR_PSREN,
465 i2s->regs + S3C2412_IISPSR);
467 writel(0x0, i2s->regs + S3C2412_IISPSR);
469 pr_debug("%s: PSR=%08x\n", __func__, readl(i2s->regs + S3C2412_IISPSR));
479 /* default table of all avaialable root fs divisors */
480 static unsigned int iis_fs_tab[] = { 256, 512, 384, 768 };
482 int s3c_i2sv2_iis_calc_rate(struct s3c_i2sv2_rate_calc *info,
484 unsigned int rate, struct clk *clk)
486 unsigned long clkrate = clk_get_rate(clk);
492 signed int deviation = 0;
493 unsigned int best_fs = 0;
494 unsigned int best_div = 0;
495 unsigned int best_rate = 0;
496 unsigned int best_deviation = INT_MAX;
501 for (fs = 0; fs < ARRAY_SIZE(iis_fs_tab); fs++) {
502 fsdiv = iis_fs_tab[fs];
504 fsclk = clkrate / fsdiv;
507 if ((fsclk % rate) > (rate / 2))
513 actual = clkrate / (fsdiv * div);
514 deviation = actual - rate;
516 printk(KERN_DEBUG "%dfs: div %d => result %d, deviation %d\n",
517 fsdiv, div, actual, deviation);
519 deviation = abs(deviation);
521 if (deviation < best_deviation) {
525 best_deviation = deviation;
532 printk(KERN_DEBUG "best: fs=%d, div=%d, rate=%d\n",
533 best_fs, best_div, best_rate);
535 info->fs_div = best_fs;
536 info->clk_div = best_div;
540 EXPORT_SYMBOL_GPL(s3c_i2sv2_iis_calc_rate);
542 int s3c_i2sv2_probe(struct platform_device *pdev,
543 struct snd_soc_dai *dai,
544 struct s3c_i2sv2_info *i2s,
547 struct device *dev = &pdev->dev;
551 /* record our i2s structure for later use in the callbacks */
552 dai->private_data = i2s;
554 i2s->regs = ioremap(base, 0x100);
555 if (i2s->regs == NULL) {
556 dev_err(dev, "cannot ioremap registers\n");
560 i2s->iis_pclk = clk_get(dev, "iis");
561 if (i2s->iis_pclk == NULL) {
562 dev_err(dev, "failed to get iis_clock\n");
567 clk_enable(i2s->iis_pclk);
569 s3c2412_snd_txctrl(i2s, 0);
570 s3c2412_snd_rxctrl(i2s, 0);
575 EXPORT_SYMBOL_GPL(s3c_i2sv2_probe);
578 static int s3c2412_i2s_suspend(struct snd_soc_dai *dai)
580 struct s3c_i2sv2_info *i2s = to_info(dai);
584 i2s->suspend_iismod = readl(i2s->regs + S3C2412_IISMOD);
585 i2s->suspend_iiscon = readl(i2s->regs + S3C2412_IISCON);
586 i2s->suspend_iispsr = readl(i2s->regs + S3C2412_IISPSR);
588 /* some basic suspend checks */
590 iismod = readl(i2s->regs + S3C2412_IISMOD);
592 if (iismod & S3C2412_IISCON_RXDMA_ACTIVE)
593 pr_warning("%s: RXDMA active?\n", __func__);
595 if (iismod & S3C2412_IISCON_TXDMA_ACTIVE)
596 pr_warning("%s: TXDMA active?\n", __func__);
598 if (iismod & S3C2412_IISCON_IIS_ACTIVE)
599 pr_warning("%s: IIS active\n", __func__);
605 static int s3c2412_i2s_resume(struct snd_soc_dai *dai)
607 struct s3c_i2sv2_info *i2s = to_info(dai);
609 pr_info("dai_active %d, IISMOD %08x, IISCON %08x\n",
610 dai->active, i2s->suspend_iismod, i2s->suspend_iiscon);
613 writel(i2s->suspend_iiscon, i2s->regs + S3C2412_IISCON);
614 writel(i2s->suspend_iismod, i2s->regs + S3C2412_IISMOD);
615 writel(i2s->suspend_iispsr, i2s->regs + S3C2412_IISPSR);
617 writel(S3C2412_IISFIC_RXFLUSH | S3C2412_IISFIC_TXFLUSH,
618 i2s->regs + S3C2412_IISFIC);
621 writel(0x0, i2s->regs + S3C2412_IISFIC);
627 #define s3c2412_i2s_suspend NULL
628 #define s3c2412_i2s_resume NULL
631 int s3c_i2sv2_register_dai(struct snd_soc_dai *dai)
633 struct snd_soc_dai_ops *ops = dai->ops;
635 ops->trigger = s3c2412_i2s_trigger;
636 ops->hw_params = s3c2412_i2s_hw_params;
637 ops->set_fmt = s3c2412_i2s_set_fmt;
638 ops->set_clkdiv = s3c2412_i2s_set_clkdiv;
640 dai->suspend = s3c2412_i2s_suspend;
641 dai->resume = s3c2412_i2s_resume;
643 return snd_soc_register_dai(dai);
645 EXPORT_SYMBOL_GPL(s3c_i2sv2_register_dai);
647 MODULE_LICENSE("GPL");