git.oblomov.eu Git - linux-2.6/blob - drivers/usb/gadget/langwell_udc.c

   1 /*
   2  * Intel Langwell USB Device Controller driver
   3  * Copyright (C) 2008-2009, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  */
  19
  20
  21 /* #undef       DEBUG */
  22 /* #undef       VERBOSE */
  23
  24 #if defined(CONFIG_USB_LANGWELL_OTG)
  25 #define OTG_TRANSCEIVER
  26 #endif
  27
  28
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/kernel.h>
  33 #include <linux/delay.h>
  34 #include <linux/ioport.h>
  35 #include <linux/sched.h>
  36 #include <linux/slab.h>
  37 #include <linux/smp_lock.h>
  38 #include <linux/errno.h>
  39 #include <linux/init.h>
  40 #include <linux/timer.h>
  41 #include <linux/list.h>
  42 #include <linux/interrupt.h>
  43 #include <linux/moduleparam.h>
  44 #include <linux/device.h>
  45 #include <linux/usb/ch9.h>
  46 #include <linux/usb/gadget.h>
  47 #include <linux/usb/otg.h>
  48 #include <linux/pm.h>
  49 #include <linux/io.h>
  50 #include <linux/irq.h>
  51 #include <asm/system.h>
  52 #include <asm/unaligned.h>
  53
  54 #include "langwell_udc.h"
  55
  56
  57 #define DRIVER_DESC             "Intel Langwell USB Device Controller driver"
  58 #define DRIVER_VERSION          "16 May 2009"
  59
  60 static const char driver_name[] = "langwell_udc";
  61 static const char driver_desc[] = DRIVER_DESC;
  62
  63
  64 /* controller device global variable */
  65 static struct langwell_udc      *the_controller;
  66
  67 /* for endpoint 0 operations */
  68 static const struct usb_endpoint_descriptor
  69 langwell_ep0_desc = {
  70         .bLength =              USB_DT_ENDPOINT_SIZE,
  71         .bDescriptorType =      USB_DT_ENDPOINT,
  72         .bEndpointAddress =     0,
  73         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
  74         .wMaxPacketSize =       EP0_MAX_PKT_SIZE,
  75 };
  76
  77
  78 /*-------------------------------------------------------------------------*/
  79 /* debugging */
  80
  81 #ifdef  DEBUG
  82 #define DBG(dev, fmt, args...) \
  83         pr_debug("%s %s: " fmt , driver_name, \
  84                         pci_name(dev->pdev), ## args)
  85 #else
  86 #define DBG(dev, fmt, args...) \
  87         do { } while (0)
  88 #endif /* DEBUG */
  89
  90
  91 #ifdef  VERBOSE
  92 #define VDBG DBG
  93 #else
  94 #define VDBG(dev, fmt, args...) \
  95         do { } while (0)
  96 #endif  /* VERBOSE */
  97
  98
  99 #define ERROR(dev, fmt, args...) \
 100         pr_err("%s %s: " fmt , driver_name, \
 101                         pci_name(dev->pdev), ## args)
 102
 103 #define WARNING(dev, fmt, args...) \
 104         pr_warning("%s %s: " fmt , driver_name, \
 105                         pci_name(dev->pdev), ## args)
 106
 107 #define INFO(dev, fmt, args...) \
 108         pr_info("%s %s: " fmt , driver_name, \
 109                         pci_name(dev->pdev), ## args)
 110
 111
 112 #ifdef  VERBOSE
 113 static inline void print_all_registers(struct langwell_udc *dev)
 114 {
 115         int     i;
 116
 117         /* Capability Registers */
 118         printk(KERN_DEBUG "Capability Registers (offset: "
 119                         "0x%04x, length: 0x%08x)\n",
 120                         CAP_REG_OFFSET,
 121                         (u32)sizeof(struct langwell_cap_regs));
 122         printk(KERN_DEBUG "caplength=0x%02x\n",
 123                         readb(&dev->cap_regs->caplength));
 124         printk(KERN_DEBUG "hciversion=0x%04x\n",
 125                         readw(&dev->cap_regs->hciversion));
 126         printk(KERN_DEBUG "hcsparams=0x%08x\n",
 127                         readl(&dev->cap_regs->hcsparams));
 128         printk(KERN_DEBUG "hccparams=0x%08x\n",
 129                         readl(&dev->cap_regs->hccparams));
 130         printk(KERN_DEBUG "dciversion=0x%04x\n",
 131                         readw(&dev->cap_regs->dciversion));
 132         printk(KERN_DEBUG "dccparams=0x%08x\n",
 133                         readl(&dev->cap_regs->dccparams));
 134
 135         /* Operational Registers */
 136         printk(KERN_DEBUG "Operational Registers (offset: "
 137                         "0x%04x, length: 0x%08x)\n",
 138                         OP_REG_OFFSET,
 139                         (u32)sizeof(struct langwell_op_regs));
 140         printk(KERN_DEBUG "extsts=0x%08x\n",
 141                         readl(&dev->op_regs->extsts));
 142         printk(KERN_DEBUG "extintr=0x%08x\n",
 143                         readl(&dev->op_regs->extintr));
 144         printk(KERN_DEBUG "usbcmd=0x%08x\n",
 145                         readl(&dev->op_regs->usbcmd));
 146         printk(KERN_DEBUG "usbsts=0x%08x\n",
 147                         readl(&dev->op_regs->usbsts));
 148         printk(KERN_DEBUG "usbintr=0x%08x\n",
 149                         readl(&dev->op_regs->usbintr));
 150         printk(KERN_DEBUG "frindex=0x%08x\n",
 151                         readl(&dev->op_regs->frindex));
 152         printk(KERN_DEBUG "ctrldssegment=0x%08x\n",
 153                         readl(&dev->op_regs->ctrldssegment));
 154         printk(KERN_DEBUG "deviceaddr=0x%08x\n",
 155                         readl(&dev->op_regs->deviceaddr));
 156         printk(KERN_DEBUG "endpointlistaddr=0x%08x\n",
 157                         readl(&dev->op_regs->endpointlistaddr));
 158         printk(KERN_DEBUG "ttctrl=0x%08x\n",
 159                         readl(&dev->op_regs->ttctrl));
 160         printk(KERN_DEBUG "burstsize=0x%08x\n",
 161                         readl(&dev->op_regs->burstsize));
 162         printk(KERN_DEBUG "txfilltuning=0x%08x\n",
 163                         readl(&dev->op_regs->txfilltuning));
 164         printk(KERN_DEBUG "txttfilltuning=0x%08x\n",
 165                         readl(&dev->op_regs->txttfilltuning));
 166         printk(KERN_DEBUG "ic_usb=0x%08x\n",
 167                         readl(&dev->op_regs->ic_usb));
 168         printk(KERN_DEBUG "ulpi_viewport=0x%08x\n",
 169                         readl(&dev->op_regs->ulpi_viewport));
 170         printk(KERN_DEBUG "configflag=0x%08x\n",
 171                         readl(&dev->op_regs->configflag));
 172         printk(KERN_DEBUG "portsc1=0x%08x\n",
 173                         readl(&dev->op_regs->portsc1));
 174         printk(KERN_DEBUG "devlc=0x%08x\n",
 175                         readl(&dev->op_regs->devlc));
 176         printk(KERN_DEBUG "otgsc=0x%08x\n",
 177                         readl(&dev->op_regs->otgsc));
 178         printk(KERN_DEBUG "usbmode=0x%08x\n",
 179                         readl(&dev->op_regs->usbmode));
 180         printk(KERN_DEBUG "endptnak=0x%08x\n",
 181                         readl(&dev->op_regs->endptnak));
 182         printk(KERN_DEBUG "endptnaken=0x%08x\n",
 183                         readl(&dev->op_regs->endptnaken));
 184         printk(KERN_DEBUG "endptsetupstat=0x%08x\n",
 185                         readl(&dev->op_regs->endptsetupstat));
 186         printk(KERN_DEBUG "endptprime=0x%08x\n",
 187                         readl(&dev->op_regs->endptprime));
 188         printk(KERN_DEBUG "endptflush=0x%08x\n",
 189                         readl(&dev->op_regs->endptflush));
 190         printk(KERN_DEBUG "endptstat=0x%08x\n",
 191                         readl(&dev->op_regs->endptstat));
 192         printk(KERN_DEBUG "endptcomplete=0x%08x\n",
 193                         readl(&dev->op_regs->endptcomplete));
 194
 195         for (i = 0; i < dev->ep_max / 2; i++) {
 196                 printk(KERN_DEBUG "endptctrl[%d]=0x%08x\n",
 197                                 i, readl(&dev->op_regs->endptctrl[i]));
 198         }
 199 }
 200 #endif /* VERBOSE */
 201
 202
 203 /*-------------------------------------------------------------------------*/
 204
 205 #define DIR_STRING(bAddress)    (((bAddress) & USB_DIR_IN) ? "in" : "out")
 206
 207 #define is_in(ep)       (((ep)->ep_num == 0) ? ((ep)->dev->ep0_dir == \
 208                         USB_DIR_IN) : ((ep)->desc->bEndpointAddress \
 209                         & USB_DIR_IN) == USB_DIR_IN)
 210
 211
 212 #ifdef  DEBUG
 213 static char *type_string(u8 bmAttributes)
 214 {
 215         switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
 216         case USB_ENDPOINT_XFER_BULK:
 217                 return "bulk";
 218         case USB_ENDPOINT_XFER_ISOC:
 219                 return "iso";
 220         case USB_ENDPOINT_XFER_INT:
 221                 return "int";
 222         };
 223
 224         return "control";
 225 }
 226 #endif
 227
 228
 229 /* configure endpoint control registers */
 230 static void ep_reset(struct langwell_ep *ep, unsigned char ep_num,
 231                 unsigned char is_in, unsigned char ep_type)
 232 {
 233         struct langwell_udc     *dev;
 234         u32                     endptctrl;
 235
 236         dev = ep->dev;
 237         VDBG(dev, "---> %s()\n", __func__);
 238
 239         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 240         if (is_in) {    /* TX */
 241                 if (ep_num)
 242                         endptctrl |= EPCTRL_TXR;
 243                 endptctrl |= EPCTRL_TXE;
 244                 endptctrl |= ep_type << EPCTRL_TXT_SHIFT;
 245         } else {        /* RX */
 246                 if (ep_num)
 247                         endptctrl |= EPCTRL_RXR;
 248                 endptctrl |= EPCTRL_RXE;
 249                 endptctrl |= ep_type << EPCTRL_RXT_SHIFT;
 250         }
 251
 252         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 253
 254         VDBG(dev, "<--- %s()\n", __func__);
 255 }
 256
 257
 258 /* reset ep0 dQH and endptctrl */
 259 static void ep0_reset(struct langwell_udc *dev)
 260 {
 261         struct langwell_ep      *ep;
 262         int                     i;
 263
 264         VDBG(dev, "---> %s()\n", __func__);
 265
 266         /* ep0 in and out */
 267         for (i = 0; i < 2; i++) {
 268                 ep = &dev->ep[i];
 269                 ep->dev = dev;
 270
 271                 /* ep0 dQH */
 272                 ep->dqh = &dev->ep_dqh[i];
 273
 274                 /* configure ep0 endpoint capabilities in dQH */
 275                 ep->dqh->dqh_ios = 1;
 276                 ep->dqh->dqh_mpl = EP0_MAX_PKT_SIZE;
 277
 278                 /* FIXME: enable ep0-in HW zero length termination select */
 279                 if (is_in(ep))
 280                         ep->dqh->dqh_zlt = 0;
 281                 ep->dqh->dqh_mult = 0;
 282
 283                 /* configure ep0 control registers */
 284                 ep_reset(&dev->ep[0], 0, i, USB_ENDPOINT_XFER_CONTROL);
 285         }
 286
 287         VDBG(dev, "<--- %s()\n", __func__);
 288         return;
 289 }
 290
 291
 292 /*-------------------------------------------------------------------------*/
 293
 294 /* endpoints operations */
 295
 296 /* configure endpoint, making it usable */
 297 static int langwell_ep_enable(struct usb_ep *_ep,
 298                 const struct usb_endpoint_descriptor *desc)
 299 {
 300         struct langwell_udc     *dev;
 301         struct langwell_ep      *ep;
 302         u16                     max = 0;
 303         unsigned long           flags;
 304         int                     retval = 0;
 305         unsigned char           zlt, ios = 0, mult = 0;
 306
 307         ep = container_of(_ep, struct langwell_ep, ep);
 308         dev = ep->dev;
 309         VDBG(dev, "---> %s()\n", __func__);
 310
 311         if (!_ep || !desc || ep->desc
 312                         || desc->bDescriptorType != USB_DT_ENDPOINT)
 313                 return -EINVAL;
 314
 315         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
 316                 return -ESHUTDOWN;
 317
 318         max = le16_to_cpu(desc->wMaxPacketSize);
 319
 320         /*
 321          * disable HW zero length termination select
 322          * driver handles zero length packet through req->req.zero
 323          */
 324         zlt = 1;
 325
 326         /*
 327          * sanity check type, direction, address, and then
 328          * initialize the endpoint capabilities fields in dQH
 329          */
 330         switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
 331         case USB_ENDPOINT_XFER_CONTROL:
 332                 ios = 1;
 333                 break;
 334         case USB_ENDPOINT_XFER_BULK:
 335                 if ((dev->gadget.speed == USB_SPEED_HIGH
 336                                         && max != 512)
 337                                 || (dev->gadget.speed == USB_SPEED_FULL
 338                                         && max > 64)) {
 339                         goto done;
 340                 }
 341                 break;
 342         case USB_ENDPOINT_XFER_INT:
 343                 if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
 344                         goto done;
 345
 346                 switch (dev->gadget.speed) {
 347                 case USB_SPEED_HIGH:
 348                         if (max <= 1024)
 349                                 break;
 350                 case USB_SPEED_FULL:
 351                         if (max <= 64)
 352                                 break;
 353                 default:
 354                         if (max <= 8)
 355                                 break;
 356                         goto done;
 357                 }
 358                 break;
 359         case USB_ENDPOINT_XFER_ISOC:
 360                 if (strstr(ep->ep.name, "-bulk")
 361                                 || strstr(ep->ep.name, "-int"))
 362                         goto done;
 363
 364                 switch (dev->gadget.speed) {
 365                 case USB_SPEED_HIGH:
 366                         if (max <= 1024)
 367                                 break;
 368                 case USB_SPEED_FULL:
 369                         if (max <= 1023)
 370                                 break;
 371                 default:
 372                         goto done;
 373                 }
 374                 /*
 375                  * FIXME:
 376                  * calculate transactions needed for high bandwidth iso
 377                  */
 378                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
 379                 max = max & 0x8ff;      /* bit 0~10 */
 380                 /* 3 transactions at most */
 381                 if (mult > 3)
 382                         goto done;
 383                 break;
 384         default:
 385                 goto done;
 386         }
 387
 388         spin_lock_irqsave(&dev->lock, flags);
 389
 390         /* configure endpoint capabilities in dQH */
 391         ep->dqh->dqh_ios = ios;
 392         ep->dqh->dqh_mpl = cpu_to_le16(max);
 393         ep->dqh->dqh_zlt = zlt;
 394         ep->dqh->dqh_mult = mult;
 395
 396         ep->ep.maxpacket = max;
 397         ep->desc = desc;
 398         ep->stopped = 0;
 399         ep->ep_num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
 400
 401         /* ep_type */
 402         ep->ep_type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
 403
 404         /* configure endpoint control registers */
 405         ep_reset(ep, ep->ep_num, is_in(ep), ep->ep_type);
 406
 407         DBG(dev, "enabled %s (ep%d%s-%s), max %04x\n",
 408                         _ep->name,
 409                         ep->ep_num,
 410                         DIR_STRING(desc->bEndpointAddress),
 411                         type_string(desc->bmAttributes),
 412                         max);
 413
 414         spin_unlock_irqrestore(&dev->lock, flags);
 415 done:
 416         VDBG(dev, "<--- %s()\n", __func__);
 417         return retval;
 418 }
 419
 420
 421 /*-------------------------------------------------------------------------*/
 422
 423 /* retire a request */
 424 static void done(struct langwell_ep *ep, struct langwell_request *req,
 425                 int status)
 426 {
 427         struct langwell_udc     *dev = ep->dev;
 428         unsigned                stopped = ep->stopped;
 429         struct langwell_dtd     *curr_dtd, *next_dtd;
 430         int                     i;
 431
 432         VDBG(dev, "---> %s()\n", __func__);
 433
 434         /* remove the req from ep->queue */
 435         list_del_init(&req->queue);
 436
 437         if (req->req.status == -EINPROGRESS)
 438                 req->req.status = status;
 439         else
 440                 status = req->req.status;
 441
 442         /* free dTD for the request */
 443         next_dtd = req->head;
 444         for (i = 0; i < req->dtd_count; i++) {
 445                 curr_dtd = next_dtd;
 446                 if (i != req->dtd_count - 1)
 447                         next_dtd = curr_dtd->next_dtd_virt;
 448                 dma_pool_free(dev->dtd_pool, curr_dtd, curr_dtd->dtd_dma);
 449         }
 450
 451         if (req->mapped) {
 452                 dma_unmap_single(&dev->pdev->dev, req->req.dma, req->req.length,
 453                         is_in(ep) ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
 454                 req->req.dma = DMA_ADDR_INVALID;
 455                 req->mapped = 0;
 456         } else
 457                 dma_sync_single_for_cpu(&dev->pdev->dev, req->req.dma,
 458                                 req->req.length,
 459                                 is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 460
 461         if (status != -ESHUTDOWN)
 462                 DBG(dev, "complete %s, req %p, stat %d, len %u/%u\n",
 463                         ep->ep.name, &req->req, status,
 464                         req->req.actual, req->req.length);
 465
 466         /* don't modify queue heads during completion callback */
 467         ep->stopped = 1;
 468
 469         spin_unlock(&dev->lock);
 470         /* complete routine from gadget driver */
 471         if (req->req.complete)
 472                 req->req.complete(&ep->ep, &req->req);
 473
 474         spin_lock(&dev->lock);
 475         ep->stopped = stopped;
 476
 477         VDBG(dev, "<--- %s()\n", __func__);
 478 }
 479
 480
 481 static void langwell_ep_fifo_flush(struct usb_ep *_ep);
 482
 483 /* delete all endpoint requests, called with spinlock held */
 484 static void nuke(struct langwell_ep *ep, int status)
 485 {
 486         /* called with spinlock held */
 487         ep->stopped = 1;
 488
 489         /* endpoint fifo flush */
 490         if (&ep->ep && ep->desc)
 491                 langwell_ep_fifo_flush(&ep->ep);
 492
 493         while (!list_empty(&ep->queue)) {
 494                 struct langwell_request *req = NULL;
 495                 req = list_entry(ep->queue.next, struct langwell_request,
 496                                 queue);
 497                 done(ep, req, status);
 498         }
 499 }
 500
 501
 502 /*-------------------------------------------------------------------------*/
 503
 504 /* endpoint is no longer usable */
 505 static int langwell_ep_disable(struct usb_ep *_ep)
 506 {
 507         struct langwell_ep      *ep;
 508         unsigned long           flags;
 509         struct langwell_udc     *dev;
 510         int                     ep_num;
 511         u32                     endptctrl;
 512
 513         ep = container_of(_ep, struct langwell_ep, ep);
 514         dev = ep->dev;
 515         VDBG(dev, "---> %s()\n", __func__);
 516
 517         if (!_ep || !ep->desc)
 518                 return -EINVAL;
 519
 520         spin_lock_irqsave(&dev->lock, flags);
 521
 522         /* disable endpoint control register */
 523         ep_num = ep->ep_num;
 524         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 525         if (is_in(ep))
 526                 endptctrl &= ~EPCTRL_TXE;
 527         else
 528                 endptctrl &= ~EPCTRL_RXE;
 529         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 530
 531         /* nuke all pending requests (does flush) */
 532         nuke(ep, -ESHUTDOWN);
 533
 534         ep->desc = NULL;
 535         ep->stopped = 1;
 536
 537         spin_unlock_irqrestore(&dev->lock, flags);
 538
 539         DBG(dev, "disabled %s\n", _ep->name);
 540         VDBG(dev, "<--- %s()\n", __func__);
 541
 542         return 0;
 543 }
 544
 545
 546 /* allocate a request object to use with this endpoint */
 547 static struct usb_request *langwell_alloc_request(struct usb_ep *_ep,
 548                 gfp_t gfp_flags)
 549 {
 550         struct langwell_ep      *ep;
 551         struct langwell_udc     *dev;
 552         struct langwell_request *req = NULL;
 553
 554         if (!_ep)
 555                 return NULL;
 556
 557         ep = container_of(_ep, struct langwell_ep, ep);
 558         dev = ep->dev;
 559         VDBG(dev, "---> %s()\n", __func__);
 560
 561         req = kzalloc(sizeof(*req), gfp_flags);
 562         if (!req)
 563                 return NULL;
 564
 565         req->req.dma = DMA_ADDR_INVALID;
 566         INIT_LIST_HEAD(&req->queue);
 567
 568         VDBG(dev, "alloc request for %s\n", _ep->name);
 569         VDBG(dev, "<--- %s()\n", __func__);
 570         return &req->req;
 571 }
 572
 573
 574 /* free a request object */
 575 static void langwell_free_request(struct usb_ep *_ep,
 576                 struct usb_request *_req)
 577 {
 578         struct langwell_ep      *ep;
 579         struct langwell_udc     *dev;
 580         struct langwell_request *req = NULL;
 581
 582         ep = container_of(_ep, struct langwell_ep, ep);
 583         dev = ep->dev;
 584         VDBG(dev, "---> %s()\n", __func__);
 585
 586         if (!_ep || !_req)
 587                 return;
 588
 589         req = container_of(_req, struct langwell_request, req);
 590         WARN_ON(!list_empty(&req->queue));
 591
 592         if (_req)
 593                 kfree(req);
 594
 595         VDBG(dev, "free request for %s\n", _ep->name);
 596         VDBG(dev, "<--- %s()\n", __func__);
 597 }
 598
 599
 600 /*-------------------------------------------------------------------------*/
 601
 602 /* queue dTD and PRIME endpoint */
 603 static int queue_dtd(struct langwell_ep *ep, struct langwell_request *req)
 604 {
 605         u32                     bit_mask, usbcmd, endptstat, dtd_dma;
 606         u8                      dtd_status;
 607         int                     i;
 608         struct langwell_dqh     *dqh;
 609         struct langwell_udc     *dev;
 610
 611         dev = ep->dev;
 612         VDBG(dev, "---> %s()\n", __func__);
 613
 614         i = ep->ep_num * 2 + is_in(ep);
 615         dqh = &dev->ep_dqh[i];
 616
 617         if (ep->ep_num)
 618                 VDBG(dev, "%s\n", ep->name);
 619         else
 620                 /* ep0 */
 621                 VDBG(dev, "%s-%s\n", ep->name, is_in(ep) ? "in" : "out");
 622
 623         VDBG(dev, "ep_dqh[%d] addr: 0x%08x\n", i, (u32)&(dev->ep_dqh[i]));
 624
 625         bit_mask = is_in(ep) ?
 626                 (1 << (ep->ep_num + 16)) : (1 << (ep->ep_num));
 627
 628         VDBG(dev, "bit_mask = 0x%08x\n", bit_mask);
 629
 630         /* check if the pipe is empty */
 631         if (!(list_empty(&ep->queue))) {
 632                 /* add dTD to the end of linked list */
 633                 struct langwell_request *lastreq;
 634                 lastreq = list_entry(ep->queue.prev,
 635                                 struct langwell_request, queue);
 636
 637                 lastreq->tail->dtd_next =
 638                         cpu_to_le32(req->head->dtd_dma & DTD_NEXT_MASK);
 639
 640                 /* read prime bit, if 1 goto out */
 641                 if (readl(&dev->op_regs->endptprime) & bit_mask)
 642                         goto out;
 643
 644                 do {
 645                         /* set ATDTW bit in USBCMD */
 646                         usbcmd = readl(&dev->op_regs->usbcmd);
 647                         writel(usbcmd | CMD_ATDTW, &dev->op_regs->usbcmd);
 648
 649                         /* read correct status bit */
 650                         endptstat = readl(&dev->op_regs->endptstat) & bit_mask;
 651
 652                 } while (!(readl(&dev->op_regs->usbcmd) & CMD_ATDTW));
 653
 654                 /* write ATDTW bit to 0 */
 655                 usbcmd = readl(&dev->op_regs->usbcmd);
 656                 writel(usbcmd & ~CMD_ATDTW, &dev->op_regs->usbcmd);
 657
 658                 if (endptstat)
 659                         goto out;
 660         }
 661
 662         /* write dQH next pointer and terminate bit to 0 */
 663         dtd_dma = req->head->dtd_dma & DTD_NEXT_MASK;
 664         dqh->dtd_next = cpu_to_le32(dtd_dma);
 665
 666         /* clear active and halt bit */
 667         dtd_status = (u8) ~(DTD_STS_ACTIVE | DTD_STS_HALTED);
 668         dqh->dtd_status &= dtd_status;
 669         VDBG(dev, "dqh->dtd_status = 0x%x\n", dqh->dtd_status);
 670
 671         /* write 1 to endptprime register to PRIME endpoint */
 672         bit_mask = is_in(ep) ? (1 << (ep->ep_num + 16)) : (1 << ep->ep_num);
 673         VDBG(dev, "endprime bit_mask = 0x%08x\n", bit_mask);
 674         writel(bit_mask, &dev->op_regs->endptprime);
 675 out:
 676         VDBG(dev, "<--- %s()\n", __func__);
 677         return 0;
 678 }
 679
 680
 681 /* fill in the dTD structure to build a transfer descriptor */
 682 static struct langwell_dtd *build_dtd(struct langwell_request *req,
 683                 unsigned *length, dma_addr_t *dma, int *is_last)
 684 {
 685         u32                      buf_ptr;
 686         struct langwell_dtd     *dtd;
 687         struct langwell_udc     *dev;
 688         int                     i;
 689
 690         dev = req->ep->dev;
 691         VDBG(dev, "---> %s()\n", __func__);
 692
 693         /* the maximum transfer length, up to 16k bytes */
 694         *length = min(req->req.length - req->req.actual,
 695                         (unsigned)DTD_MAX_TRANSFER_LENGTH);
 696
 697         /* create dTD dma_pool resource */
 698         dtd = dma_pool_alloc(dev->dtd_pool, GFP_KERNEL, dma);
 699         if (dtd == NULL)
 700                 return dtd;
 701         dtd->dtd_dma = *dma;
 702
 703         /* initialize buffer page pointers */
 704         buf_ptr = (u32)(req->req.dma + req->req.actual);
 705         for (i = 0; i < 5; i++)
 706                 dtd->dtd_buf[i] = cpu_to_le32(buf_ptr + i * PAGE_SIZE);
 707
 708         req->req.actual += *length;
 709
 710         /* fill in total bytes with transfer size */
 711         dtd->dtd_total = cpu_to_le16(*length);
 712         VDBG(dev, "dtd->dtd_total = %d\n", dtd->dtd_total);
 713
 714         /* set is_last flag if req->req.zero is set or not */
 715         if (req->req.zero) {
 716                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
 717                         *is_last = 1;
 718                 else
 719                         *is_last = 0;
 720         } else if (req->req.length == req->req.actual) {
 721                 *is_last = 1;
 722         } else
 723                 *is_last = 0;
 724
 725         if (*is_last == 0)
 726                 VDBG(dev, "multi-dtd request!\n");
 727
 728         /* set interrupt on complete bit for the last dTD */
 729         if (*is_last && !req->req.no_interrupt)
 730                 dtd->dtd_ioc = 1;
 731
 732         /* set multiplier override 0 for non-ISO and non-TX endpoint */
 733         dtd->dtd_multo = 0;
 734
 735         /* set the active bit of status field to 1 */
 736         dtd->dtd_status = DTD_STS_ACTIVE;
 737         VDBG(dev, "dtd->dtd_status = 0x%02x\n", dtd->dtd_status);
 738
 739         VDBG(dev, "length = %d, dma addr= 0x%08x\n", *length, (int)*dma);
 740         VDBG(dev, "<--- %s()\n", __func__);
 741         return dtd;
 742 }
 743
 744
 745 /* generate dTD linked list for a request */
 746 static int req_to_dtd(struct langwell_request *req)
 747 {
 748         unsigned                count;
 749         int                     is_last, is_first = 1;
 750         struct langwell_dtd     *dtd, *last_dtd = NULL;
 751         struct langwell_udc     *dev;
 752         dma_addr_t              dma;
 753
 754         dev = req->ep->dev;
 755         VDBG(dev, "---> %s()\n", __func__);
 756         do {
 757                 dtd = build_dtd(req, &count, &dma, &is_last);
 758                 if (dtd == NULL)
 759                         return -ENOMEM;
 760
 761                 if (is_first) {
 762                         is_first = 0;
 763                         req->head = dtd;
 764                 } else {
 765                         last_dtd->dtd_next = cpu_to_le32(dma);
 766                         last_dtd->next_dtd_virt = dtd;
 767                 }
 768                 last_dtd = dtd;
 769                 req->dtd_count++;
 770         } while (!is_last);
 771
 772         /* set terminate bit to 1 for the last dTD */
 773         dtd->dtd_next = DTD_TERM;
 774
 775         req->tail = dtd;
 776
 777         VDBG(dev, "<--- %s()\n", __func__);
 778         return 0;
 779 }
 780
 781 /*-------------------------------------------------------------------------*/
 782
 783 /* queue (submits) an I/O requests to an endpoint */
 784 static int langwell_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
 785                 gfp_t gfp_flags)
 786 {
 787         struct langwell_request *req;
 788         struct langwell_ep      *ep;
 789         struct langwell_udc     *dev;
 790         unsigned long           flags;
 791         int                     is_iso = 0, zlflag = 0;
 792
 793         /* always require a cpu-view buffer */
 794         req = container_of(_req, struct langwell_request, req);
 795         ep = container_of(_ep, struct langwell_ep, ep);
 796
 797         if (!_req || !_req->complete || !_req->buf
 798                         || !list_empty(&req->queue)) {
 799                 return -EINVAL;
 800         }
 801
 802         if (unlikely(!_ep || !ep->desc))
 803                 return -EINVAL;
 804
 805         dev = ep->dev;
 806         req->ep = ep;
 807         VDBG(dev, "---> %s()\n", __func__);
 808
 809         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 810                 if (req->req.length > ep->ep.maxpacket)
 811                         return -EMSGSIZE;
 812                 is_iso = 1;
 813         }
 814
 815         if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN))
 816                 return -ESHUTDOWN;
 817
 818         /* set up dma mapping in case the caller didn't */
 819         if (_req->dma == DMA_ADDR_INVALID) {
 820                 /* WORKAROUND: WARN_ON(size == 0) */
 821                 if (_req->length == 0) {
 822                         VDBG(dev, "req->length: 0->1\n");
 823                         zlflag = 1;
 824                         _req->length++;
 825                 }
 826
 827                 _req->dma = dma_map_single(&dev->pdev->dev,
 828                                 _req->buf, _req->length,
 829                                 is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 830                 if (zlflag && (_req->length == 1)) {
 831                         VDBG(dev, "req->length: 1->0\n");
 832                         zlflag = 0;
 833                         _req->length = 0;
 834                 }
 835
 836                 req->mapped = 1;
 837                 VDBG(dev, "req->mapped = 1\n");
 838         } else {
 839                 dma_sync_single_for_device(&dev->pdev->dev,
 840                                 _req->dma, _req->length,
 841                                 is_in(ep) ?  DMA_TO_DEVICE : DMA_FROM_DEVICE);
 842                 req->mapped = 0;
 843                 VDBG(dev, "req->mapped = 0\n");
 844         }
 845
 846         DBG(dev, "%s queue req %p, len %u, buf %p, dma 0x%08x\n",
 847                         _ep->name,
 848                         _req, _req->length, _req->buf, _req->dma);
 849
 850         _req->status = -EINPROGRESS;
 851         _req->actual = 0;
 852         req->dtd_count = 0;
 853
 854         spin_lock_irqsave(&dev->lock, flags);
 855
 856         /* build and put dTDs to endpoint queue */
 857         if (!req_to_dtd(req)) {
 858                 queue_dtd(ep, req);
 859         } else {
 860                 spin_unlock_irqrestore(&dev->lock, flags);
 861                 return -ENOMEM;
 862         }
 863
 864         /* update ep0 state */
 865         if (ep->ep_num == 0)
 866                 dev->ep0_state = DATA_STATE_XMIT;
 867
 868         if (likely(req != NULL)) {
 869                 list_add_tail(&req->queue, &ep->queue);
 870                 VDBG(dev, "list_add_tail() \n");
 871         }
 872
 873         spin_unlock_irqrestore(&dev->lock, flags);
 874
 875         VDBG(dev, "<--- %s()\n", __func__);
 876         return 0;
 877 }
 878
 879
 880 /* dequeue (cancels, unlinks) an I/O request from an endpoint */
 881 static int langwell_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 882 {
 883         struct langwell_ep      *ep;
 884         struct langwell_udc     *dev;
 885         struct langwell_request *req;
 886         unsigned long           flags;
 887         int                     stopped, ep_num, retval = 0;
 888         u32                     endptctrl;
 889
 890         ep = container_of(_ep, struct langwell_ep, ep);
 891         dev = ep->dev;
 892         VDBG(dev, "---> %s()\n", __func__);
 893
 894         if (!_ep || !ep->desc || !_req)
 895                 return -EINVAL;
 896
 897         if (!dev->driver)
 898                 return -ESHUTDOWN;
 899
 900         spin_lock_irqsave(&dev->lock, flags);
 901         stopped = ep->stopped;
 902
 903         /* quiesce dma while we patch the queue */
 904         ep->stopped = 1;
 905         ep_num = ep->ep_num;
 906
 907         /* disable endpoint control register */
 908         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 909         if (is_in(ep))
 910                 endptctrl &= ~EPCTRL_TXE;
 911         else
 912                 endptctrl &= ~EPCTRL_RXE;
 913         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 914
 915         /* make sure it's still queued on this endpoint */
 916         list_for_each_entry(req, &ep->queue, queue) {
 917                 if (&req->req == _req)
 918                         break;
 919         }
 920
 921         if (&req->req != _req) {
 922                 retval = -EINVAL;
 923                 goto done;
 924         }
 925
 926         /* queue head may be partially complete. */
 927         if (ep->queue.next == &req->queue) {
 928                 DBG(dev, "unlink (%s) dma\n", _ep->name);
 929                 _req->status = -ECONNRESET;
 930                 langwell_ep_fifo_flush(&ep->ep);
 931
 932                 /* not the last request in endpoint queue */
 933                 if (likely(ep->queue.next == &req->queue)) {
 934                         struct langwell_dqh     *dqh;
 935                         struct langwell_request *next_req;
 936
 937                         dqh = ep->dqh;
 938                         next_req = list_entry(req->queue.next,
 939                                         struct langwell_request, queue);
 940
 941                         /* point the dQH to the first dTD of next request */
 942                         writel((u32) next_req->head, &dqh->dqh_current);
 943                 }
 944         } else {
 945                 struct langwell_request *prev_req;
 946
 947                 prev_req = list_entry(req->queue.prev,
 948                                 struct langwell_request, queue);
 949                 writel(readl(&req->tail->dtd_next),
 950                                 &prev_req->tail->dtd_next);
 951         }
 952
 953         done(ep, req, -ECONNRESET);
 954
 955 done:
 956         /* enable endpoint again */
 957         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 958         if (is_in(ep))
 959                 endptctrl |= EPCTRL_TXE;
 960         else
 961                 endptctrl |= EPCTRL_RXE;
 962         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 963
 964         ep->stopped = stopped;
 965         spin_unlock_irqrestore(&dev->lock, flags);
 966
 967         VDBG(dev, "<--- %s()\n", __func__);
 968         return retval;
 969 }
 970
 971
 972 /*-------------------------------------------------------------------------*/
 973
 974 /* endpoint set/clear halt */
 975 static void ep_set_halt(struct langwell_ep *ep, int value)
 976 {
 977         u32                     endptctrl = 0;
 978         int                     ep_num;
 979         struct langwell_udc     *dev = ep->dev;
 980         VDBG(dev, "---> %s()\n", __func__);
 981
 982         ep_num = ep->ep_num;
 983         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 984
 985         /* value: 1 - set halt, 0 - clear halt */
 986         if (value) {
 987                 /* set the stall bit */
 988                 if (is_in(ep))
 989                         endptctrl |= EPCTRL_TXS;
 990                 else
 991                         endptctrl |= EPCTRL_RXS;
 992         } else {
 993                 /* clear the stall bit and reset data toggle */
 994                 if (is_in(ep)) {
 995                         endptctrl &= ~EPCTRL_TXS;
 996                         endptctrl |= EPCTRL_TXR;
 997                 } else {
 998                         endptctrl &= ~EPCTRL_RXS;
 999                         endptctrl |= EPCTRL_RXR;
1000                 }
1001         }
1002
1003         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
1004
1005         VDBG(dev, "<--- %s()\n", __func__);
1006 }
1007
1008
1009 /* set the endpoint halt feature */
1010 static int langwell_ep_set_halt(struct usb_ep *_ep, int value)
1011 {
1012         struct langwell_ep      *ep;
1013         struct langwell_udc     *dev;
1014         unsigned long           flags;
1015         int                     retval = 0;
1016
1017         ep = container_of(_ep, struct langwell_ep, ep);
1018         dev = ep->dev;
1019
1020         VDBG(dev, "---> %s()\n", __func__);
1021
1022         if (!_ep || !ep->desc)
1023                 return -EINVAL;
1024
1025         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1026                 return -ESHUTDOWN;
1027
1028         if (ep->desc && (ep->desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
1029                         == USB_ENDPOINT_XFER_ISOC)
1030                 return  -EOPNOTSUPP;
1031
1032         spin_lock_irqsave(&dev->lock, flags);
1033
1034         /*
1035          * attempt to halt IN ep will fail if any transfer requests
1036          * are still queue
1037          */
1038         if (!list_empty(&ep->queue) && is_in(ep) && value) {
1039                 /* IN endpoint FIFO holds bytes */
1040                 DBG(dev, "%s FIFO holds bytes\n", _ep->name);
1041                 retval = -EAGAIN;
1042                 goto done;
1043         }
1044
1045         /* endpoint set/clear halt */
1046         if (ep->ep_num) {
1047                 ep_set_halt(ep, value);
1048         } else { /* endpoint 0 */
1049                 dev->ep0_state = WAIT_FOR_SETUP;
1050                 dev->ep0_dir = USB_DIR_OUT;
1051         }
1052 done:
1053         spin_unlock_irqrestore(&dev->lock, flags);
1054         DBG(dev, "%s %s halt\n", _ep->name, value ? "set" : "clear");
1055         VDBG(dev, "<--- %s()\n", __func__);
1056         return retval;
1057 }
1058
1059
1060 /* set the halt feature and ignores clear requests */
1061 static int langwell_ep_set_wedge(struct usb_ep *_ep)
1062 {
1063         struct langwell_ep      *ep;
1064         struct langwell_udc     *dev;
1065
1066         ep = container_of(_ep, struct langwell_ep, ep);
1067         dev = ep->dev;
1068
1069         VDBG(dev, "---> %s()\n", __func__);
1070
1071         if (!_ep || !ep->desc)
1072                 return -EINVAL;
1073
1074         VDBG(dev, "<--- %s()\n", __func__);
1075         return usb_ep_set_halt(_ep);
1076 }
1077
1078
1079 /* flush contents of a fifo */
1080 static void langwell_ep_fifo_flush(struct usb_ep *_ep)
1081 {
1082         struct langwell_ep      *ep;
1083         struct langwell_udc     *dev;
1084         u32                     flush_bit;
1085         unsigned long           timeout;
1086
1087         ep = container_of(_ep, struct langwell_ep, ep);
1088         dev = ep->dev;
1089
1090         VDBG(dev, "---> %s()\n", __func__);
1091
1092         if (!_ep || !ep->desc) {
1093                 VDBG(dev, "ep or ep->desc is NULL\n");
1094                 VDBG(dev, "<--- %s()\n", __func__);
1095                 return;
1096         }
1097
1098         VDBG(dev, "%s-%s fifo flush\n", _ep->name, is_in(ep) ? "in" : "out");
1099
1100         /* flush endpoint buffer */
1101         if (ep->ep_num == 0)
1102                 flush_bit = (1 << 16) | 1;
1103         else if (is_in(ep))
1104                 flush_bit = 1 << (ep->ep_num + 16);     /* TX */
1105         else
1106                 flush_bit = 1 << ep->ep_num;            /* RX */
1107
1108         /* wait until flush complete */
1109         timeout = jiffies + FLUSH_TIMEOUT;
1110         do {
1111                 writel(flush_bit, &dev->op_regs->endptflush);
1112                 while (readl(&dev->op_regs->endptflush)) {
1113                         if (time_after(jiffies, timeout)) {
1114                                 ERROR(dev, "ep flush timeout\n");
1115                                 goto done;
1116                         }
1117                         cpu_relax();
1118                 }
1119         } while (readl(&dev->op_regs->endptstat) & flush_bit);
1120 done:
1121         VDBG(dev, "<--- %s()\n", __func__);
1122 }
1123
1124
1125 /* endpoints operations structure */
1126 static const struct usb_ep_ops langwell_ep_ops = {
1127
1128         /* configure endpoint, making it usable */
1129         .enable         = langwell_ep_enable,
1130
1131         /* endpoint is no longer usable */
1132         .disable        = langwell_ep_disable,
1133
1134         /* allocate a request object to use with this endpoint */
1135         .alloc_request  = langwell_alloc_request,
1136
1137         /* free a request object */
1138         .free_request   = langwell_free_request,
1139
1140         /* queue (submits) an I/O requests to an endpoint */
1141         .queue          = langwell_ep_queue,
1142
1143         /* dequeue (cancels, unlinks) an I/O request from an endpoint */
1144         .dequeue        = langwell_ep_dequeue,
1145
1146         /* set the endpoint halt feature */
1147         .set_halt       = langwell_ep_set_halt,
1148
1149         /* set the halt feature and ignores clear requests */
1150         .set_wedge      = langwell_ep_set_wedge,
1151
1152         /* flush contents of a fifo */
1153         .fifo_flush     = langwell_ep_fifo_flush,
1154 };
1155
1156
1157 /*-------------------------------------------------------------------------*/
1158
1159 /* device controller usb_gadget_ops structure */
1160
1161 /* returns the current frame number */
1162 static int langwell_get_frame(struct usb_gadget *_gadget)
1163 {
1164         struct langwell_udc     *dev;
1165         u16                     retval;
1166
1167         if (!_gadget)
1168                 return -ENODEV;
1169
1170         dev = container_of(_gadget, struct langwell_udc, gadget);
1171         VDBG(dev, "---> %s()\n", __func__);
1172
1173         retval = readl(&dev->op_regs->frindex) & FRINDEX_MASK;
1174
1175         VDBG(dev, "<--- %s()\n", __func__);
1176         return retval;
1177 }
1178
1179
1180 /* tries to wake up the host connected to this gadget */
1181 static int langwell_wakeup(struct usb_gadget *_gadget)
1182 {
1183         struct langwell_udc     *dev;
1184         u32                     portsc1, devlc;
1185         unsigned long           flags;
1186
1187         if (!_gadget)
1188                 return 0;
1189
1190         dev = container_of(_gadget, struct langwell_udc, gadget);
1191         VDBG(dev, "---> %s()\n", __func__);
1192
1193         /* Remote Wakeup feature not enabled by host */
1194         if (!dev->remote_wakeup)
1195                 return -ENOTSUPP;
1196
1197         spin_lock_irqsave(&dev->lock, flags);
1198
1199         portsc1 = readl(&dev->op_regs->portsc1);
1200         if (!(portsc1 & PORTS_SUSP)) {
1201                 spin_unlock_irqrestore(&dev->lock, flags);
1202                 return 0;
1203         }
1204
1205         /* LPM L1 to L0, remote wakeup */
1206         if (dev->lpm && dev->lpm_state == LPM_L1) {
1207                 portsc1 |= PORTS_SLP;
1208                 writel(portsc1, &dev->op_regs->portsc1);
1209         }
1210
1211         /* force port resume */
1212         if (dev->usb_state == USB_STATE_SUSPENDED) {
1213                 portsc1 |= PORTS_FPR;
1214                 writel(portsc1, &dev->op_regs->portsc1);
1215         }
1216
1217         /* exit PHY low power suspend */
1218         devlc = readl(&dev->op_regs->devlc);
1219         VDBG(dev, "devlc = 0x%08x\n", devlc);
1220         devlc &= ~LPM_PHCD;
1221         writel(devlc, &dev->op_regs->devlc);
1222
1223         spin_unlock_irqrestore(&dev->lock, flags);
1224
1225         VDBG(dev, "<--- %s()\n", __func__);
1226         return 0;
1227 }
1228
1229
1230 /* notify controller that VBUS is powered or not */
1231 static int langwell_vbus_session(struct usb_gadget *_gadget, int is_active)
1232 {
1233         struct langwell_udc     *dev;
1234         unsigned long           flags;
1235         u32                     usbcmd;
1236
1237         if (!_gadget)
1238                 return -ENODEV;
1239
1240         dev = container_of(_gadget, struct langwell_udc, gadget);
1241         VDBG(dev, "---> %s()\n", __func__);
1242
1243         spin_lock_irqsave(&dev->lock, flags);
1244         VDBG(dev, "VBUS status: %s\n", is_active ? "on" : "off");
1245
1246         dev->vbus_active = (is_active != 0);
1247         if (dev->driver && dev->softconnected && dev->vbus_active) {
1248                 usbcmd = readl(&dev->op_regs->usbcmd);
1249                 usbcmd |= CMD_RUNSTOP;
1250                 writel(usbcmd, &dev->op_regs->usbcmd);
1251         } else {
1252                 usbcmd = readl(&dev->op_regs->usbcmd);
1253                 usbcmd &= ~CMD_RUNSTOP;
1254                 writel(usbcmd, &dev->op_regs->usbcmd);
1255         }
1256
1257         spin_unlock_irqrestore(&dev->lock, flags);
1258
1259         VDBG(dev, "<--- %s()\n", __func__);
1260         return 0;
1261 }
1262
1263
1264 /* constrain controller's VBUS power usage */
1265 static int langwell_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1266 {
1267         struct langwell_udc     *dev;
1268
1269         if (!_gadget)
1270                 return -ENODEV;
1271
1272         dev = container_of(_gadget, struct langwell_udc, gadget);
1273         VDBG(dev, "---> %s()\n", __func__);
1274
1275         if (dev->transceiver) {
1276                 VDBG(dev, "otg_set_power\n");
1277                 VDBG(dev, "<--- %s()\n", __func__);
1278                 return otg_set_power(dev->transceiver, mA);
1279         }
1280
1281         VDBG(dev, "<--- %s()\n", __func__);
1282         return -ENOTSUPP;
1283 }
1284
1285
1286 /* D+ pullup, software-controlled connect/disconnect to USB host */
1287 static int langwell_pullup(struct usb_gadget *_gadget, int is_on)
1288 {
1289         struct langwell_udc     *dev;
1290         u32                     usbcmd;
1291         unsigned long           flags;
1292
1293         if (!_gadget)
1294                 return -ENODEV;
1295
1296         dev = container_of(_gadget, struct langwell_udc, gadget);
1297
1298         VDBG(dev, "---> %s()\n", __func__);
1299
1300         spin_lock_irqsave(&dev->lock, flags);
1301         dev->softconnected = (is_on != 0);
1302
1303         if (dev->driver && dev->softconnected && dev->vbus_active) {
1304                 usbcmd = readl(&dev->op_regs->usbcmd);
1305                 usbcmd |= CMD_RUNSTOP;
1306                 writel(usbcmd, &dev->op_regs->usbcmd);
1307         } else {
1308                 usbcmd = readl(&dev->op_regs->usbcmd);
1309                 usbcmd &= ~CMD_RUNSTOP;
1310                 writel(usbcmd, &dev->op_regs->usbcmd);
1311         }
1312         spin_unlock_irqrestore(&dev->lock, flags);
1313
1314         VDBG(dev, "<--- %s()\n", __func__);
1315         return 0;
1316 }
1317
1318
1319 /* device controller usb_gadget_ops structure */
1320 static const struct usb_gadget_ops langwell_ops = {
1321
1322         /* returns the current frame number */
1323         .get_frame      = langwell_get_frame,
1324
1325         /* tries to wake up the host connected to this gadget */
1326         .wakeup         = langwell_wakeup,
1327
1328         /* set the device selfpowered feature, always selfpowered */
1329         /* .set_selfpowered = langwell_set_selfpowered, */
1330
1331         /* notify controller that VBUS is powered or not */
1332         .vbus_session   = langwell_vbus_session,
1333
1334         /* constrain controller's VBUS power usage */
1335         .vbus_draw      = langwell_vbus_draw,
1336
1337         /* D+ pullup, software-controlled connect/disconnect to USB host */
1338         .pullup         = langwell_pullup,
1339 };
1340
1341
1342 /*-------------------------------------------------------------------------*/
1343
1344 /* device controller operations */
1345
1346 /* reset device controller */
1347 static int langwell_udc_reset(struct langwell_udc *dev)
1348 {
1349         u32             usbcmd, usbmode, devlc, endpointlistaddr;
1350         unsigned long   timeout;
1351
1352         if (!dev)
1353                 return -EINVAL;
1354
1355         DBG(dev, "---> %s()\n", __func__);
1356
1357         /* set controller to stop state */
1358         usbcmd = readl(&dev->op_regs->usbcmd);
1359         usbcmd &= ~CMD_RUNSTOP;
1360         writel(usbcmd, &dev->op_regs->usbcmd);
1361
1362         /* reset device controller */
1363         usbcmd = readl(&dev->op_regs->usbcmd);
1364         usbcmd |= CMD_RST;
1365         writel(usbcmd, &dev->op_regs->usbcmd);
1366
1367         /* wait for reset to complete */
1368         timeout = jiffies + RESET_TIMEOUT;
1369         while (readl(&dev->op_regs->usbcmd) & CMD_RST) {
1370                 if (time_after(jiffies, timeout)) {
1371                         ERROR(dev, "device reset timeout\n");
1372                         return -ETIMEDOUT;
1373                 }
1374                 cpu_relax();
1375         }
1376
1377         /* set controller to device mode */
1378         usbmode = readl(&dev->op_regs->usbmode);
1379         usbmode |= MODE_DEVICE;
1380
1381         /* turn setup lockout off, require setup tripwire in usbcmd */
1382         usbmode |= MODE_SLOM;
1383
1384         writel(usbmode, &dev->op_regs->usbmode);
1385         usbmode = readl(&dev->op_regs->usbmode);
1386         VDBG(dev, "usbmode=0x%08x\n", usbmode);
1387
1388         /* Write-Clear setup status */
1389         writel(0, &dev->op_regs->usbsts);
1390
1391         /* if support USB LPM, ACK all LPM token */
1392         if (dev->lpm) {
1393                 devlc = readl(&dev->op_regs->devlc);
1394                 devlc &= ~LPM_STL;      /* don't STALL LPM token */
1395                 devlc &= ~LPM_NYT_ACK;  /* ACK LPM token */
1396                 writel(devlc, &dev->op_regs->devlc);
1397         }
1398
1399         /* fill endpointlistaddr register */
1400         endpointlistaddr = dev->ep_dqh_dma;
1401         endpointlistaddr &= ENDPOINTLISTADDR_MASK;
1402         writel(endpointlistaddr, &dev->op_regs->endpointlistaddr);
1403
1404         VDBG(dev, "dQH base (vir: %p, phy: 0x%08x), endpointlistaddr=0x%08x\n",
1405                         dev->ep_dqh, endpointlistaddr,
1406                         readl(&dev->op_regs->endpointlistaddr));
1407         DBG(dev, "<--- %s()\n", __func__);
1408         return 0;
1409 }
1410
1411
1412 /* reinitialize device controller endpoints */
1413 static int eps_reinit(struct langwell_udc *dev)
1414 {
1415         struct langwell_ep      *ep;
1416         char                    name[14];
1417         int                     i;
1418
1419         VDBG(dev, "---> %s()\n", __func__);
1420
1421         /* initialize ep0 */
1422         ep = &dev->ep[0];
1423         ep->dev = dev;
1424         strncpy(ep->name, "ep0", sizeof(ep->name));
1425         ep->ep.name = ep->name;
1426         ep->ep.ops = &langwell_ep_ops;
1427         ep->stopped = 0;
1428         ep->ep.maxpacket = EP0_MAX_PKT_SIZE;
1429         ep->ep_num = 0;
1430         ep->desc = &langwell_ep0_desc;
1431         INIT_LIST_HEAD(&ep->queue);
1432
1433         ep->ep_type = USB_ENDPOINT_XFER_CONTROL;
1434
1435         /* initialize other endpoints */
1436         for (i = 2; i < dev->ep_max; i++) {
1437                 ep = &dev->ep[i];
1438                 if (i % 2)
1439                         snprintf(name, sizeof(name), "ep%din", i / 2);
1440                 else
1441                         snprintf(name, sizeof(name), "ep%dout", i / 2);
1442                 ep->dev = dev;
1443                 strncpy(ep->name, name, sizeof(ep->name));
1444                 ep->ep.name = ep->name;
1445
1446                 ep->ep.ops = &langwell_ep_ops;
1447                 ep->stopped = 0;
1448                 ep->ep.maxpacket = (unsigned short) ~0;
1449                 ep->ep_num = i / 2;
1450
1451                 INIT_LIST_HEAD(&ep->queue);
1452                 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1453
1454                 ep->dqh = &dev->ep_dqh[i];
1455         }
1456
1457         VDBG(dev, "<--- %s()\n", __func__);
1458         return 0;
1459 }
1460
1461
1462 /* enable interrupt and set controller to run state */
1463 static void langwell_udc_start(struct langwell_udc *dev)
1464 {
1465         u32     usbintr, usbcmd;
1466         DBG(dev, "---> %s()\n", __func__);
1467
1468         /* enable interrupts */
1469         usbintr = INTR_ULPIE    /* ULPI */
1470                 | INTR_SLE      /* suspend */
1471                 /* | INTR_SRE   SOF received */
1472                 | INTR_URE      /* USB reset */
1473                 | INTR_AAE      /* async advance */
1474                 | INTR_SEE      /* system error */
1475                 | INTR_FRE      /* frame list rollover */
1476                 | INTR_PCE      /* port change detect */
1477                 | INTR_UEE      /* USB error interrupt */
1478                 | INTR_UE;      /* USB interrupt */
1479         writel(usbintr, &dev->op_regs->usbintr);
1480
1481         /* clear stopped bit */
1482         dev->stopped = 0;
1483
1484         /* set controller to run */
1485         usbcmd = readl(&dev->op_regs->usbcmd);
1486         usbcmd |= CMD_RUNSTOP;
1487         writel(usbcmd, &dev->op_regs->usbcmd);
1488
1489         DBG(dev, "<--- %s()\n", __func__);
1490         return;
1491 }
1492
1493
1494 /* disable interrupt and set controller to stop state */
1495 static void langwell_udc_stop(struct langwell_udc *dev)
1496 {
1497         u32     usbcmd;
1498
1499         DBG(dev, "---> %s()\n", __func__);
1500
1501         /* disable all interrupts */
1502         writel(0, &dev->op_regs->usbintr);
1503
1504         /* set stopped bit */
1505         dev->stopped = 1;
1506
1507         /* set controller to stop state */
1508         usbcmd = readl(&dev->op_regs->usbcmd);
1509         usbcmd &= ~CMD_RUNSTOP;
1510         writel(usbcmd, &dev->op_regs->usbcmd);
1511
1512         DBG(dev, "<--- %s()\n", __func__);
1513         return;
1514 }
1515
1516
1517 /* stop all USB activities */
1518 static void stop_activity(struct langwell_udc *dev,
1519                 struct usb_gadget_driver *driver)
1520 {
1521         struct langwell_ep      *ep;
1522         DBG(dev, "---> %s()\n", __func__);
1523
1524         nuke(&dev->ep[0], -ESHUTDOWN);
1525
1526         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1527                 nuke(ep, -ESHUTDOWN);
1528         }
1529
1530         /* report disconnect; the driver is already quiesced */
1531         if (driver) {
1532                 spin_unlock(&dev->lock);
1533                 driver->disconnect(&dev->gadget);
1534                 spin_lock(&dev->lock);
1535         }
1536
1537         DBG(dev, "<--- %s()\n", __func__);
1538 }
1539
1540
1541 /*-------------------------------------------------------------------------*/
1542
1543 /* device "function" sysfs attribute file */
1544 static ssize_t show_function(struct device *_dev,
1545                 struct device_attribute *attr, char *buf)
1546 {
1547         struct langwell_udc     *dev = the_controller;
1548
1549         if (!dev->driver || !dev->driver->function
1550                         || strlen(dev->driver->function) > PAGE_SIZE)
1551                 return 0;
1552
1553         return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
1554 }
1555 static DEVICE_ATTR(function, S_IRUGO, show_function, NULL);
1556
1557
1558 /* device "langwell_udc" sysfs attribute file */
1559 static ssize_t show_langwell_udc(struct device *_dev,
1560                 struct device_attribute *attr, char *buf)
1561 {
1562         struct langwell_udc     *dev = the_controller;
1563         struct langwell_request *req;
1564         struct langwell_ep      *ep = NULL;
1565         char                    *next;
1566         unsigned                size;
1567         unsigned                t;
1568         unsigned                i;
1569         unsigned long           flags;
1570         u32                     tmp_reg;
1571
1572         next = buf;
1573         size = PAGE_SIZE;
1574         spin_lock_irqsave(&dev->lock, flags);
1575
1576         /* driver basic information */
1577         t = scnprintf(next, size,
1578                         DRIVER_DESC "\n"
1579                         "%s version: %s\n"
1580                         "Gadget driver: %s\n\n",
1581                         driver_name, DRIVER_VERSION,
1582                         dev->driver ? dev->driver->driver.name : "(none)");
1583         size -= t;
1584         next += t;
1585
1586         /* device registers */
1587         tmp_reg = readl(&dev->op_regs->usbcmd);
1588         t = scnprintf(next, size,
1589                         "USBCMD reg:\n"
1590                         "SetupTW: %d\n"
1591                         "Run/Stop: %s\n\n",
1592                         (tmp_reg & CMD_SUTW) ? 1 : 0,
1593                         (tmp_reg & CMD_RUNSTOP) ? "Run" : "Stop");
1594         size -= t;
1595         next += t;
1596
1597         tmp_reg = readl(&dev->op_regs->usbsts);
1598         t = scnprintf(next, size,
1599                         "USB Status Reg:\n"
1600                         "Device Suspend: %d\n"
1601                         "Reset Received: %d\n"
1602                         "System Error: %s\n"
1603                         "USB Error Interrupt: %s\n\n",
1604                         (tmp_reg & STS_SLI) ? 1 : 0,
1605                         (tmp_reg & STS_URI) ? 1 : 0,
1606                         (tmp_reg & STS_SEI) ? "Error" : "No error",
1607                         (tmp_reg & STS_UEI) ? "Error detected" : "No error");
1608         size -= t;
1609         next += t;
1610
1611         tmp_reg = readl(&dev->op_regs->usbintr);
1612         t = scnprintf(next, size,
1613                         "USB Intrrupt Enable Reg:\n"
1614                         "Sleep Enable: %d\n"
1615                         "SOF Received Enable: %d\n"
1616                         "Reset Enable: %d\n"
1617                         "System Error Enable: %d\n"
1618                         "Port Change Dectected Enable: %d\n"
1619                         "USB Error Intr Enable: %d\n"
1620                         "USB Intr Enable: %d\n\n",
1621                         (tmp_reg & INTR_SLE) ? 1 : 0,
1622                         (tmp_reg & INTR_SRE) ? 1 : 0,
1623                         (tmp_reg & INTR_URE) ? 1 : 0,
1624                         (tmp_reg & INTR_SEE) ? 1 : 0,
1625                         (tmp_reg & INTR_PCE) ? 1 : 0,
1626                         (tmp_reg & INTR_UEE) ? 1 : 0,
1627                         (tmp_reg & INTR_UE) ? 1 : 0);
1628         size -= t;
1629         next += t;
1630
1631         tmp_reg = readl(&dev->op_regs->frindex);
1632         t = scnprintf(next, size,
1633                         "USB Frame Index Reg:\n"
1634                         "Frame Number is 0x%08x\n\n",
1635                         (tmp_reg & FRINDEX_MASK));
1636         size -= t;
1637         next += t;
1638
1639         tmp_reg = readl(&dev->op_regs->deviceaddr);
1640         t = scnprintf(next, size,
1641                         "USB Device Address Reg:\n"
1642                         "Device Addr is 0x%x\n\n",
1643                         USBADR(tmp_reg));
1644         size -= t;
1645         next += t;
1646
1647         tmp_reg = readl(&dev->op_regs->endpointlistaddr);
1648         t = scnprintf(next, size,
1649                         "USB Endpoint List Address Reg:\n"
1650                         "Endpoint List Pointer is 0x%x\n\n",
1651                         EPBASE(tmp_reg));
1652         size -= t;
1653         next += t;
1654
1655         tmp_reg = readl(&dev->op_regs->portsc1);
1656         t = scnprintf(next, size,
1657                 "USB Port Status & Control Reg:\n"
1658                 "Port Reset: %s\n"
1659                 "Port Suspend Mode: %s\n"
1660                 "Over-current Change: %s\n"
1661                 "Port Enable/Disable Change: %s\n"
1662                 "Port Enabled/Disabled: %s\n"
1663                 "Current Connect Status: %s\n\n",
1664                 (tmp_reg & PORTS_PR) ? "Reset" : "Not Reset",
1665                 (tmp_reg & PORTS_SUSP) ? "Suspend " : "Not Suspend",
1666                 (tmp_reg & PORTS_OCC) ? "Detected" : "No",
1667                 (tmp_reg & PORTS_PEC) ? "Changed" : "Not Changed",
1668                 (tmp_reg & PORTS_PE) ? "Enable" : "Not Correct",
1669                 (tmp_reg & PORTS_CCS) ?  "Attached" : "Not Attached");
1670         size -= t;
1671         next += t;
1672
1673         tmp_reg = readl(&dev->op_regs->devlc);
1674         t = scnprintf(next, size,
1675                 "Device LPM Control Reg:\n"
1676                 "Parallel Transceiver : %d\n"
1677                 "Serial Transceiver : %d\n"
1678                 "Port Speed: %s\n"
1679                 "Port Force Full Speed Connenct: %s\n"
1680                 "PHY Low Power Suspend Clock Disable: %s\n"
1681                 "BmAttributes: %d\n\n",
1682                 LPM_PTS(tmp_reg),
1683                 (tmp_reg & LPM_STS) ? 1 : 0,
1684                 ({
1685                         char    *s;
1686                         switch (LPM_PSPD(tmp_reg)) {
1687                         case LPM_SPEED_FULL:
1688                                 s = "Full Speed"; break;
1689                         case LPM_SPEED_LOW:
1690                                 s = "Low Speed"; break;
1691                         case LPM_SPEED_HIGH:
1692                                 s = "High Speed"; break;
1693                         default:
1694                                 s = "Unknown Speed"; break;
1695                         }
1696                         s;
1697                 }),
1698                 (tmp_reg & LPM_PFSC) ? "Force Full Speed" : "Not Force",
1699                 (tmp_reg & LPM_PHCD) ? "Disabled" : "Enabled",
1700                 LPM_BA(tmp_reg));
1701         size -= t;
1702         next += t;
1703
1704         tmp_reg = readl(&dev->op_regs->usbmode);
1705         t = scnprintf(next, size,
1706                         "USB Mode Reg:\n"
1707                         "Controller Mode is : %s\n\n", ({
1708                                 char *s;
1709                                 switch (MODE_CM(tmp_reg)) {
1710                                 case MODE_IDLE:
1711                                         s = "Idle"; break;
1712                                 case MODE_DEVICE:
1713                                         s = "Device Controller"; break;
1714                                 case MODE_HOST:
1715                                         s = "Host Controller"; break;
1716                                 default:
1717                                         s = "None"; break;
1718                                 }
1719                                 s;
1720                         }));
1721         size -= t;
1722         next += t;
1723
1724         tmp_reg = readl(&dev->op_regs->endptsetupstat);
1725         t = scnprintf(next, size,
1726                         "Endpoint Setup Status Reg:\n"
1727                         "SETUP on ep 0x%04x\n\n",
1728                         tmp_reg & SETUPSTAT_MASK);
1729         size -= t;
1730         next += t;
1731
1732         for (i = 0; i < dev->ep_max / 2; i++) {
1733                 tmp_reg = readl(&dev->op_regs->endptctrl[i]);
1734                 t = scnprintf(next, size, "EP Ctrl Reg [%d]: 0x%08x\n",
1735                                 i, tmp_reg);
1736                 size -= t;
1737                 next += t;
1738         }
1739         tmp_reg = readl(&dev->op_regs->endptprime);
1740         t = scnprintf(next, size, "EP Prime Reg: 0x%08x\n\n", tmp_reg);
1741         size -= t;
1742         next += t;
1743
1744         /* langwell_udc, langwell_ep, langwell_request structure information */
1745         ep = &dev->ep[0];
1746         t = scnprintf(next, size, "%s MaxPacketSize: 0x%x, ep_num: %d\n",
1747                         ep->ep.name, ep->ep.maxpacket, ep->ep_num);
1748         size -= t;
1749         next += t;
1750
1751         if (list_empty(&ep->queue)) {
1752                 t = scnprintf(next, size, "its req queue is empty\n\n");
1753                 size -= t;
1754                 next += t;
1755         } else {
1756                 list_for_each_entry(req, &ep->queue, queue) {
1757                         t = scnprintf(next, size,
1758                                 "req %p actual 0x%x length 0x%x  buf %p\n",
1759                                 &req->req, req->req.actual,
1760                                 req->req.length, req->req.buf);
1761                         size -= t;
1762                         next += t;
1763                 }
1764         }
1765         /* other gadget->eplist ep */
1766         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1767                 if (ep->desc) {
1768                         t = scnprintf(next, size,
1769                                         "\n%s MaxPacketSize: 0x%x, "
1770                                         "ep_num: %d\n",
1771                                         ep->ep.name, ep->ep.maxpacket,
1772                                         ep->ep_num);
1773                         size -= t;
1774                         next += t;
1775
1776                         if (list_empty(&ep->queue)) {
1777                                 t = scnprintf(next, size,
1778                                                 "its req queue is empty\n\n");
1779                                 size -= t;
1780                                 next += t;
1781                         } else {
1782                                 list_for_each_entry(req, &ep->queue, queue) {
1783                                         t = scnprintf(next, size,
1784                                                 "req %p actual 0x%x length "
1785                                                 "0x%x  buf %p\n",
1786                                                 &req->req, req->req.actual,
1787                                                 req->req.length, req->req.buf);
1788                                         size -= t;
1789                                         next += t;
1790                                 }
1791                         }
1792                 }
1793         }
1794
1795         spin_unlock_irqrestore(&dev->lock, flags);
1796         return PAGE_SIZE - size;
1797 }
1798 static DEVICE_ATTR(langwell_udc, S_IRUGO, show_langwell_udc, NULL);
1799
1800
1801 /*-------------------------------------------------------------------------*/
1802
1803 /*
1804  * when a driver is successfully registered, it will receive
1805  * control requests including set_configuration(), which enables
1806  * non-control requests.  then usb traffic follows until a
1807  * disconnect is reported.  then a host may connect again, or
1808  * the driver might get unbound.
1809  */
1810
1811 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1812 {
1813         struct langwell_udc     *dev = the_controller;
1814         unsigned long           flags;
1815         int                     retval;
1816
1817         if (!dev)
1818                 return -ENODEV;
1819
1820         DBG(dev, "---> %s()\n", __func__);
1821
1822         if (dev->driver)
1823                 return -EBUSY;
1824
1825         spin_lock_irqsave(&dev->lock, flags);
1826
1827         /* hook up the driver ... */
1828         driver->driver.bus = NULL;
1829         dev->driver = driver;
1830         dev->gadget.dev.driver = &driver->driver;
1831
1832         spin_unlock_irqrestore(&dev->lock, flags);
1833
1834         retval = driver->bind(&dev->gadget);
1835         if (retval) {
1836                 DBG(dev, "bind to driver %s --> %d\n",
1837                                 driver->driver.name, retval);
1838                 dev->driver = NULL;
1839                 dev->gadget.dev.driver = NULL;
1840                 return retval;
1841         }
1842
1843         retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
1844         if (retval)
1845                 goto err_unbind;
1846
1847         dev->usb_state = USB_STATE_ATTACHED;
1848         dev->ep0_state = WAIT_FOR_SETUP;
1849         dev->ep0_dir = USB_DIR_OUT;
1850
1851         /* enable interrupt and set controller to run state */
1852         if (dev->got_irq)
1853                 langwell_udc_start(dev);
1854
1855         VDBG(dev, "After langwell_udc_start(), print all registers:\n");
1856 #ifdef  VERBOSE
1857         print_all_registers(dev);
1858 #endif
1859
1860         INFO(dev, "register driver: %s\n", driver->driver.name);
1861         VDBG(dev, "<--- %s()\n", __func__);
1862         return 0;
1863
1864 err_unbind:
1865         driver->unbind(&dev->gadget);
1866         dev->gadget.dev.driver = NULL;
1867         dev->driver = NULL;
1868
1869         DBG(dev, "<--- %s()\n", __func__);
1870         return retval;
1871 }
1872 EXPORT_SYMBOL(usb_gadget_register_driver);
1873
1874
1875 /* unregister gadget driver */
1876 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1877 {
1878         struct langwell_udc     *dev = the_controller;
1879         unsigned long           flags;
1880
1881         if (!dev)
1882                 return -ENODEV;
1883
1884         DBG(dev, "---> %s()\n", __func__);
1885
1886         if (unlikely(!driver || !driver->bind || !driver->unbind))
1887                 return -EINVAL;
1888
1889         /* unbind OTG transceiver */
1890         if (dev->transceiver)
1891                 (void)otg_set_peripheral(dev->transceiver, 0);
1892
1893         /* disable interrupt and set controller to stop state */
1894         langwell_udc_stop(dev);
1895
1896         dev->usb_state = USB_STATE_ATTACHED;
1897         dev->ep0_state = WAIT_FOR_SETUP;
1898         dev->ep0_dir = USB_DIR_OUT;
1899
1900         spin_lock_irqsave(&dev->lock, flags);
1901
1902         /* stop all usb activities */
1903         dev->gadget.speed = USB_SPEED_UNKNOWN;
1904         stop_activity(dev, driver);
1905         spin_unlock_irqrestore(&dev->lock, flags);
1906
1907         /* unbind gadget driver */
1908         driver->unbind(&dev->gadget);
1909         dev->gadget.dev.driver = NULL;
1910         dev->driver = NULL;
1911
1912         device_remove_file(&dev->pdev->dev, &dev_attr_function);
1913
1914         INFO(dev, "unregistered driver '%s'\n", driver->driver.name);
1915         DBG(dev, "<--- %s()\n", __func__);
1916         return 0;
1917 }
1918 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1919
1920
1921 /*-------------------------------------------------------------------------*/
1922
1923 /*
1924  * setup tripwire is used as a semaphore to ensure that the setup data
1925  * payload is extracted from a dQH without being corrupted
1926  */
1927 static void setup_tripwire(struct langwell_udc *dev)
1928 {
1929         u32                     usbcmd,
1930                                 endptsetupstat;
1931         unsigned long           timeout;
1932         struct langwell_dqh     *dqh;
1933
1934         VDBG(dev, "---> %s()\n", __func__);
1935
1936         /* ep0 OUT dQH */
1937         dqh = &dev->ep_dqh[EP_DIR_OUT];
1938
1939         /* Write-Clear endptsetupstat */
1940         endptsetupstat = readl(&dev->op_regs->endptsetupstat);
1941         writel(endptsetupstat, &dev->op_regs->endptsetupstat);
1942
1943         /* wait until endptsetupstat is cleared */
1944         timeout = jiffies + SETUPSTAT_TIMEOUT;
1945         while (readl(&dev->op_regs->endptsetupstat)) {
1946                 if (time_after(jiffies, timeout)) {
1947                         ERROR(dev, "setup_tripwire timeout\n");
1948                         break;
1949                 }
1950                 cpu_relax();
1951         }
1952
1953         /* while a hazard exists when setup packet arrives */
1954         do {
1955                 /* set setup tripwire bit */
1956                 usbcmd = readl(&dev->op_regs->usbcmd);
1957                 writel(usbcmd | CMD_SUTW, &dev->op_regs->usbcmd);
1958
1959                 /* copy the setup packet to local buffer */
1960                 memcpy(&dev->local_setup_buff, &dqh->dqh_setup, 8);
1961         } while (!(readl(&dev->op_regs->usbcmd) & CMD_SUTW));
1962
1963         /* Write-Clear setup tripwire bit */
1964         usbcmd = readl(&dev->op_regs->usbcmd);
1965         writel(usbcmd & ~CMD_SUTW, &dev->op_regs->usbcmd);
1966
1967         VDBG(dev, "<--- %s()\n", __func__);
1968 }
1969
1970
1971 /* protocol ep0 stall, will automatically be cleared on new transaction */
1972 static void ep0_stall(struct langwell_udc *dev)
1973 {
1974         u32     endptctrl;
1975
1976         VDBG(dev, "---> %s()\n", __func__);
1977
1978         /* set TX and RX to stall */
1979         endptctrl = readl(&dev->op_regs->endptctrl[0]);
1980         endptctrl |= EPCTRL_TXS | EPCTRL_RXS;
1981         writel(endptctrl, &dev->op_regs->endptctrl[0]);
1982
1983         /* update ep0 state */
1984         dev->ep0_state = WAIT_FOR_SETUP;
1985         dev->ep0_dir = USB_DIR_OUT;
1986
1987         VDBG(dev, "<--- %s()\n", __func__);
1988 }
1989
1990
1991 /* PRIME a status phase for ep0 */
1992 static int prime_status_phase(struct langwell_udc *dev, int dir)
1993 {
1994         struct langwell_request *req;
1995         struct langwell_ep      *ep;
1996         int                     status = 0;
1997
1998         VDBG(dev, "---> %s()\n", __func__);
1999
2000         if (dir == EP_DIR_IN)
2001                 dev->ep0_dir = USB_DIR_IN;
2002         else
2003                 dev->ep0_dir = USB_DIR_OUT;
2004
2005         ep = &dev->ep[0];
2006         dev->ep0_state = WAIT_FOR_OUT_STATUS;
2007
2008         req = dev->status_req;
2009
2010         req->ep = ep;
2011         req->req.length = 0;
2012         req->req.status = -EINPROGRESS;
2013         req->req.actual = 0;
2014         req->req.complete = NULL;
2015         req->dtd_count = 0;
2016
2017         if (!req_to_dtd(req))
2018                 status = queue_dtd(ep, req);
2019         else
2020                 return -ENOMEM;
2021
2022         if (status)
2023                 ERROR(dev, "can't queue ep0 status request\n");
2024
2025         list_add_tail(&req->queue, &ep->queue);
2026
2027         VDBG(dev, "<--- %s()\n", __func__);
2028         return status;
2029 }
2030
2031
2032 /* SET_ADDRESS request routine */
2033 static void set_address(struct langwell_udc *dev, u16 value,
2034                 u16 index, u16 length)
2035 {
2036         VDBG(dev, "---> %s()\n", __func__);
2037
2038         /* save the new address to device struct */
2039         dev->dev_addr = (u8) value;
2040         VDBG(dev, "dev->dev_addr = %d\n", dev->dev_addr);
2041
2042         /* update usb state */
2043         dev->usb_state = USB_STATE_ADDRESS;
2044
2045         /* STATUS phase */
2046         if (prime_status_phase(dev, EP_DIR_IN))
2047                 ep0_stall(dev);
2048
2049         VDBG(dev, "<--- %s()\n", __func__);
2050 }
2051
2052
2053 /* return endpoint by windex */
2054 static struct langwell_ep *get_ep_by_windex(struct langwell_udc *dev,
2055                 u16 wIndex)
2056 {
2057         struct langwell_ep              *ep;
2058         VDBG(dev, "---> %s()\n", __func__);
2059
2060         if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
2061                 return &dev->ep[0];
2062
2063         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
2064                 u8      bEndpointAddress;
2065                 if (!ep->desc)
2066                         continue;
2067
2068                 bEndpointAddress = ep->desc->bEndpointAddress;
2069                 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
2070                         continue;
2071
2072                 if ((wIndex & USB_ENDPOINT_NUMBER_MASK)
2073                         == (bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))
2074                         return ep;
2075         }
2076
2077         VDBG(dev, "<--- %s()\n", __func__);
2078         return NULL;
2079 }
2080
2081
2082 /* return whether endpoint is stalled, 0: not stalled; 1: stalled */
2083 static int ep_is_stall(struct langwell_ep *ep)
2084 {
2085         struct langwell_udc     *dev = ep->dev;
2086         u32                     endptctrl;
2087         int                     retval;
2088
2089         VDBG(dev, "---> %s()\n", __func__);
2090
2091         endptctrl = readl(&dev->op_regs->endptctrl[ep->ep_num]);
2092         if (is_in(ep))
2093                 retval = endptctrl & EPCTRL_TXS ? 1 : 0;
2094         else
2095                 retval = endptctrl & EPCTRL_RXS ? 1 : 0;
2096
2097         VDBG(dev, "<--- %s()\n", __func__);
2098         return retval;
2099 }
2100
2101
2102 /* GET_STATUS request routine */
2103 static void get_status(struct langwell_udc *dev, u8 request_type, u16 value,
2104                 u16 index, u16 length)
2105 {
2106         struct langwell_request *req;
2107         struct langwell_ep      *ep;
2108         u16     status_data = 0;        /* 16 bits cpu view status data */
2109         int     status = 0;
2110
2111         VDBG(dev, "---> %s()\n", __func__);
2112
2113         ep = &dev->ep[0];
2114
2115         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
2116                 /* get device status */
2117                 status_data = 1 << USB_DEVICE_SELF_POWERED;
2118                 status_data |= dev->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
2119         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
2120                 /* get interface status */
2121                 status_data = 0;
2122         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
2123                 /* get endpoint status */
2124                 struct langwell_ep      *epn;
2125                 epn = get_ep_by_windex(dev, index);
2126                 /* stall if endpoint doesn't exist */
2127                 if (!epn)
2128                         goto stall;
2129
2130                 status_data = ep_is_stall(epn) << USB_ENDPOINT_HALT;
2131         }
2132
2133         dev->ep0_dir = USB_DIR_IN;
2134
2135         /* borrow the per device status_req */
2136         req = dev->status_req;
2137
2138         /* fill in the reqest structure */
2139         *((u16 *) req->req.buf) = cpu_to_le16(status_data);
2140         req->ep = ep;
2141         req->req.length = 2;
2142         req->req.status = -EINPROGRESS;
2143         req->req.actual = 0;
2144         req->req.complete = NULL;
2145         req->dtd_count = 0;
2146
2147         /* prime the data phase */
2148         if (!req_to_dtd(req))
2149                 status = queue_dtd(ep, req);
2150         else                    /* no mem */
2151                 goto stall;
2152
2153         if (status) {
2154                 ERROR(dev, "response error on GET_STATUS request\n");
2155                 goto stall;
2156         }
2157
2158         list_add_tail(&req->queue, &ep->queue);
2159         dev->ep0_state = DATA_STATE_XMIT;
2160
2161         VDBG(dev, "<--- %s()\n", __func__);
2162         return;
2163 stall:
2164         ep0_stall(dev);
2165         VDBG(dev, "<--- %s()\n", __func__);
2166 }
2167
2168
2169 /* setup packet interrupt handler */
2170 static void handle_setup_packet(struct langwell_udc *dev,
2171                 struct usb_ctrlrequest *setup)
2172 {
2173         u16     wValue = le16_to_cpu(setup->wValue);
2174         u16     wIndex = le16_to_cpu(setup->wIndex);
2175         u16     wLength = le16_to_cpu(setup->wLength);
2176
2177         VDBG(dev, "---> %s()\n", __func__);
2178
2179         /* ep0 fifo flush */
2180         nuke(&dev->ep[0], -ESHUTDOWN);
2181
2182         DBG(dev, "SETUP %02x.%02x v%04x i%04x l%04x\n",
2183                         setup->bRequestType, setup->bRequest,
2184                         wValue, wIndex, wLength);
2185
2186         /* RNDIS gadget delegate */
2187         if ((setup->bRequestType == 0x21) && (setup->bRequest == 0x00)) {
2188                 /* USB_CDC_SEND_ENCAPSULATED_COMMAND */
2189                 goto delegate;
2190         }
2191
2192         /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2193         if ((setup->bRequestType == 0xa1) && (setup->bRequest == 0x01)) {
2194                 /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2195                 goto delegate;
2196         }
2197
2198         /* We process some stardard setup requests here */
2199         switch (setup->bRequest) {
2200         case USB_REQ_GET_STATUS:
2201                 DBG(dev, "SETUP: USB_REQ_GET_STATUS\n");
2202                 /* get status, DATA and STATUS phase */
2203                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
2204                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
2205                         break;
2206                 get_status(dev, setup->bRequestType, wValue, wIndex, wLength);
2207                 goto end;
2208
2209         case USB_REQ_SET_ADDRESS:
2210                 DBG(dev, "SETUP: USB_REQ_SET_ADDRESS\n");
2211                 /* STATUS phase */
2212                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
2213                                                 | USB_RECIP_DEVICE))
2214                         break;
2215                 set_address(dev, wValue, wIndex, wLength);
2216                 goto end;
2217
2218         case USB_REQ_CLEAR_FEATURE:
2219         case USB_REQ_SET_FEATURE:
2220                 /* STATUS phase */
2221         {
2222                 int rc = -EOPNOTSUPP;
2223                 if (setup->bRequest == USB_REQ_SET_FEATURE)
2224                         DBG(dev, "SETUP: USB_REQ_SET_FEATURE\n");
2225                 else if (setup->bRequest == USB_REQ_CLEAR_FEATURE)
2226                         DBG(dev, "SETUP: USB_REQ_CLEAR_FEATURE\n");
2227
2228                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
2229                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
2230                         struct langwell_ep      *epn;
2231                         epn = get_ep_by_windex(dev, wIndex);
2232                         /* stall if endpoint doesn't exist */
2233                         if (!epn) {
2234                                 ep0_stall(dev);
2235                                 goto end;
2236                         }
2237
2238                         if (wValue != 0 || wLength != 0
2239                                         || epn->ep_num > dev->ep_max)
2240                                 break;
2241
2242                         spin_unlock(&dev->lock);
2243                         rc = langwell_ep_set_halt(&epn->ep,
2244                                         (setup->bRequest == USB_REQ_SET_FEATURE)
2245                                                 ? 1 : 0);
2246                         spin_lock(&dev->lock);
2247
2248                 } else if ((setup->bRequestType & (USB_RECIP_MASK
2249                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
2250                                 | USB_TYPE_STANDARD)) {
2251                         if (!gadget_is_otg(&dev->gadget))
2252                                 break;
2253                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE) {
2254                                 dev->gadget.b_hnp_enable = 1;
2255 #ifdef  OTG_TRANSCEIVER
2256                                 if (!dev->lotg->otg.default_a)
2257                                         dev->lotg->hsm.b_hnp_enable = 1;
2258 #endif
2259                         } else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
2260                                 dev->gadget.a_hnp_support = 1;
2261                         else if (setup->bRequest ==
2262                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
2263                                 dev->gadget.a_alt_hnp_support = 1;
2264                         else
2265                                 break;
2266                         rc = 0;
2267                 } else
2268                         break;
2269
2270                 if (rc == 0) {
2271                         if (prime_status_phase(dev, EP_DIR_IN))
2272                                 ep0_stall(dev);
2273                 }
2274                 goto end;
2275         }
2276
2277         case USB_REQ_GET_DESCRIPTOR:
2278                 DBG(dev, "SETUP: USB_REQ_GET_DESCRIPTOR\n");
2279                 goto delegate;
2280
2281         case USB_REQ_SET_DESCRIPTOR:
2282                 DBG(dev, "SETUP: USB_REQ_SET_DESCRIPTOR unsupported\n");
2283                 goto delegate;
2284
2285         case USB_REQ_GET_CONFIGURATION:
2286                 DBG(dev, "SETUP: USB_REQ_GET_CONFIGURATION\n");
2287                 goto delegate;
2288
2289         case USB_REQ_SET_CONFIGURATION:
2290                 DBG(dev, "SETUP: USB_REQ_SET_CONFIGURATION\n");
2291                 goto delegate;
2292
2293         case USB_REQ_GET_INTERFACE:
2294                 DBG(dev, "SETUP: USB_REQ_GET_INTERFACE\n");
2295                 goto delegate;
2296
2297         case USB_REQ_SET_INTERFACE:
2298                 DBG(dev, "SETUP: USB_REQ_SET_INTERFACE\n");
2299                 goto delegate;
2300
2301         case USB_REQ_SYNCH_FRAME:
2302                 DBG(dev, "SETUP: USB_REQ_SYNCH_FRAME unsupported\n");
2303                 goto delegate;
2304
2305         default:
2306                 /* delegate USB standard requests to the gadget driver */
2307                 goto delegate;
2308 delegate:
2309                 /* USB requests handled by gadget */
2310                 if (wLength) {
2311                         /* DATA phase from gadget, STATUS phase from udc */
2312                         dev->ep0_dir = (setup->bRequestType & USB_DIR_IN)
2313                                         ?  USB_DIR_IN : USB_DIR_OUT;
2314                         VDBG(dev, "dev->ep0_dir = 0x%x, wLength = %d\n",
2315                                         dev->ep0_dir, wLength);
2316                         spin_unlock(&dev->lock);
2317                         if (dev->driver->setup(&dev->gadget,
2318                                         &dev->local_setup_buff) < 0)
2319                                 ep0_stall(dev);
2320                         spin_lock(&dev->lock);
2321                         dev->ep0_state = (setup->bRequestType & USB_DIR_IN)
2322                                         ?  DATA_STATE_XMIT : DATA_STATE_RECV;
2323                 } else {
2324                         /* no DATA phase, IN STATUS phase from gadget */
2325                         dev->ep0_dir = USB_DIR_IN;
2326                         VDBG(dev, "dev->ep0_dir = 0x%x, wLength = %d\n",
2327                                         dev->ep0_dir, wLength);
2328                         spin_unlock(&dev->lock);
2329                         if (dev->driver->setup(&dev->gadget,
2330                                         &dev->local_setup_buff) < 0)
2331                                 ep0_stall(dev);
2332                         spin_lock(&dev->lock);
2333                         dev->ep0_state = WAIT_FOR_OUT_STATUS;
2334                 }
2335                 break;
2336         }
2337 end:
2338         VDBG(dev, "<--- %s()\n", __func__);
2339         return;
2340 }
2341
2342
2343 /* transfer completion, process endpoint request and free the completed dTDs
2344  * for this request
2345  */
2346 static int process_ep_req(struct langwell_udc *dev, int index,
2347                 struct langwell_request *curr_req)
2348 {
2349         struct langwell_dtd     *curr_dtd;
2350         struct langwell_dqh     *curr_dqh;
2351         int                     td_complete, actual, remaining_length;
2352         int                     i, dir;
2353         u8                      dtd_status = 0;
2354         int                     retval = 0;
2355
2356         curr_dqh = &dev->ep_dqh[index];
2357         dir = index % 2;
2358
2359         curr_dtd = curr_req->head;
2360         td_complete = 0;
2361         actual = curr_req->req.length;
2362
2363         VDBG(dev, "---> %s()\n", __func__);
2364
2365         for (i = 0; i < curr_req->dtd_count; i++) {
2366                 remaining_length = le16_to_cpu(curr_dtd->dtd_total);
2367                 actual -= remaining_length;
2368
2369                 /* command execution states by dTD */
2370                 dtd_status = curr_dtd->dtd_status;
2371
2372                 if (!dtd_status) {
2373                         /* transfers completed successfully */
2374                         if (!remaining_length) {
2375                                 td_complete++;
2376                                 VDBG(dev, "dTD transmitted successfully\n");
2377                         } else {
2378                                 if (dir) {
2379                                         VDBG(dev, "TX dTD remains data\n");
2380                                         retval = -EPROTO;
2381                                         break;
2382
2383                                 } else {
2384                                         td_complete++;
2385                                         break;
2386                                 }
2387                         }
2388                 } else {
2389                         /* transfers completed with errors */
2390                         if (dtd_status & DTD_STS_ACTIVE) {
2391                                 DBG(dev, "request not completed\n");
2392                                 retval = 1;
2393                                 return retval;
2394                         } else if (dtd_status & DTD_STS_HALTED) {
2395                                 ERROR(dev, "dTD error %08x dQH[%d]\n",
2396                                                 dtd_status, index);
2397                                 /* clear the errors and halt condition */
2398                                 curr_dqh->dtd_status = 0;
2399                                 retval = -EPIPE;
2400                                 break;
2401                         } else if (dtd_status & DTD_STS_DBE) {
2402                                 DBG(dev, "data buffer (overflow) error\n");
2403                                 retval = -EPROTO;
2404                                 break;
2405                         } else if (dtd_status & DTD_STS_TRE) {
2406                                 DBG(dev, "transaction(ISO) error\n");
2407                                 retval = -EILSEQ;
2408                                 break;
2409                         } else
2410                                 ERROR(dev, "unknown error (0x%x)!\n",
2411                                                 dtd_status);
2412                 }
2413
2414                 if (i != curr_req->dtd_count - 1)
2415                         curr_dtd = (struct langwell_dtd *)
2416                                 curr_dtd->next_dtd_virt;
2417         }
2418
2419         if (retval)
2420                 return retval;
2421
2422         curr_req->req.actual = actual;
2423
2424         VDBG(dev, "<--- %s()\n", __func__);
2425         return 0;
2426 }
2427
2428
2429 /* complete DATA or STATUS phase of ep0 prime status phase if needed */
2430 static void ep0_req_complete(struct langwell_udc *dev,
2431                 struct langwell_ep *ep0, struct langwell_request *req)
2432 {
2433         u32     new_addr;
2434         VDBG(dev, "---> %s()\n", __func__);
2435
2436         if (dev->usb_state == USB_STATE_ADDRESS) {
2437                 /* set the new address */
2438                 new_addr = (u32)dev->dev_addr;
2439                 writel(new_addr << USBADR_SHIFT, &dev->op_regs->deviceaddr);
2440
2441                 new_addr = USBADR(readl(&dev->op_regs->deviceaddr));
2442                 VDBG(dev, "new_addr = %d\n", new_addr);
2443         }
2444
2445         done(ep0, req, 0);
2446
2447         switch (dev->ep0_state) {
2448         case DATA_STATE_XMIT:
2449                 /* receive status phase */
2450                 if (prime_status_phase(dev, EP_DIR_OUT))
2451                         ep0_stall(dev);
2452                 break;
2453         case DATA_STATE_RECV:
2454                 /* send status phase */
2455                 if (prime_status_phase(dev, EP_DIR_IN))
2456                         ep0_stall(dev);
2457                 break;
2458         case WAIT_FOR_OUT_STATUS:
2459                 dev->ep0_state = WAIT_FOR_SETUP;
2460                 break;
2461         case WAIT_FOR_SETUP:
2462                 ERROR(dev, "unexpect ep0 packets\n");
2463                 break;
2464         default:
2465                 ep0_stall(dev);
2466                 break;
2467         }
2468
2469         VDBG(dev, "<--- %s()\n", __func__);
2470 }
2471
2472
2473 /* USB transfer completion interrupt */
2474 static void handle_trans_complete(struct langwell_udc *dev)
2475 {
2476         u32                     complete_bits;
2477         int                     i, ep_num, dir, bit_mask, status;
2478         struct langwell_ep      *epn;
2479         struct langwell_request *curr_req, *temp_req;
2480
2481         VDBG(dev, "---> %s()\n", __func__);
2482
2483         complete_bits = readl(&dev->op_regs->endptcomplete);
2484         VDBG(dev, "endptcomplete register: 0x%08x\n", complete_bits);
2485
2486         /* Write-Clear the bits in endptcomplete register */
2487         writel(complete_bits, &dev->op_regs->endptcomplete);
2488
2489         if (!complete_bits) {
2490                 DBG(dev, "complete_bits = 0\n");
2491                 goto done;
2492         }
2493
2494         for (i = 0; i < dev->ep_max; i++) {
2495                 ep_num = i / 2;
2496                 dir = i % 2;
2497
2498                 bit_mask = 1 << (ep_num + 16 * dir);
2499
2500                 if (!(complete_bits & bit_mask))
2501                         continue;
2502
2503                 /* ep0 */
2504                 if (i == 1)
2505                         epn = &dev->ep[0];
2506                 else
2507                         epn = &dev->ep[i];
2508
2509                 if (epn->name == NULL) {
2510                         WARNING(dev, "invalid endpoint\n");
2511                         continue;
2512                 }
2513
2514                 if (i < 2)
2515                         /* ep0 in and out */
2516                         DBG(dev, "%s-%s transfer completed\n",
2517                                         epn->name,
2518                                         is_in(epn) ? "in" : "out");
2519                 else
2520                         DBG(dev, "%s transfer completed\n", epn->name);
2521
2522                 /* process the req queue until an uncomplete request */
2523                 list_for_each_entry_safe(curr_req, temp_req,
2524                                 &epn->queue, queue) {
2525                         status = process_ep_req(dev, i, curr_req);
2526                         VDBG(dev, "%s req status: %d\n", epn->name, status);
2527
2528                         if (status)
2529                                 break;
2530
2531                         /* write back status to req */
2532                         curr_req->req.status = status;
2533
2534                         /* ep0 request completion */
2535                         if (ep_num == 0) {
2536                                 ep0_req_complete(dev, epn, curr_req);
2537                                 break;
2538                         } else {
2539                                 done(epn, curr_req, status);
2540                         }
2541                 }
2542         }
2543 done:
2544         VDBG(dev, "<--- %s()\n", __func__);
2545         return;
2546 }
2547
2548
2549 /* port change detect interrupt handler */
2550 static void handle_port_change(struct langwell_udc *dev)
2551 {
2552         u32     portsc1, devlc;
2553         u32     speed;
2554
2555         VDBG(dev, "---> %s()\n", __func__);
2556
2557         if (dev->bus_reset)
2558                 dev->bus_reset = 0;
2559
2560         portsc1 = readl(&dev->op_regs->portsc1);
2561         devlc = readl(&dev->op_regs->devlc);
2562         VDBG(dev, "portsc1 = 0x%08x, devlc = 0x%08x\n",
2563                         portsc1, devlc);
2564
2565         /* bus reset is finished */
2566         if (!(portsc1 & PORTS_PR)) {
2567                 /* get the speed */
2568                 speed = LPM_PSPD(devlc);
2569                 switch (speed) {
2570                 case LPM_SPEED_HIGH:
2571                         dev->gadget.speed = USB_SPEED_HIGH;
2572                         break;
2573                 case LPM_SPEED_FULL:
2574                         dev->gadget.speed = USB_SPEED_FULL;
2575                         break;
2576                 case LPM_SPEED_LOW:
2577                         dev->gadget.speed = USB_SPEED_LOW;
2578                         break;
2579                 default:
2580                         dev->gadget.speed = USB_SPEED_UNKNOWN;
2581                         break;
2582                 }
2583                 VDBG(dev, "speed = %d, dev->gadget.speed = %d\n",
2584                                 speed, dev->gadget.speed);
2585         }
2586
2587         /* LPM L0 to L1 */
2588         if (dev->lpm && dev->lpm_state == LPM_L0)
2589                 if (portsc1 & PORTS_SUSP && portsc1 & PORTS_SLP) {
2590                                 INFO(dev, "LPM L0 to L1\n");
2591                                 dev->lpm_state = LPM_L1;
2592                 }
2593
2594         /* LPM L1 to L0, force resume or remote wakeup finished */
2595         if (dev->lpm && dev->lpm_state == LPM_L1)
2596                 if (!(portsc1 & PORTS_SUSP)) {
2597                         if (portsc1 & PORTS_SLP)
2598                                 INFO(dev, "LPM L1 to L0, force resume\n");
2599                         else
2600                                 INFO(dev, "LPM L1 to L0, remote wakeup\n");
2601
2602                         dev->lpm_state = LPM_L0;
2603                 }
2604
2605         /* update USB state */
2606         if (!dev->resume_state)
2607                 dev->usb_state = USB_STATE_DEFAULT;
2608
2609         VDBG(dev, "<--- %s()\n", __func__);
2610 }
2611
2612
2613 /* USB reset interrupt handler */
2614 static void handle_usb_reset(struct langwell_udc *dev)
2615 {
2616         u32             deviceaddr,
2617                         endptsetupstat,
2618                         endptcomplete;
2619         unsigned long   timeout;
2620
2621         VDBG(dev, "---> %s()\n", __func__);
2622
2623         /* Write-Clear the device address */
2624         deviceaddr = readl(&dev->op_regs->deviceaddr);
2625         writel(deviceaddr & ~USBADR_MASK, &dev->op_regs->deviceaddr);
2626
2627         dev->dev_addr = 0;
2628
2629         /* clear usb state */
2630         dev->resume_state = 0;
2631
2632         /* LPM L1 to L0, reset */
2633         if (dev->lpm)
2634                 dev->lpm_state = LPM_L0;
2635
2636         dev->ep0_dir = USB_DIR_OUT;
2637         dev->ep0_state = WAIT_FOR_SETUP;
2638         dev->remote_wakeup = 0;         /* default to 0 on reset */
2639         dev->gadget.b_hnp_enable = 0;
2640         dev->gadget.a_hnp_support = 0;
2641         dev->gadget.a_alt_hnp_support = 0;
2642
2643         /* Write-Clear all the setup token semaphores */
2644         endptsetupstat = readl(&dev->op_regs->endptsetupstat);
2645         writel(endptsetupstat, &dev->op_regs->endptsetupstat);
2646
2647         /* Write-Clear all the endpoint complete status bits */
2648         endptcomplete = readl(&dev->op_regs->endptcomplete);
2649         writel(endptcomplete, &dev->op_regs->endptcomplete);
2650
2651         /* wait until all endptprime bits cleared */
2652         timeout = jiffies + PRIME_TIMEOUT;
2653         while (readl(&dev->op_regs->endptprime)) {
2654                 if (time_after(jiffies, timeout)) {
2655                         ERROR(dev, "USB reset timeout\n");
2656                         break;
2657                 }
2658                 cpu_relax();
2659         }
2660
2661         /* write 1s to endptflush register to clear any primed buffers */
2662         writel((u32) ~0, &dev->op_regs->endptflush);
2663
2664         if (readl(&dev->op_regs->portsc1) & PORTS_PR) {
2665                 VDBG(dev, "USB bus reset\n");
2666                 /* bus is reseting */
2667                 dev->bus_reset = 1;
2668
2669                 /* reset all the queues, stop all USB activities */
2670                 stop_activity(dev, dev->driver);
2671                 dev->usb_state = USB_STATE_DEFAULT;
2672         } else {
2673                 VDBG(dev, "device controller reset\n");
2674                 /* controller reset */
2675                 langwell_udc_reset(dev);
2676
2677                 /* reset all the queues, stop all USB activities */
2678                 stop_activity(dev, dev->driver);
2679
2680                 /* reset ep0 dQH and endptctrl */
2681                 ep0_reset(dev);
2682
2683                 /* enable interrupt and set controller to run state */
2684                 langwell_udc_start(dev);
2685
2686                 dev->usb_state = USB_STATE_ATTACHED;
2687         }
2688
2689 #ifdef  OTG_TRANSCEIVER
2690         /* refer to USB OTG 6.6.2.3 b_hnp_en is cleared */
2691         if (!dev->lotg->otg.default_a)
2692                 dev->lotg->hsm.b_hnp_enable = 0;
2693 #endif
2694
2695         VDBG(dev, "<--- %s()\n", __func__);
2696 }
2697
2698
2699 /* USB bus suspend/resume interrupt */
2700 static void handle_bus_suspend(struct langwell_udc *dev)
2701 {
2702         u32             devlc;
2703         DBG(dev, "---> %s()\n", __func__);
2704
2705         dev->resume_state = dev->usb_state;
2706         dev->usb_state = USB_STATE_SUSPENDED;
2707
2708 #ifdef  OTG_TRANSCEIVER
2709         if (dev->lotg->otg.default_a) {
2710                 if (dev->lotg->hsm.b_bus_suspend_vld == 1) {
2711                         dev->lotg->hsm.b_bus_suspend = 1;
2712                         /* notify transceiver the state changes */
2713                         if (spin_trylock(&dev->lotg->wq_lock)) {
2714                                 langwell_update_transceiver();
2715                                 spin_unlock(&dev->lotg->wq_lock);
2716                         }
2717                 }
2718                 dev->lotg->hsm.b_bus_suspend_vld++;
2719         } else {
2720                 if (!dev->lotg->hsm.a_bus_suspend) {
2721                         dev->lotg->hsm.a_bus_suspend = 1;
2722                         /* notify transceiver the state changes */
2723                         if (spin_trylock(&dev->lotg->wq_lock)) {
2724                                 langwell_update_transceiver();
2725                                 spin_unlock(&dev->lotg->wq_lock);
2726                         }
2727                 }
2728         }
2729 #endif
2730
2731         /* report suspend to the driver */
2732         if (dev->driver) {
2733                 if (dev->driver->suspend) {
2734                         spin_unlock(&dev->lock);
2735                         dev->driver->suspend(&dev->gadget);
2736                         spin_lock(&dev->lock);
2737                         DBG(dev, "suspend %s\n", dev->driver->driver.name);
2738                 }
2739         }
2740
2741         /* enter PHY low power suspend */
2742         devlc = readl(&dev->op_regs->devlc);
2743         VDBG(dev, "devlc = 0x%08x\n", devlc);
2744         devlc |= LPM_PHCD;
2745         writel(devlc, &dev->op_regs->devlc);
2746
2747         DBG(dev, "<--- %s()\n", __func__);
2748 }
2749
2750
2751 static void handle_bus_resume(struct langwell_udc *dev)
2752 {
2753         u32             devlc;
2754         DBG(dev, "---> %s()\n", __func__);
2755
2756         dev->usb_state = dev->resume_state;
2757         dev->resume_state = 0;
2758
2759         /* exit PHY low power suspend */
2760         devlc = readl(&dev->op_regs->devlc);
2761         VDBG(dev, "devlc = 0x%08x\n", devlc);
2762         devlc &= ~LPM_PHCD;
2763         writel(devlc, &dev->op_regs->devlc);
2764
2765 #ifdef  OTG_TRANSCEIVER
2766         if (dev->lotg->otg.default_a == 0)
2767                 dev->lotg->hsm.a_bus_suspend = 0;
2768 #endif
2769
2770         /* report resume to the driver */
2771         if (dev->driver) {
2772                 if (dev->driver->resume) {
2773                         spin_unlock(&dev->lock);
2774                         dev->driver->resume(&dev->gadget);
2775                         spin_lock(&dev->lock);
2776                         DBG(dev, "resume %s\n", dev->driver->driver.name);
2777                 }
2778         }
2779
2780         DBG(dev, "<--- %s()\n", __func__);
2781 }
2782
2783
2784 /* USB device controller interrupt handler */
2785 static irqreturn_t langwell_irq(int irq, void *_dev)
2786 {
2787         struct langwell_udc     *dev = _dev;
2788         u32                     usbsts,
2789                                 usbintr,
2790                                 irq_sts,
2791                                 portsc1;
2792
2793         VDBG(dev, "---> %s()\n", __func__);
2794
2795         if (dev->stopped) {
2796                 VDBG(dev, "handle IRQ_NONE\n");
2797                 VDBG(dev, "<--- %s()\n", __func__);
2798                 return IRQ_NONE;
2799         }
2800
2801         spin_lock(&dev->lock);
2802
2803         /* USB status */
2804         usbsts = readl(&dev->op_regs->usbsts);
2805
2806         /* USB interrupt enable */
2807         usbintr = readl(&dev->op_regs->usbintr);
2808
2809         irq_sts = usbsts & usbintr;
2810         VDBG(dev, "usbsts = 0x%08x, usbintr = 0x%08x, irq_sts = 0x%08x\n",
2811                         usbsts, usbintr, irq_sts);
2812
2813         if (!irq_sts) {
2814                 VDBG(dev, "handle IRQ_NONE\n");
2815                 VDBG(dev, "<--- %s()\n", __func__);
2816                 spin_unlock(&dev->lock);
2817                 return IRQ_NONE;
2818         }
2819
2820         /* Write-Clear interrupt status bits */
2821         writel(irq_sts, &dev->op_regs->usbsts);
2822
2823         /* resume from suspend */
2824         portsc1 = readl(&dev->op_regs->portsc1);
2825         if (dev->usb_state == USB_STATE_SUSPENDED)
2826                 if (!(portsc1 & PORTS_SUSP))
2827                         handle_bus_resume(dev);
2828
2829         /* USB interrupt */
2830         if (irq_sts & STS_UI) {
2831                 VDBG(dev, "USB interrupt\n");
2832
2833                 /* setup packet received from ep0 */
2834                 if (readl(&dev->op_regs->endptsetupstat)
2835                                 & EP0SETUPSTAT_MASK) {
2836                         VDBG(dev, "USB SETUP packet received interrupt\n");
2837                         /* setup tripwire semaphone */
2838                         setup_tripwire(dev);
2839                         handle_setup_packet(dev, &dev->local_setup_buff);
2840                 }
2841
2842                 /* USB transfer completion */
2843                 if (readl(&dev->op_regs->endptcomplete)) {
2844                         VDBG(dev, "USB transfer completion interrupt\n");
2845                         handle_trans_complete(dev);
2846                 }
2847         }
2848
2849         /* SOF received interrupt (for ISO transfer) */
2850         if (irq_sts & STS_SRI) {
2851                 /* FIXME */
2852                 /* VDBG(dev, "SOF received interrupt\n"); */
2853         }
2854
2855         /* port change detect interrupt */
2856         if (irq_sts & STS_PCI) {
2857                 VDBG(dev, "port change detect interrupt\n");
2858                 handle_port_change(dev);
2859         }
2860
2861         /* suspend interrrupt */
2862         if (irq_sts & STS_SLI) {
2863                 VDBG(dev, "suspend interrupt\n");
2864                 handle_bus_suspend(dev);
2865         }
2866
2867         /* USB reset interrupt */
2868         if (irq_sts & STS_URI) {
2869                 VDBG(dev, "USB reset interrupt\n");
2870                 handle_usb_reset(dev);
2871         }
2872
2873         /* USB error or system error interrupt */
2874         if (irq_sts & (STS_UEI | STS_SEI)) {
2875                 /* FIXME */
2876                 WARNING(dev, "error IRQ, irq_sts: %x\n", irq_sts);
2877         }
2878
2879         spin_unlock(&dev->lock);
2880
2881         VDBG(dev, "<--- %s()\n", __func__);
2882         return IRQ_HANDLED;
2883 }
2884
2885
2886 /*-------------------------------------------------------------------------*/
2887
2888 /* release device structure */
2889 static void gadget_release(struct device *_dev)
2890 {
2891         struct langwell_udc     *dev = the_controller;
2892
2893         DBG(dev, "---> %s()\n", __func__);
2894
2895         complete(dev->done);
2896
2897         DBG(dev, "<--- %s()\n", __func__);
2898         kfree(dev);
2899 }
2900
2901
2902 /* tear down the binding between this driver and the pci device */
2903 static void langwell_udc_remove(struct pci_dev *pdev)
2904 {
2905         struct langwell_udc     *dev = the_controller;
2906
2907         DECLARE_COMPLETION(done);
2908
2909         BUG_ON(dev->driver);
2910         DBG(dev, "---> %s()\n", __func__);
2911
2912         dev->done = &done;
2913
2914         /* free memory allocated in probe */
2915         if (dev->dtd_pool)
2916                 dma_pool_destroy(dev->dtd_pool);
2917
2918         if (dev->status_req) {
2919                 kfree(dev->status_req->req.buf);
2920                 kfree(dev->status_req);
2921         }
2922
2923         if (dev->ep_dqh)
2924                 dma_free_coherent(&pdev->dev, dev->ep_dqh_size,
2925                         dev->ep_dqh, dev->ep_dqh_dma);
2926
2927         kfree(dev->ep);
2928
2929         /* diable IRQ handler */
2930         if (dev->got_irq)
2931                 free_irq(pdev->irq, dev);
2932
2933 #ifndef OTG_TRANSCEIVER
2934         if (dev->cap_regs)
2935                 iounmap(dev->cap_regs);
2936
2937         if (dev->region)
2938                 release_mem_region(pci_resource_start(pdev, 0),
2939                                 pci_resource_len(pdev, 0));
2940
2941         if (dev->enabled)
2942                 pci_disable_device(pdev);
2943 #else
2944         if (dev->transceiver) {
2945                 otg_put_transceiver(dev->transceiver);
2946                 dev->transceiver = NULL;
2947                 dev->lotg = NULL;
2948         }
2949 #endif
2950
2951         dev->cap_regs = NULL;
2952
2953         INFO(dev, "unbind\n");
2954         DBG(dev, "<--- %s()\n", __func__);
2955
2956         device_unregister(&dev->gadget.dev);
2957         device_remove_file(&pdev->dev, &dev_attr_langwell_udc);
2958
2959 #ifndef OTG_TRANSCEIVER
2960         pci_set_drvdata(pdev, NULL);
2961 #endif
2962
2963         /* free dev, wait for the release() finished */
2964         wait_for_completion(&done);
2965
2966         the_controller = NULL;
2967 }
2968
2969
2970 /*
2971  * wrap this driver around the specified device, but
2972  * don't respond over USB until a gadget driver binds to us.
2973  */
2974 static int langwell_udc_probe(struct pci_dev *pdev,
2975                 const struct pci_device_id *id)
2976 {
2977         struct langwell_udc     *dev;
2978 #ifndef OTG_TRANSCEIVER
2979         unsigned long           resource, len;
2980 #endif
2981         void                    __iomem *base = NULL;
2982         size_t                  size;
2983         int                     retval;
2984
2985         if (the_controller) {
2986                 dev_warn(&pdev->dev, "ignoring\n");
2987                 return -EBUSY;
2988         }
2989
2990         /* alloc, and start init */
2991         dev = kzalloc(sizeof *dev, GFP_KERNEL);
2992         if (dev == NULL) {
2993                 retval = -ENOMEM;
2994                 goto error;
2995         }
2996
2997         /* initialize device spinlock */
2998         spin_lock_init(&dev->lock);
2999
3000         dev->pdev = pdev;
3001         DBG(dev, "---> %s()\n", __func__);
3002
3003 #ifdef  OTG_TRANSCEIVER
3004         /* PCI device is already enabled by otg_transceiver driver */
3005         dev->enabled = 1;
3006
3007         /* mem region and register base */
3008         dev->region = 1;
3009         dev->transceiver = otg_get_transceiver();
3010         dev->lotg = otg_to_langwell(dev->transceiver);
3011         base = dev->lotg->regs;
3012 #else
3013         pci_set_drvdata(pdev, dev);
3014
3015         /* now all the pci goodies ... */
3016         if (pci_enable_device(pdev) < 0) {
3017                 retval = -ENODEV;
3018                 goto error;
3019         }
3020         dev->enabled = 1;
3021
3022         /* control register: BAR 0 */
3023         resource = pci_resource_start(pdev, 0);
3024         len = pci_resource_len(pdev, 0);
3025         if (!request_mem_region(resource, len, driver_name)) {
3026                 ERROR(dev, "controller already in use\n");
3027                 retval = -EBUSY;
3028                 goto error;
3029         }
3030         dev->region = 1;
3031
3032         base = ioremap_nocache(resource, len);
3033 #endif
3034         if (base == NULL) {
3035                 ERROR(dev, "can't map memory\n");
3036                 retval = -EFAULT;
3037                 goto error;
3038         }
3039
3040         dev->cap_regs = (struct langwell_cap_regs __iomem *) base;
3041         VDBG(dev, "dev->cap_regs: %p\n", dev->cap_regs);
3042         dev->op_regs = (struct langwell_op_regs __iomem *)
3043                 (base + OP_REG_OFFSET);
3044         VDBG(dev, "dev->op_regs: %p\n", dev->op_regs);
3045
3046         /* irq setup after old hardware is cleaned up */
3047         if (!pdev->irq) {
3048                 ERROR(dev, "No IRQ. Check PCI setup!\n");
3049                 retval = -ENODEV;
3050                 goto error;
3051         }
3052
3053 #ifndef OTG_TRANSCEIVER
3054         INFO(dev, "irq %d, io mem: 0x%08lx, len: 0x%08lx, pci mem 0x%p\n",
3055                         pdev->irq, resource, len, base);
3056         /* enables bus-mastering for device dev */
3057         pci_set_master(pdev);
3058
3059         if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED,
3060                                 driver_name, dev) != 0) {
3061                 ERROR(dev, "request interrupt %d failed\n", pdev->irq);
3062                 retval = -EBUSY;
3063                 goto error;
3064         }
3065         dev->got_irq = 1;
3066 #endif
3067
3068         /* set stopped bit */
3069         dev->stopped = 1;
3070
3071         /* capabilities and endpoint number */
3072         dev->lpm = (readl(&dev->cap_regs->hccparams) & HCC_LEN) ? 1 : 0;
3073         dev->dciversion = readw(&dev->cap_regs->dciversion);
3074         dev->devcap = (readl(&dev->cap_regs->dccparams) & DEVCAP) ? 1 : 0;
3075         VDBG(dev, "dev->lpm: %d\n", dev->lpm);
3076         VDBG(dev, "dev->dciversion: 0x%04x\n", dev->dciversion);
3077         VDBG(dev, "dccparams: 0x%08x\n", readl(&dev->cap_regs->dccparams));
3078         VDBG(dev, "dev->devcap: %d\n", dev->devcap);
3079         if (!dev->devcap) {
3080                 ERROR(dev, "can't support device mode\n");
3081                 retval = -ENODEV;
3082                 goto error;
3083         }
3084
3085         /* a pair of endpoints (out/in) for each address */
3086         dev->ep_max = DEN(readl(&dev->cap_regs->dccparams)) * 2;
3087         VDBG(dev, "dev->ep_max: %d\n", dev->ep_max);
3088
3089         /* allocate endpoints memory */
3090         dev->ep = kzalloc(sizeof(struct langwell_ep) * dev->ep_max,
3091                         GFP_KERNEL);
3092         if (!dev->ep) {
3093                 ERROR(dev, "allocate endpoints memory failed\n");
3094                 retval = -ENOMEM;
3095                 goto error;
3096         }
3097
3098         /* allocate device dQH memory */
3099         size = dev->ep_max * sizeof(struct langwell_dqh);
3100         VDBG(dev, "orig size = %d\n", size);
3101         if (size < DQH_ALIGNMENT)
3102                 size = DQH_ALIGNMENT;
3103         else if ((size % DQH_ALIGNMENT) != 0) {
3104                 size += DQH_ALIGNMENT + 1;
3105                 size &= ~(DQH_ALIGNMENT - 1);
3106         }
3107         dev->ep_dqh = dma_alloc_coherent(&pdev->dev, size,
3108                                         &dev->ep_dqh_dma, GFP_KERNEL);
3109         if (!dev->ep_dqh) {
3110                 ERROR(dev, "allocate dQH memory failed\n");
3111                 retval = -ENOMEM;
3112                 goto error;
3113         }
3114         dev->ep_dqh_size = size;
3115         VDBG(dev, "ep_dqh_size = %d\n", dev->ep_dqh_size);
3116
3117         /* initialize ep0 status request structure */
3118         dev->status_req = kzalloc(sizeof(struct langwell_request), GFP_KERNEL);
3119         if (!dev->status_req) {
3120                 ERROR(dev, "allocate status_req memory failed\n");
3121                 retval = -ENOMEM;
3122                 goto error;
3123         }
3124         INIT_LIST_HEAD(&dev->status_req->queue);
3125
3126         /* allocate a small amount of memory to get valid address */
3127         dev->status_req->req.buf = kmalloc(8, GFP_KERNEL);
3128         dev->status_req->req.dma = virt_to_phys(dev->status_req->req.buf);
3129
3130         dev->resume_state = USB_STATE_NOTATTACHED;
3131         dev->usb_state = USB_STATE_POWERED;
3132         dev->ep0_dir = USB_DIR_OUT;
3133         dev->remote_wakeup = 0; /* default to 0 on reset */
3134
3135 #ifndef OTG_TRANSCEIVER
3136         /* reset device controller */
3137         langwell_udc_reset(dev);
3138 #endif
3139
3140         /* initialize gadget structure */
3141         dev->gadget.ops = &langwell_ops;        /* usb_gadget_ops */
3142         dev->gadget.ep0 = &dev->ep[0].ep;       /* gadget ep0 */
3143         INIT_LIST_HEAD(&dev->gadget.ep_list);   /* ep_list */
3144         dev->gadget.speed = USB_SPEED_UNKNOWN;  /* speed */
3145         dev->gadget.is_dualspeed = 1;           /* support dual speed */
3146 #ifdef  OTG_TRANSCEIVER
3147         dev->gadget.is_otg = 1;                 /* support otg mode */
3148 #endif
3149
3150         /* the "gadget" abstracts/virtualizes the controller */
3151         dev_set_name(&dev->gadget.dev, "gadget");
3152         dev->gadget.dev.parent = &pdev->dev;
3153         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
3154         dev->gadget.dev.release = gadget_release;
3155         dev->gadget.name = driver_name;         /* gadget name */
3156
3157         /* controller endpoints reinit */
3158         eps_reinit(dev);
3159
3160 #ifndef OTG_TRANSCEIVER
3161         /* reset ep0 dQH and endptctrl */
3162         ep0_reset(dev);
3163 #endif
3164
3165         /* create dTD dma_pool resource */
3166         dev->dtd_pool = dma_pool_create("langwell_dtd",
3167                         &dev->pdev->dev,
3168                         sizeof(struct langwell_dtd),
3169                         DTD_ALIGNMENT,
3170                         DMA_BOUNDARY);
3171
3172         if (!dev->dtd_pool) {
3173                 retval = -ENOMEM;
3174                 goto error;
3175         }
3176
3177         /* done */
3178         INFO(dev, "%s\n", driver_desc);
3179         INFO(dev, "irq %d, pci mem %p\n", pdev->irq, base);
3180         INFO(dev, "Driver version: " DRIVER_VERSION "\n");
3181         INFO(dev, "Support (max) %d endpoints\n", dev->ep_max);
3182         INFO(dev, "Device interface version: 0x%04x\n", dev->dciversion);
3183         INFO(dev, "Controller mode: %s\n", dev->devcap ? "Device" : "Host");
3184         INFO(dev, "Support USB LPM: %s\n", dev->lpm ? "Yes" : "No");
3185
3186         VDBG(dev, "After langwell_udc_probe(), print all registers:\n");
3187 #ifdef  VERBOSE
3188         print_all_registers(dev);
3189 #endif
3190
3191         the_controller = dev;
3192
3193         retval = device_register(&dev->gadget.dev);
3194         if (retval)
3195                 goto error;
3196
3197         retval = device_create_file(&pdev->dev, &dev_attr_langwell_udc);
3198         if (retval)
3199                 goto error;
3200
3201         VDBG(dev, "<--- %s()\n", __func__);
3202         return 0;
3203
3204 error:
3205         if (dev) {
3206                 DBG(dev, "<--- %s()\n", __func__);
3207                 langwell_udc_remove(pdev);
3208         }
3209
3210         return retval;
3211 }
3212
3213
3214 /* device controller suspend */
3215 static int langwell_udc_suspend(struct pci_dev *pdev, pm_message_t state)
3216 {
3217         struct langwell_udc     *dev = the_controller;
3218         u32                     devlc;
3219
3220         DBG(dev, "---> %s()\n", __func__);
3221
3222         /* disable interrupt and set controller to stop state */
3223         langwell_udc_stop(dev);
3224
3225         /* diable IRQ handler */
3226         if (dev->got_irq)
3227                 free_irq(pdev->irq, dev);
3228         dev->got_irq = 0;
3229
3230
3231         /* save PCI state */
3232         pci_save_state(pdev);
3233
3234         /* set device power state */
3235         pci_set_power_state(pdev, PCI_D3hot);
3236
3237         /* enter PHY low power suspend */
3238         devlc = readl(&dev->op_regs->devlc);
3239         VDBG(dev, "devlc = 0x%08x\n", devlc);
3240         devlc |= LPM_PHCD;
3241         writel(devlc, &dev->op_regs->devlc);
3242
3243         DBG(dev, "<--- %s()\n", __func__);
3244         return 0;
3245 }
3246
3247
3248 /* device controller resume */
3249 static int langwell_udc_resume(struct pci_dev *pdev)
3250 {
3251         struct langwell_udc     *dev = the_controller;
3252         u32                     devlc;
3253
3254         DBG(dev, "---> %s()\n", __func__);
3255
3256         /* exit PHY low power suspend */
3257         devlc = readl(&dev->op_regs->devlc);
3258         VDBG(dev, "devlc = 0x%08x\n", devlc);
3259         devlc &= ~LPM_PHCD;
3260         writel(devlc, &dev->op_regs->devlc);
3261
3262         /* set device D0 power state */
3263         pci_set_power_state(pdev, PCI_D0);
3264
3265         /* restore PCI state */
3266         pci_restore_state(pdev);
3267
3268         /* enable IRQ handler */
3269         if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED, driver_name, dev)
3270                         != 0) {
3271                 ERROR(dev, "request interrupt %d failed\n", pdev->irq);
3272                 return -1;
3273         }
3274         dev->got_irq = 1;
3275
3276         /* reset and start controller to run state */
3277         if (dev->stopped) {
3278                 /* reset device controller */
3279                 langwell_udc_reset(dev);
3280
3281                 /* reset ep0 dQH and endptctrl */
3282                 ep0_reset(dev);
3283
3284                 /* start device if gadget is loaded */
3285                 if (dev->driver)
3286                         langwell_udc_start(dev);
3287         }
3288
3289         /* reset USB status */
3290         dev->usb_state = USB_STATE_ATTACHED;
3291         dev->ep0_state = WAIT_FOR_SETUP;
3292         dev->ep0_dir = USB_DIR_OUT;
3293
3294         DBG(dev, "<--- %s()\n", __func__);
3295         return 0;
3296 }
3297
3298
3299 /* pci driver shutdown */
3300 static void langwell_udc_shutdown(struct pci_dev *pdev)
3301 {
3302         struct langwell_udc     *dev = the_controller;
3303         u32                     usbmode;
3304
3305         DBG(dev, "---> %s()\n", __func__);
3306
3307         /* reset controller mode to IDLE */
3308         usbmode = readl(&dev->op_regs->usbmode);
3309         DBG(dev, "usbmode = 0x%08x\n", usbmode);
3310         usbmode &= (~3 | MODE_IDLE);
3311         writel(usbmode, &dev->op_regs->usbmode);
3312
3313         DBG(dev, "<--- %s()\n", __func__);
3314 }
3315
3316 /*-------------------------------------------------------------------------*/
3317
3318 static const struct pci_device_id pci_ids[] = { {
3319         .class =        ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3320         .class_mask =   ~0,
3321         .vendor =       0x8086,
3322         .device =       0x0811,
3323         .subvendor =    PCI_ANY_ID,
3324         .subdevice =    PCI_ANY_ID,
3325 }, { /* end: all zeroes */ }
3326 };
3327
3328
3329 MODULE_DEVICE_TABLE(pci, pci_ids);
3330
3331
3332 static struct pci_driver langwell_pci_driver = {
3333         .name =         (char *) driver_name,
3334         .id_table =     pci_ids,
3335
3336         .probe =        langwell_udc_probe,
3337         .remove =       langwell_udc_remove,
3338
3339         /* device controller suspend/resume */
3340         .suspend =      langwell_udc_suspend,
3341         .resume =       langwell_udc_resume,
3342
3343         .shutdown =     langwell_udc_shutdown,
3344 };
3345
3346
3347 MODULE_DESCRIPTION(DRIVER_DESC);
3348 MODULE_AUTHOR("Xiaochen Shen <xiaochen.shen@intel.com>");
3349 MODULE_VERSION(DRIVER_VERSION);
3350 MODULE_LICENSE("GPL");
3351
3352
3353 static int __init init(void)
3354 {
3355 #ifdef  OTG_TRANSCEIVER
3356         return langwell_register_peripheral(&langwell_pci_driver);
3357 #else
3358         return pci_register_driver(&langwell_pci_driver);
3359 #endif
3360 }
3361 module_init(init);
3362
3363
3364 static void __exit cleanup(void)
3365 {
3366 #ifdef  OTG_TRANSCEIVER
3367         return langwell_unregister_peripheral(&langwell_pci_driver);
3368 #else
3369         pci_unregister_driver(&langwell_pci_driver);
3370 #endif
3371 }
3372 module_exit(cleanup);
3373