1 #include <linux/spinlock.h>
3 #include <linux/interrupt.h>
5 #include <asm/tlbflush.h>
7 DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate)
10 /* must come after the send_IPI functions above for inlining */
14 * Smarter SMP flushing macros.
17 * These mean you can really definitely utterly forget about
18 * writing to user space from interrupts. (Its not allowed anyway).
20 * Optimizations Manfred Spraul <manfred@colorfullife.com>
23 static cpumask_var_t flush_cpumask;
24 static struct mm_struct *flush_mm;
25 static unsigned long flush_va;
26 static DEFINE_SPINLOCK(tlbstate_lock);
29 * We cannot call mmdrop() because we are in interrupt context,
30 * instead update mm->cpu_vm_mask.
32 * We need to reload %cr3 since the page tables may be going
33 * away from under us..
35 void leave_mm(int cpu)
37 BUG_ON(percpu_read(cpu_tlbstate.state) == TLBSTATE_OK);
38 cpu_clear(cpu, percpu_read(cpu_tlbstate.active_mm)->cpu_vm_mask);
39 load_cr3(swapper_pg_dir);
41 EXPORT_SYMBOL_GPL(leave_mm);
45 * The flush IPI assumes that a thread switch happens in this order:
46 * [cpu0: the cpu that switches]
47 * 1) switch_mm() either 1a) or 1b)
48 * 1a) thread switch to a different mm
49 * 1a1) cpu_clear(cpu, old_mm->cpu_vm_mask);
50 * Stop ipi delivery for the old mm. This is not synchronized with
51 * the other cpus, but smp_invalidate_interrupt ignore flush ipis
52 * for the wrong mm, and in the worst case we perform a superfluous
54 * 1a2) set cpu_tlbstate to TLBSTATE_OK
55 * Now the smp_invalidate_interrupt won't call leave_mm if cpu0
56 * was in lazy tlb mode.
57 * 1a3) update cpu_tlbstate[].active_mm
58 * Now cpu0 accepts tlb flushes for the new mm.
59 * 1a4) cpu_set(cpu, new_mm->cpu_vm_mask);
60 * Now the other cpus will send tlb flush ipis.
62 * 1b) thread switch without mm change
63 * cpu_tlbstate[].active_mm is correct, cpu0 already handles
65 * 1b1) set cpu_tlbstate to TLBSTATE_OK
66 * 1b2) test_and_set the cpu bit in cpu_vm_mask.
67 * Atomically set the bit [other cpus will start sending flush ipis],
69 * 1b3) if the bit was 0: leave_mm was called, flush the tlb.
70 * 2) switch %%esp, ie current
72 * The interrupt must handle 2 special cases:
73 * - cr3 is changed before %%esp, ie. it cannot use current->{active_,}mm.
74 * - the cpu performs speculative tlb reads, i.e. even if the cpu only
75 * runs in kernel space, the cpu could load tlb entries for user space
78 * The good news is that cpu_tlbstate is local to each cpu, no
79 * write/read ordering problems.
85 * 1) Flush the tlb entries if the cpu uses the mm that's being flushed.
86 * 2) Leave the mm if we are in the lazy tlb mode.
89 void smp_invalidate_interrupt(struct pt_regs *regs)
95 if (!cpumask_test_cpu(cpu, flush_cpumask))
98 * This was a BUG() but until someone can quote me the
99 * line from the intel manual that guarantees an IPI to
100 * multiple CPUs is retried _only_ on the erroring CPUs
101 * its staying as a return
106 if (flush_mm == percpu_read(cpu_tlbstate.active_mm)) {
107 if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK) {
108 if (flush_va == TLB_FLUSH_ALL)
111 __flush_tlb_one(flush_va);
116 smp_mb__before_clear_bit();
117 cpumask_clear_cpu(cpu, flush_cpumask);
118 smp_mb__after_clear_bit();
120 put_cpu_no_resched();
121 inc_irq_stat(irq_tlb_count);
124 void native_flush_tlb_others(const struct cpumask *cpumask,
125 struct mm_struct *mm, unsigned long va)
128 * - mask must exist :)
130 BUG_ON(cpumask_empty(cpumask));
134 * i'm not happy about this global shared spinlock in the
135 * MM hot path, but we'll see how contended it is.
136 * AK: x86-64 has a faster method that could be ported.
138 spin_lock(&tlbstate_lock);
140 cpumask_andnot(flush_cpumask, cpumask, cpumask_of(smp_processor_id()));
141 #ifdef CONFIG_HOTPLUG_CPU
142 /* If a CPU which we ran on has gone down, OK. */
143 cpumask_and(flush_cpumask, flush_cpumask, cpu_online_mask);
144 if (unlikely(cpumask_empty(flush_cpumask))) {
145 spin_unlock(&tlbstate_lock);
153 * Make the above memory operations globally visible before
158 * We have to send the IPI only to
161 send_IPI_mask(flush_cpumask, INVALIDATE_TLB_VECTOR);
163 while (!cpumask_empty(flush_cpumask))
164 /* nothing. lockup detection does not belong here */
169 spin_unlock(&tlbstate_lock);
172 void flush_tlb_current_task(void)
174 struct mm_struct *mm = current->mm;
179 if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
180 flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL);
184 void flush_tlb_mm(struct mm_struct *mm)
189 if (current->active_mm == mm) {
193 leave_mm(smp_processor_id());
195 if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
196 flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL);
201 void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
203 struct mm_struct *mm = vma->vm_mm;
207 if (current->active_mm == mm) {
211 leave_mm(smp_processor_id());
214 if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
215 flush_tlb_others(&mm->cpu_vm_mask, mm, va);
218 EXPORT_SYMBOL(flush_tlb_page);
220 static void do_flush_tlb_all(void *info)
222 unsigned long cpu = smp_processor_id();
225 if (percpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY)
229 void flush_tlb_all(void)
231 on_each_cpu(do_flush_tlb_all, NULL, 1);
234 static int init_flush_cpumask(void)
236 alloc_cpumask_var(&flush_cpumask, GFP_KERNEL);
239 early_initcall(init_flush_cpumask);