2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
30 #include <linux/skbuff.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
35 #include <linux/inet_lro.h>
38 #include <asm/firmware.h>
39 #include <asm/pasemi_dma.h>
41 #include "pasemi_mac.h"
43 /* We have our own align, since ppc64 in general has it at 0 because
44 * of design flaws in some of the server bridge chips. However, for
45 * PWRficient doing the unaligned copies is more expensive than doing
46 * unaligned DMA, so make sure the data is aligned instead.
48 #define LOCAL_SKB_ALIGN 2
59 /* Must be a power of two */
60 #define RX_RING_SIZE 2048
61 #define TX_RING_SIZE 4096
63 #define LRO_MAX_AGGR 64
65 #define DEFAULT_MSG_ENABLE \
75 #define TX_DESC(tx, num) ((tx)->chan.ring_virt[(num) & (TX_RING_SIZE-1)])
76 #define TX_DESC_INFO(tx, num) ((tx)->ring_info[(num) & (TX_RING_SIZE-1)])
77 #define RX_DESC(rx, num) ((rx)->chan.ring_virt[(num) & (RX_RING_SIZE-1)])
78 #define RX_DESC_INFO(rx, num) ((rx)->ring_info[(num) & (RX_RING_SIZE-1)])
79 #define RX_BUFF(rx, num) ((rx)->buffers[(num) & (RX_RING_SIZE-1)])
81 #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
83 #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
85 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
87 MODULE_LICENSE("GPL");
88 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
89 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
91 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
95 static int translation_enabled(void)
97 #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
100 return firmware_has_feature(FW_FEATURE_LPAR);
104 static void write_iob_reg(unsigned int reg, unsigned int val)
106 pasemi_write_iob_reg(reg, val);
109 static unsigned int read_mac_reg(const struct pasemi_mac *mac, unsigned int reg)
111 return pasemi_read_mac_reg(mac->dma_if, reg);
114 static void write_mac_reg(const struct pasemi_mac *mac, unsigned int reg,
117 pasemi_write_mac_reg(mac->dma_if, reg, val);
120 static unsigned int read_dma_reg(unsigned int reg)
122 return pasemi_read_dma_reg(reg);
125 static void write_dma_reg(unsigned int reg, unsigned int val)
127 pasemi_write_dma_reg(reg, val);
130 static struct pasemi_mac_rxring *rx_ring(const struct pasemi_mac *mac)
135 static struct pasemi_mac_txring *tx_ring(const struct pasemi_mac *mac)
140 static inline void prefetch_skb(const struct sk_buff *skb)
150 static int mac_to_intf(struct pasemi_mac *mac)
152 struct pci_dev *pdev = mac->pdev;
154 int nintf, off, i, j;
155 int devfn = pdev->devfn;
157 tmp = read_dma_reg(PAS_DMA_CAP_IFI);
158 nintf = (tmp & PAS_DMA_CAP_IFI_NIN_M) >> PAS_DMA_CAP_IFI_NIN_S;
159 off = (tmp & PAS_DMA_CAP_IFI_IOFF_M) >> PAS_DMA_CAP_IFI_IOFF_S;
161 /* IOFF contains the offset to the registers containing the
162 * DMA interface-to-MAC-pci-id mappings, and NIN contains number
163 * of total interfaces. Each register contains 4 devfns.
164 * Just do a linear search until we find the devfn of the MAC
165 * we're trying to look up.
168 for (i = 0; i < (nintf+3)/4; i++) {
169 tmp = read_dma_reg(off+4*i);
170 for (j = 0; j < 4; j++) {
171 if (((tmp >> (8*j)) & 0xff) == devfn)
178 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
180 struct pci_dev *pdev = mac->pdev;
181 struct device_node *dn = pci_device_to_OF_node(pdev);
188 "No device node for mac, not configuring\n");
192 maddr = of_get_property(dn, "local-mac-address", &len);
194 if (maddr && len == 6) {
195 memcpy(mac->mac_addr, maddr, 6);
199 /* Some old versions of firmware mistakenly uses mac-address
200 * (and as a string) instead of a byte array in local-mac-address.
204 maddr = of_get_property(dn, "mac-address", NULL);
208 "no mac address in device tree, not configuring\n");
212 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
213 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
215 "can't parse mac address, not configuring\n");
219 memcpy(mac->mac_addr, addr, 6);
224 static int pasemi_mac_set_mac_addr(struct net_device *dev, void *p)
226 struct pasemi_mac *mac = netdev_priv(dev);
227 struct sockaddr *addr = p;
228 unsigned int adr0, adr1;
230 if (!is_valid_ether_addr(addr->sa_data))
233 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
235 adr0 = dev->dev_addr[2] << 24 |
236 dev->dev_addr[3] << 16 |
237 dev->dev_addr[4] << 8 |
239 adr1 = read_mac_reg(mac, PAS_MAC_CFG_ADR1);
241 adr1 |= dev->dev_addr[0] << 8 | dev->dev_addr[1];
243 pasemi_mac_intf_disable(mac);
244 write_mac_reg(mac, PAS_MAC_CFG_ADR0, adr0);
245 write_mac_reg(mac, PAS_MAC_CFG_ADR1, adr1);
246 pasemi_mac_intf_enable(mac);
251 static int get_skb_hdr(struct sk_buff *skb, void **iphdr,
252 void **tcph, u64 *hdr_flags, void *data)
254 u64 macrx = (u64) data;
258 /* IPv4 header checksum failed */
259 if ((macrx & XCT_MACRX_HTY_M) != XCT_MACRX_HTY_IPV4_OK)
263 skb_reset_network_header(skb);
265 if (iph->protocol != IPPROTO_TCP)
268 ip_len = ip_hdrlen(skb);
269 skb_set_transport_header(skb, ip_len);
270 *tcph = tcp_hdr(skb);
272 /* check if ip header and tcp header are complete */
273 if (iph->tot_len < ip_len + tcp_hdrlen(skb))
276 *hdr_flags = LRO_IPV4 | LRO_TCP;
282 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
285 const dma_addr_t *dmas)
288 struct pci_dev *pdev = mac->dma_pdev;
290 pci_unmap_single(pdev, dmas[0], skb_headlen(skb), PCI_DMA_TODEVICE);
292 for (f = 0; f < nfrags; f++) {
293 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
295 pci_unmap_page(pdev, dmas[f+1], frag->size, PCI_DMA_TODEVICE);
297 dev_kfree_skb_irq(skb);
299 /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
300 * aligned up to a power of 2
302 return (nfrags + 3) & ~1;
305 static int pasemi_mac_setup_rx_resources(const struct net_device *dev)
307 struct pasemi_mac_rxring *ring;
308 struct pasemi_mac *mac = netdev_priv(dev);
312 ring = pasemi_dma_alloc_chan(RXCHAN, sizeof(struct pasemi_mac_rxring),
313 offsetof(struct pasemi_mac_rxring, chan));
316 dev_err(&mac->pdev->dev, "Can't allocate RX channel\n");
319 chno = ring->chan.chno;
321 spin_lock_init(&ring->lock);
323 ring->size = RX_RING_SIZE;
324 ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
325 RX_RING_SIZE, GFP_KERNEL);
327 if (!ring->ring_info)
330 /* Allocate descriptors */
331 if (pasemi_dma_alloc_ring(&ring->chan, RX_RING_SIZE))
334 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
335 RX_RING_SIZE * sizeof(u64),
336 &ring->buf_dma, GFP_KERNEL);
340 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
342 write_dma_reg(PAS_DMA_RXCHAN_BASEL(chno),
343 PAS_DMA_RXCHAN_BASEL_BRBL(ring->chan.ring_dma));
345 write_dma_reg(PAS_DMA_RXCHAN_BASEU(chno),
346 PAS_DMA_RXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32) |
347 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
349 cfg = PAS_DMA_RXCHAN_CFG_HBU(2);
351 if (translation_enabled())
352 cfg |= PAS_DMA_RXCHAN_CFG_CTR;
354 write_dma_reg(PAS_DMA_RXCHAN_CFG(chno), cfg);
356 write_dma_reg(PAS_DMA_RXINT_BASEL(mac->dma_if),
357 PAS_DMA_RXINT_BASEL_BRBL(ring->buf_dma));
359 write_dma_reg(PAS_DMA_RXINT_BASEU(mac->dma_if),
360 PAS_DMA_RXINT_BASEU_BRBH(ring->buf_dma >> 32) |
361 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
363 cfg = PAS_DMA_RXINT_CFG_DHL(2) | PAS_DMA_RXINT_CFG_L2 |
364 PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
365 PAS_DMA_RXINT_CFG_HEN;
367 if (translation_enabled())
368 cfg |= PAS_DMA_RXINT_CFG_ITRR | PAS_DMA_RXINT_CFG_ITR;
370 write_dma_reg(PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
372 ring->next_to_fill = 0;
373 ring->next_to_clean = 0;
380 kfree(ring->ring_info);
382 pasemi_dma_free_chan(&ring->chan);
387 static struct pasemi_mac_txring *
388 pasemi_mac_setup_tx_resources(const struct net_device *dev)
390 struct pasemi_mac *mac = netdev_priv(dev);
392 struct pasemi_mac_txring *ring;
396 ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_txring),
397 offsetof(struct pasemi_mac_txring, chan));
400 dev_err(&mac->pdev->dev, "Can't allocate TX channel\n");
404 chno = ring->chan.chno;
406 spin_lock_init(&ring->lock);
408 ring->size = TX_RING_SIZE;
409 ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
410 TX_RING_SIZE, GFP_KERNEL);
411 if (!ring->ring_info)
414 /* Allocate descriptors */
415 if (pasemi_dma_alloc_ring(&ring->chan, TX_RING_SIZE))
418 write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
419 PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
420 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
421 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
423 write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
425 cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE |
426 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
427 PAS_DMA_TXCHAN_CFG_UP |
428 PAS_DMA_TXCHAN_CFG_WT(2);
430 if (translation_enabled())
431 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
433 write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
435 ring->next_to_fill = 0;
436 ring->next_to_clean = 0;
442 kfree(ring->ring_info);
444 pasemi_dma_free_chan(&ring->chan);
449 static void pasemi_mac_free_tx_resources(struct pasemi_mac *mac)
451 struct pasemi_mac_txring *txring = tx_ring(mac);
453 struct pasemi_mac_buffer *info;
454 dma_addr_t dmas[MAX_SKB_FRAGS+1];
458 start = txring->next_to_clean;
459 limit = txring->next_to_fill;
461 /* Compensate for when fill has wrapped and clean has not */
463 limit += TX_RING_SIZE;
465 for (i = start; i < limit; i += freed) {
466 info = &txring->ring_info[(i+1) & (TX_RING_SIZE-1)];
467 if (info->dma && info->skb) {
468 nfrags = skb_shinfo(info->skb)->nr_frags;
469 for (j = 0; j <= nfrags; j++)
470 dmas[j] = txring->ring_info[(i+1+j) &
471 (TX_RING_SIZE-1)].dma;
472 freed = pasemi_mac_unmap_tx_skb(mac, nfrags,
478 kfree(txring->ring_info);
479 pasemi_dma_free_chan(&txring->chan);
483 static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)
485 struct pasemi_mac_rxring *rx = rx_ring(mac);
487 struct pasemi_mac_buffer *info;
489 for (i = 0; i < RX_RING_SIZE; i++) {
490 info = &RX_DESC_INFO(rx, i);
491 if (info->skb && info->dma) {
492 pci_unmap_single(mac->dma_pdev,
496 dev_kfree_skb_any(info->skb);
502 for (i = 0; i < RX_RING_SIZE; i++)
505 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
506 rx_ring(mac)->buffers, rx_ring(mac)->buf_dma);
508 kfree(rx_ring(mac)->ring_info);
509 pasemi_dma_free_chan(&rx_ring(mac)->chan);
513 static void pasemi_mac_replenish_rx_ring(const struct net_device *dev,
516 const struct pasemi_mac *mac = netdev_priv(dev);
517 struct pasemi_mac_rxring *rx = rx_ring(mac);
523 fill = rx_ring(mac)->next_to_fill;
524 for (count = 0; count < limit; count++) {
525 struct pasemi_mac_buffer *info = &RX_DESC_INFO(rx, fill);
526 u64 *buff = &RX_BUFF(rx, fill);
533 skb = dev_alloc_skb(BUF_SIZE);
534 skb_reserve(skb, LOCAL_SKB_ALIGN);
539 dma = pci_map_single(mac->dma_pdev, skb->data,
540 BUF_SIZE - LOCAL_SKB_ALIGN,
543 if (unlikely(dma_mapping_error(dma))) {
544 dev_kfree_skb_irq(info->skb);
550 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
556 write_dma_reg(PAS_DMA_RXINT_INCR(mac->dma_if), count);
558 rx_ring(mac)->next_to_fill = (rx_ring(mac)->next_to_fill + count) &
562 static void pasemi_mac_restart_rx_intr(const struct pasemi_mac *mac)
564 struct pasemi_mac_rxring *rx = rx_ring(mac);
565 unsigned int reg, pcnt;
566 /* Re-enable packet count interrupts: finally
567 * ack the packet count interrupt we got in rx_intr.
570 pcnt = *rx->chan.status & PAS_STATUS_PCNT_M;
572 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
574 if (*rx->chan.status & PAS_STATUS_TIMER)
575 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
577 write_iob_reg(PAS_IOB_DMA_RXCH_RESET(mac->rx->chan.chno), reg);
580 static void pasemi_mac_restart_tx_intr(const struct pasemi_mac *mac)
582 unsigned int reg, pcnt;
584 /* Re-enable packet count interrupts */
585 pcnt = *tx_ring(mac)->chan.status & PAS_STATUS_PCNT_M;
587 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
589 write_iob_reg(PAS_IOB_DMA_TXCH_RESET(tx_ring(mac)->chan.chno), reg);
593 static inline void pasemi_mac_rx_error(const struct pasemi_mac *mac,
596 unsigned int rcmdsta, ccmdsta;
597 struct pasemi_dmachan *chan = &rx_ring(mac)->chan;
599 if (!netif_msg_rx_err(mac))
602 rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
603 ccmdsta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(chan->chno));
605 printk(KERN_ERR "pasemi_mac: rx error. macrx %016lx, rx status %lx\n",
606 macrx, *chan->status);
608 printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
612 static inline void pasemi_mac_tx_error(const struct pasemi_mac *mac,
616 struct pasemi_dmachan *chan = &tx_ring(mac)->chan;
618 if (!netif_msg_tx_err(mac))
621 cmdsta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(chan->chno));
623 printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016lx, "\
624 "tx status 0x%016lx\n", mactx, *chan->status);
626 printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
629 static int pasemi_mac_clean_rx(struct pasemi_mac_rxring *rx,
632 const struct pasemi_dmachan *chan = &rx->chan;
633 struct pasemi_mac *mac = rx->mac;
634 struct pci_dev *pdev = mac->dma_pdev;
636 int count, buf_index, tot_bytes, packets;
637 struct pasemi_mac_buffer *info;
646 spin_lock(&rx->lock);
648 n = rx->next_to_clean;
650 prefetch(&RX_DESC(rx, n));
652 for (count = 0; count < limit; count++) {
653 macrx = RX_DESC(rx, n);
654 prefetch(&RX_DESC(rx, n+4));
656 if ((macrx & XCT_MACRX_E) ||
657 (*chan->status & PAS_STATUS_ERROR))
658 pasemi_mac_rx_error(mac, macrx);
660 if (!(macrx & XCT_MACRX_O))
665 BUG_ON(!(macrx & XCT_MACRX_RR_8BRES));
667 eval = (RX_DESC(rx, n+1) & XCT_RXRES_8B_EVAL_M) >>
671 dma = (RX_DESC(rx, n+2) & XCT_PTR_ADDR_M);
672 info = &RX_DESC_INFO(rx, buf_index);
678 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
680 pci_unmap_single(pdev, dma, BUF_SIZE-LOCAL_SKB_ALIGN,
683 if (macrx & XCT_MACRX_CRC) {
684 /* CRC error flagged */
685 mac->netdev->stats.rx_errors++;
686 mac->netdev->stats.rx_crc_errors++;
687 /* No need to free skb, it'll be reused */
694 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
695 skb->ip_summed = CHECKSUM_UNNECESSARY;
696 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
699 skb->ip_summed = CHECKSUM_NONE;
704 /* Don't include CRC */
707 skb->protocol = eth_type_trans(skb, mac->netdev);
708 lro_receive_skb(&mac->lro_mgr, skb, (void *)macrx);
712 RX_DESC(rx, n+1) = 0;
714 /* Need to zero it out since hardware doesn't, since the
715 * replenish loop uses it to tell when it's done.
717 RX_BUFF(rx, buf_index) = 0;
722 if (n > RX_RING_SIZE) {
723 /* Errata 5971 workaround: L2 target of headers */
724 write_iob_reg(PAS_IOB_COM_PKTHDRCNT, 0);
725 n &= (RX_RING_SIZE-1);
728 rx_ring(mac)->next_to_clean = n;
730 lro_flush_all(&mac->lro_mgr);
732 /* Increase is in number of 16-byte entries, and since each descriptor
733 * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
736 write_dma_reg(PAS_DMA_RXCHAN_INCR(mac->rx->chan.chno), count << 1);
738 pasemi_mac_replenish_rx_ring(mac->netdev, count);
740 mac->netdev->stats.rx_bytes += tot_bytes;
741 mac->netdev->stats.rx_packets += packets;
743 spin_unlock(&rx_ring(mac)->lock);
748 /* Can't make this too large or we blow the kernel stack limits */
749 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
751 static int pasemi_mac_clean_tx(struct pasemi_mac_txring *txring)
753 struct pasemi_dmachan *chan = &txring->chan;
754 struct pasemi_mac *mac = txring->mac;
756 unsigned int start, descr_count, buf_count, batch_limit;
757 unsigned int ring_limit;
758 unsigned int total_count;
760 struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
761 dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
762 int nf[TX_CLEAN_BATCHSIZE];
766 batch_limit = TX_CLEAN_BATCHSIZE;
768 spin_lock_irqsave(&txring->lock, flags);
770 start = txring->next_to_clean;
771 ring_limit = txring->next_to_fill;
773 prefetch(&TX_DESC_INFO(txring, start+1).skb);
775 /* Compensate for when fill has wrapped but clean has not */
776 if (start > ring_limit)
777 ring_limit += TX_RING_SIZE;
783 descr_count < batch_limit && i < ring_limit;
785 u64 mactx = TX_DESC(txring, i);
788 skb = TX_DESC_INFO(txring, i+1).skb;
789 nr_frags = TX_DESC_INFO(txring, i).dma;
791 if ((mactx & XCT_MACTX_E) ||
792 (*chan->status & PAS_STATUS_ERROR))
793 pasemi_mac_tx_error(mac, mactx);
795 if (unlikely(mactx & XCT_MACTX_O))
796 /* Not yet transmitted */
799 buf_count = 2 + nr_frags;
800 /* Since we always fill with an even number of entries, make
801 * sure we skip any unused one at the end as well.
806 for (j = 0; j <= nr_frags; j++)
807 dmas[descr_count][j] = TX_DESC_INFO(txring, i+1+j).dma;
809 skbs[descr_count] = skb;
810 nf[descr_count] = nr_frags;
812 TX_DESC(txring, i) = 0;
813 TX_DESC(txring, i+1) = 0;
817 txring->next_to_clean = i & (TX_RING_SIZE-1);
819 spin_unlock_irqrestore(&txring->lock, flags);
820 netif_wake_queue(mac->netdev);
822 for (i = 0; i < descr_count; i++)
823 pasemi_mac_unmap_tx_skb(mac, nf[i], skbs[i], dmas[i]);
825 total_count += descr_count;
827 /* If the batch was full, try to clean more */
828 if (descr_count == batch_limit)
835 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
837 const struct pasemi_mac_rxring *rxring = data;
838 struct pasemi_mac *mac = rxring->mac;
839 struct net_device *dev = mac->netdev;
840 const struct pasemi_dmachan *chan = &rxring->chan;
843 if (!(*chan->status & PAS_STATUS_CAUSE_M))
846 /* Don't reset packet count so it won't fire again but clear
851 if (*chan->status & PAS_STATUS_SOFT)
852 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
853 if (*chan->status & PAS_STATUS_ERROR)
854 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
856 netif_rx_schedule(dev, &mac->napi);
858 write_iob_reg(PAS_IOB_DMA_RXCH_RESET(chan->chno), reg);
863 #define TX_CLEAN_INTERVAL HZ
865 static void pasemi_mac_tx_timer(unsigned long data)
867 struct pasemi_mac_txring *txring = (struct pasemi_mac_txring *)data;
868 struct pasemi_mac *mac = txring->mac;
870 pasemi_mac_clean_tx(txring);
872 mod_timer(&txring->clean_timer, jiffies + TX_CLEAN_INTERVAL);
874 pasemi_mac_restart_tx_intr(mac);
877 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
879 struct pasemi_mac_txring *txring = data;
880 const struct pasemi_dmachan *chan = &txring->chan;
881 struct pasemi_mac *mac = txring->mac;
884 if (!(*chan->status & PAS_STATUS_CAUSE_M))
889 if (*chan->status & PAS_STATUS_SOFT)
890 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
891 if (*chan->status & PAS_STATUS_ERROR)
892 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
894 mod_timer(&txring->clean_timer, jiffies + (TX_CLEAN_INTERVAL)*2);
896 netif_rx_schedule(mac->netdev, &mac->napi);
899 write_iob_reg(PAS_IOB_DMA_TXCH_RESET(chan->chno), reg);
904 static void pasemi_mac_intf_disable(struct pasemi_mac *mac)
908 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
909 flags &= ~PAS_MAC_CFG_PCFG_PE;
910 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
913 static void pasemi_mac_intf_enable(struct pasemi_mac *mac)
917 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
918 flags |= PAS_MAC_CFG_PCFG_PE;
919 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
922 static void pasemi_adjust_link(struct net_device *dev)
924 struct pasemi_mac *mac = netdev_priv(dev);
927 unsigned int new_flags;
929 if (!mac->phydev->link) {
930 /* If no link, MAC speed settings don't matter. Just report
931 * link down and return.
933 if (mac->link && netif_msg_link(mac))
934 printk(KERN_INFO "%s: Link is down.\n", dev->name);
936 netif_carrier_off(dev);
937 pasemi_mac_intf_disable(mac);
942 pasemi_mac_intf_enable(mac);
943 netif_carrier_on(dev);
946 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
947 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
948 PAS_MAC_CFG_PCFG_TSR_M);
950 if (!mac->phydev->duplex)
951 new_flags |= PAS_MAC_CFG_PCFG_HD;
953 switch (mac->phydev->speed) {
955 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
956 PAS_MAC_CFG_PCFG_TSR_1G;
959 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
960 PAS_MAC_CFG_PCFG_TSR_100M;
963 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
964 PAS_MAC_CFG_PCFG_TSR_10M;
967 printk("Unsupported speed %d\n", mac->phydev->speed);
970 /* Print on link or speed/duplex change */
971 msg = mac->link != mac->phydev->link || flags != new_flags;
973 mac->duplex = mac->phydev->duplex;
974 mac->speed = mac->phydev->speed;
975 mac->link = mac->phydev->link;
977 if (new_flags != flags)
978 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
980 if (msg && netif_msg_link(mac))
981 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
982 dev->name, mac->speed, mac->duplex ? "full" : "half");
985 static int pasemi_mac_phy_init(struct net_device *dev)
987 struct pasemi_mac *mac = netdev_priv(dev);
988 struct device_node *dn, *phy_dn;
989 struct phy_device *phydev;
992 const unsigned int *prop;
996 dn = pci_device_to_OF_node(mac->pdev);
997 ph = of_get_property(dn, "phy-handle", NULL);
1000 phy_dn = of_find_node_by_phandle(*ph);
1002 prop = of_get_property(phy_dn, "reg", NULL);
1003 ret = of_address_to_resource(phy_dn->parent, 0, &r);
1008 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
1010 of_node_put(phy_dn);
1016 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
1018 if (IS_ERR(phydev)) {
1019 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
1020 return PTR_ERR(phydev);
1023 mac->phydev = phydev;
1028 of_node_put(phy_dn);
1033 static int pasemi_mac_open(struct net_device *dev)
1035 struct pasemi_mac *mac = netdev_priv(dev);
1039 /* enable rx section */
1040 write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
1042 /* enable tx section */
1043 write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
1045 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
1046 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
1047 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
1049 write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
1051 ret = pasemi_mac_setup_rx_resources(dev);
1053 goto out_rx_resources;
1055 mac->tx = pasemi_mac_setup_tx_resources(dev);
1060 /* 0x3ff with 33MHz clock is about 31us */
1061 write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG,
1062 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff));
1064 write_iob_reg(PAS_IOB_DMA_RXCH_CFG(mac->rx->chan.chno),
1065 PAS_IOB_DMA_RXCH_CFG_CNTTH(256));
1067 write_iob_reg(PAS_IOB_DMA_TXCH_CFG(mac->tx->chan.chno),
1068 PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
1070 write_mac_reg(mac, PAS_MAC_IPC_CHNL,
1071 PAS_MAC_IPC_CHNL_DCHNO(mac->rx->chan.chno) |
1072 PAS_MAC_IPC_CHNL_BCH(mac->rx->chan.chno));
1075 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1076 PAS_DMA_RXINT_RCMDSTA_EN |
1077 PAS_DMA_RXINT_RCMDSTA_DROPS_M |
1078 PAS_DMA_RXINT_RCMDSTA_BP |
1079 PAS_DMA_RXINT_RCMDSTA_OO |
1080 PAS_DMA_RXINT_RCMDSTA_BT);
1082 /* enable rx channel */
1083 pasemi_dma_start_chan(&rx_ring(mac)->chan, PAS_DMA_RXCHAN_CCMDSTA_DU |
1084 PAS_DMA_RXCHAN_CCMDSTA_OD |
1085 PAS_DMA_RXCHAN_CCMDSTA_FD |
1086 PAS_DMA_RXCHAN_CCMDSTA_DT);
1088 /* enable tx channel */
1089 pasemi_dma_start_chan(&tx_ring(mac)->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
1090 PAS_DMA_TXCHAN_TCMDSTA_DB |
1091 PAS_DMA_TXCHAN_TCMDSTA_DE |
1092 PAS_DMA_TXCHAN_TCMDSTA_DA);
1094 pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
1096 write_dma_reg(PAS_DMA_RXCHAN_INCR(rx_ring(mac)->chan.chno),
1099 /* Clear out any residual packet count state from firmware */
1100 pasemi_mac_restart_rx_intr(mac);
1101 pasemi_mac_restart_tx_intr(mac);
1103 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
1105 if (mac->type == MAC_TYPE_GMAC)
1106 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
1108 flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
1110 /* Enable interface in MAC */
1111 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1113 ret = pasemi_mac_phy_init(dev);
1115 /* Since we won't get link notification, just enable RX */
1116 pasemi_mac_intf_enable(mac);
1117 if (mac->type == MAC_TYPE_GMAC) {
1118 /* Warn for missing PHY on SGMII (1Gig) ports */
1119 dev_warn(&mac->pdev->dev,
1120 "PHY init failed: %d.\n", ret);
1121 dev_warn(&mac->pdev->dev,
1122 "Defaulting to 1Gbit full duplex\n");
1126 netif_start_queue(dev);
1127 napi_enable(&mac->napi);
1129 snprintf(mac->tx_irq_name, sizeof(mac->tx_irq_name), "%s tx",
1132 ret = request_irq(mac->tx->chan.irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
1133 mac->tx_irq_name, mac->tx);
1135 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1136 mac->tx->chan.irq, ret);
1140 snprintf(mac->rx_irq_name, sizeof(mac->rx_irq_name), "%s rx",
1143 ret = request_irq(mac->rx->chan.irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
1144 mac->rx_irq_name, mac->rx);
1146 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1147 mac->rx->chan.irq, ret);
1152 phy_start(mac->phydev);
1154 init_timer(&mac->tx->clean_timer);
1155 mac->tx->clean_timer.function = pasemi_mac_tx_timer;
1156 mac->tx->clean_timer.data = (unsigned long)mac->tx;
1157 mac->tx->clean_timer.expires = jiffies+HZ;
1158 add_timer(&mac->tx->clean_timer);
1163 free_irq(mac->tx->chan.irq, mac->tx);
1165 napi_disable(&mac->napi);
1166 netif_stop_queue(dev);
1169 pasemi_mac_free_tx_resources(mac);
1170 pasemi_mac_free_rx_resources(mac);
1176 #define MAX_RETRIES 5000
1178 static int pasemi_mac_close(struct net_device *dev)
1180 struct pasemi_mac *mac = netdev_priv(dev);
1185 rxch = rx_ring(mac)->chan.chno;
1186 txch = tx_ring(mac)->chan.chno;
1189 phy_stop(mac->phydev);
1190 phy_disconnect(mac->phydev);
1193 del_timer_sync(&mac->tx->clean_timer);
1195 netif_stop_queue(dev);
1196 napi_disable(&mac->napi);
1198 sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1199 if (sta & (PAS_DMA_RXINT_RCMDSTA_BP |
1200 PAS_DMA_RXINT_RCMDSTA_OO |
1201 PAS_DMA_RXINT_RCMDSTA_BT))
1202 printk(KERN_DEBUG "pasemi_mac: rcmdsta error: 0x%08x\n", sta);
1204 sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1205 if (sta & (PAS_DMA_RXCHAN_CCMDSTA_DU |
1206 PAS_DMA_RXCHAN_CCMDSTA_OD |
1207 PAS_DMA_RXCHAN_CCMDSTA_FD |
1208 PAS_DMA_RXCHAN_CCMDSTA_DT))
1209 printk(KERN_DEBUG "pasemi_mac: ccmdsta error: 0x%08x\n", sta);
1211 sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1212 if (sta & (PAS_DMA_TXCHAN_TCMDSTA_SZ | PAS_DMA_TXCHAN_TCMDSTA_DB |
1213 PAS_DMA_TXCHAN_TCMDSTA_DE | PAS_DMA_TXCHAN_TCMDSTA_DA))
1214 printk(KERN_DEBUG "pasemi_mac: tcmdsta error: 0x%08x\n", sta);
1216 /* Clean out any pending buffers */
1217 pasemi_mac_clean_tx(tx_ring(mac));
1218 pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1220 /* Disable interface */
1221 write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch),
1222 PAS_DMA_TXCHAN_TCMDSTA_ST);
1223 write_dma_reg( PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1224 PAS_DMA_RXINT_RCMDSTA_ST);
1225 write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch),
1226 PAS_DMA_RXCHAN_CCMDSTA_ST);
1228 for (retries = 0; retries < MAX_RETRIES; retries++) {
1229 sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(rxch));
1230 if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
1235 if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
1236 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
1238 for (retries = 0; retries < MAX_RETRIES; retries++) {
1239 sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1240 if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
1245 if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
1246 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
1248 for (retries = 0; retries < MAX_RETRIES; retries++) {
1249 sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1250 if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
1255 if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
1256 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
1258 /* Then, disable the channel. This must be done separately from
1259 * stopping, since you can't disable when active.
1262 write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch), 0);
1263 write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch), 0);
1264 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
1266 free_irq(mac->tx->chan.irq, mac->tx);
1267 free_irq(mac->rx->chan.irq, mac->rx);
1269 /* Free resources */
1270 pasemi_mac_free_rx_resources(mac);
1271 pasemi_mac_free_tx_resources(mac);
1276 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
1278 struct pasemi_mac *mac = netdev_priv(dev);
1279 struct pasemi_mac_txring *txring;
1281 dma_addr_t map[MAX_SKB_FRAGS+1];
1282 unsigned int map_size[MAX_SKB_FRAGS+1];
1283 unsigned long flags;
1287 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD;
1289 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1290 const unsigned char *nh = skb_network_header(skb);
1292 switch (ip_hdr(skb)->protocol) {
1294 dflags |= XCT_MACTX_CSUM_TCP;
1295 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1296 dflags |= XCT_MACTX_IPO(nh - skb->data);
1299 dflags |= XCT_MACTX_CSUM_UDP;
1300 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1301 dflags |= XCT_MACTX_IPO(nh - skb->data);
1306 nfrags = skb_shinfo(skb)->nr_frags;
1308 map[0] = pci_map_single(mac->dma_pdev, skb->data, skb_headlen(skb),
1310 map_size[0] = skb_headlen(skb);
1311 if (dma_mapping_error(map[0]))
1312 goto out_err_nolock;
1314 for (i = 0; i < nfrags; i++) {
1315 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1317 map[i+1] = pci_map_page(mac->dma_pdev, frag->page,
1318 frag->page_offset, frag->size,
1320 map_size[i+1] = frag->size;
1321 if (dma_mapping_error(map[i+1])) {
1323 goto out_err_nolock;
1327 mactx = dflags | XCT_MACTX_LLEN(skb->len);
1329 txring = tx_ring(mac);
1331 spin_lock_irqsave(&txring->lock, flags);
1333 fill = txring->next_to_fill;
1335 /* Avoid stepping on the same cache line that the DMA controller
1336 * is currently about to send, so leave at least 8 words available.
1337 * Total free space needed is mactx + fragments + 8
1339 if (RING_AVAIL(txring) < nfrags + 10) {
1340 /* no room -- stop the queue and wait for tx intr */
1341 netif_stop_queue(dev);
1345 TX_DESC(txring, fill) = mactx;
1346 TX_DESC_INFO(txring, fill).dma = nfrags;
1348 TX_DESC_INFO(txring, fill).skb = skb;
1349 for (i = 0; i <= nfrags; i++) {
1350 TX_DESC(txring, fill+i) =
1351 XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1352 TX_DESC_INFO(txring, fill+i).dma = map[i];
1355 /* We have to add an even number of 8-byte entries to the ring
1356 * even if the last one is unused. That means always an odd number
1357 * of pointers + one mactx descriptor.
1362 txring->next_to_fill = (fill + nfrags + 1) & (TX_RING_SIZE-1);
1364 dev->stats.tx_packets++;
1365 dev->stats.tx_bytes += skb->len;
1367 spin_unlock_irqrestore(&txring->lock, flags);
1369 write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), (nfrags+2) >> 1);
1371 return NETDEV_TX_OK;
1374 spin_unlock_irqrestore(&txring->lock, flags);
1377 pci_unmap_single(mac->dma_pdev, map[nfrags], map_size[nfrags],
1380 return NETDEV_TX_BUSY;
1383 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1385 const struct pasemi_mac *mac = netdev_priv(dev);
1388 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1390 /* Set promiscuous */
1391 if (dev->flags & IFF_PROMISC)
1392 flags |= PAS_MAC_CFG_PCFG_PR;
1394 flags &= ~PAS_MAC_CFG_PCFG_PR;
1396 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1400 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1402 struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1403 struct net_device *dev = mac->netdev;
1406 pasemi_mac_clean_tx(tx_ring(mac));
1407 pkts = pasemi_mac_clean_rx(rx_ring(mac), budget);
1408 if (pkts < budget) {
1409 /* all done, no more packets present */
1410 netif_rx_complete(dev, napi);
1412 pasemi_mac_restart_rx_intr(mac);
1413 pasemi_mac_restart_tx_intr(mac);
1418 static int __devinit
1419 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1421 struct net_device *dev;
1422 struct pasemi_mac *mac;
1424 DECLARE_MAC_BUF(mac_buf);
1426 err = pci_enable_device(pdev);
1430 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1433 "pasemi_mac: Could not allocate ethernet device.\n");
1435 goto out_disable_device;
1438 pci_set_drvdata(pdev, dev);
1439 SET_NETDEV_DEV(dev, &pdev->dev);
1441 mac = netdev_priv(dev);
1446 netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1448 dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG |
1451 mac->lro_mgr.max_aggr = LRO_MAX_AGGR;
1452 mac->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1453 mac->lro_mgr.lro_arr = mac->lro_desc;
1454 mac->lro_mgr.get_skb_header = get_skb_hdr;
1455 mac->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1456 mac->lro_mgr.dev = mac->netdev;
1457 mac->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1458 mac->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1461 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1462 if (!mac->dma_pdev) {
1463 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1468 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1469 if (!mac->iob_pdev) {
1470 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1475 /* get mac addr from device tree */
1476 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1480 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1482 mac->dma_if = mac_to_intf(mac);
1483 if (mac->dma_if < 0) {
1484 dev_err(&mac->pdev->dev, "Can't map DMA interface\n");
1489 switch (pdev->device) {
1491 mac->type = MAC_TYPE_GMAC;
1494 mac->type = MAC_TYPE_XAUI;
1501 dev->open = pasemi_mac_open;
1502 dev->stop = pasemi_mac_close;
1503 dev->hard_start_xmit = pasemi_mac_start_tx;
1504 dev->set_multicast_list = pasemi_mac_set_rx_mode;
1505 dev->set_mac_address = pasemi_mac_set_mac_addr;
1510 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1512 /* Enable most messages by default */
1513 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1515 err = register_netdev(dev);
1518 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1521 } else if netif_msg_probe(mac)
1522 printk(KERN_INFO "%s: PA Semi %s: intf %d, hw addr %s\n",
1523 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1524 mac->dma_if, print_mac(mac_buf, dev->dev_addr));
1530 pci_dev_put(mac->iob_pdev);
1532 pci_dev_put(mac->dma_pdev);
1536 pci_disable_device(pdev);
1541 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1543 struct net_device *netdev = pci_get_drvdata(pdev);
1544 struct pasemi_mac *mac;
1549 mac = netdev_priv(netdev);
1551 unregister_netdev(netdev);
1553 pci_disable_device(pdev);
1554 pci_dev_put(mac->dma_pdev);
1555 pci_dev_put(mac->iob_pdev);
1557 pasemi_dma_free_chan(&mac->tx->chan);
1558 pasemi_dma_free_chan(&mac->rx->chan);
1560 pci_set_drvdata(pdev, NULL);
1561 free_netdev(netdev);
1564 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1565 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1566 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1570 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1572 static struct pci_driver pasemi_mac_driver = {
1573 .name = "pasemi_mac",
1574 .id_table = pasemi_mac_pci_tbl,
1575 .probe = pasemi_mac_probe,
1576 .remove = __devexit_p(pasemi_mac_remove),
1579 static void __exit pasemi_mac_cleanup_module(void)
1581 pci_unregister_driver(&pasemi_mac_driver);
1584 int pasemi_mac_init_module(void)
1588 err = pasemi_dma_init();
1592 return pci_register_driver(&pasemi_mac_driver);
1595 module_init(pasemi_mac_init_module);
1596 module_exit(pasemi_mac_cleanup_module);