3 * ALSA driver for RME Hammerfall DSP MADI audio interface(s)
5 * Copyright (c) 2003 Winfried Ritsch (IEM)
6 * code based on hdsp.c Paul Davis
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <sound/driver.h>
26 #include <linux/init.h>
27 #include <linux/delay.h>
28 #include <linux/interrupt.h>
29 #include <linux/moduleparam.h>
30 #include <linux/slab.h>
31 #include <linux/pci.h>
34 #include <sound/core.h>
35 #include <sound/control.h>
36 #include <sound/pcm.h>
37 #include <sound/info.h>
38 #include <sound/asoundef.h>
39 #include <sound/rawmidi.h>
40 #include <sound/hwdep.h>
41 #include <sound/initval.h>
43 #include <sound/hdspm.h>
45 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
46 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
47 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
49 /* Disable precise pointer at start */
50 static int precise_ptr[SNDRV_CARDS];
52 /* Send all playback to line outs */
53 static int line_outs_monitor[SNDRV_CARDS];
55 /* Enable Analog Outs on Channel 63/64 by default */
56 static int enable_monitor[SNDRV_CARDS];
58 module_param_array(index, int, NULL, 0444);
59 MODULE_PARM_DESC(index, "Index value for RME HDSPM interface.");
61 module_param_array(id, charp, NULL, 0444);
62 MODULE_PARM_DESC(id, "ID string for RME HDSPM interface.");
64 module_param_array(enable, bool, NULL, 0444);
65 MODULE_PARM_DESC(enable, "Enable/disable specific HDSPM soundcards.");
67 module_param_array(precise_ptr, bool, NULL, 0444);
68 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer, or disable.");
70 module_param_array(line_outs_monitor, bool, NULL, 0444);
71 MODULE_PARM_DESC(line_outs_monitor,
72 "Send playback streams to analog outs by default.");
74 module_param_array(enable_monitor, bool, NULL, 0444);
75 MODULE_PARM_DESC(enable_monitor,
76 "Enable Analog Out on Channel 63/64 by default.");
79 ("Winfried Ritsch <ritsch_AT_iem.at>, Paul Davis <paul@linuxaudiosystems.com>, "
80 "Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
81 MODULE_DESCRIPTION("RME HDSPM");
82 MODULE_LICENSE("GPL");
83 MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
85 /* --- Write registers. ---
86 These are defined as byte-offsets from the iobase value. */
88 #define HDSPM_controlRegister 64
89 #define HDSPM_interruptConfirmation 96
90 #define HDSPM_control2Reg 256 /* not in specs ???????? */
91 #define HDSPM_midiDataOut0 352 /* just believe in old code */
92 #define HDSPM_midiDataOut1 356
94 /* DMA enable for 64 channels, only Bit 0 is relevant */
95 #define HDSPM_outputEnableBase 512 /* 512-767 input DMA */
96 #define HDSPM_inputEnableBase 768 /* 768-1023 output DMA */
98 /* 16 page addresses for each of the 64 channels DMA buffer in and out
99 (each 64k=16*4k) Buffer must be 4k aligned (which is default i386 ????) */
100 #define HDSPM_pageAddressBufferOut 8192
101 #define HDSPM_pageAddressBufferIn (HDSPM_pageAddressBufferOut+64*16*4)
103 #define HDSPM_MADI_mixerBase 32768 /* 32768-65535 for 2x64x64 Fader */
105 #define HDSPM_MATRIX_MIXER_SIZE 8192 /* = 2*64*64 * 4 Byte => 32kB */
107 /* --- Read registers. ---
108 These are defined as byte-offsets from the iobase value */
109 #define HDSPM_statusRegister 0
110 #define HDSPM_statusRegister2 96
112 #define HDSPM_midiDataIn0 360
113 #define HDSPM_midiDataIn1 364
115 /* status is data bytes in MIDI-FIFO (0-128) */
116 #define HDSPM_midiStatusOut0 384
117 #define HDSPM_midiStatusOut1 388
118 #define HDSPM_midiStatusIn0 392
119 #define HDSPM_midiStatusIn1 396
122 /* the meters are regular i/o-mapped registers, but offset
123 considerably from the rest. the peak registers are reset
124 when read; the least-significant 4 bits are full-scale counters;
125 the actual peak value is in the most-significant 24 bits.
127 #define HDSPM_MADI_peakrmsbase 4096 /* 4096-8191 2x64x32Bit Meters */
129 /* --- Control Register bits --------- */
130 #define HDSPM_Start (1<<0) /* start engine */
132 #define HDSPM_Latency0 (1<<1) /* buffer size = 2^n */
133 #define HDSPM_Latency1 (1<<2) /* where n is defined */
134 #define HDSPM_Latency2 (1<<3) /* by Latency{2,1,0} */
136 #define HDSPM_ClockModeMaster (1<<4) /* 1=Master, 0=Slave/Autosync */
138 #define HDSPM_AudioInterruptEnable (1<<5) /* what do you think ? */
140 #define HDSPM_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz 1=48kHz/96kHz */
141 #define HDSPM_Frequency1 (1<<7) /* 0=32kHz/64kHz */
142 #define HDSPM_DoubleSpeed (1<<8) /* 0=normal speed, 1=double speed */
143 #define HDSPM_QuadSpeed (1<<31) /* quad speed bit, not implemented now */
145 #define HDSPM_TX_64ch (1<<10) /* Output 64channel MODE=1,
148 #define HDSPM_AutoInp (1<<11) /* Auto Input (takeover) == Safe Mode,
151 #define HDSPM_InputSelect0 (1<<14) /* Input select 0= optical, 1=coax */
152 #define HDSPM_InputSelect1 (1<<15) /* should be 0 */
154 #define HDSPM_SyncRef0 (1<<16) /* 0=WOrd, 1=MADI */
155 #define HDSPM_SyncRef1 (1<<17) /* should be 0 */
157 #define HDSPM_clr_tms (1<<19) /* clear track marker, do not use
158 AES additional bits in
159 lower 5 Audiodatabits ??? */
161 #define HDSPM_Midi0InterruptEnable (1<<22)
162 #define HDSPM_Midi1InterruptEnable (1<<23)
164 #define HDSPM_LineOut (1<<24) /* Analog Out on channel 63/64 on=1, mute=0 */
167 /* --- bit helper defines */
168 #define HDSPM_LatencyMask (HDSPM_Latency0|HDSPM_Latency1|HDSPM_Latency2)
169 #define HDSPM_FrequencyMask (HDSPM_Frequency0|HDSPM_Frequency1)
170 #define HDSPM_InputMask (HDSPM_InputSelect0|HDSPM_InputSelect1)
171 #define HDSPM_InputOptical 0
172 #define HDSPM_InputCoaxial (HDSPM_InputSelect0)
173 #define HDSPM_SyncRefMask (HDSPM_SyncRef0|HDSPM_SyncRef1)
174 #define HDSPM_SyncRef_Word 0
175 #define HDSPM_SyncRef_MADI (HDSPM_SyncRef0)
177 #define HDSPM_SYNC_FROM_WORD 0 /* Preferred sync reference */
178 #define HDSPM_SYNC_FROM_MADI 1 /* choices - used by "pref_sync_ref" */
180 #define HDSPM_Frequency32KHz HDSPM_Frequency0
181 #define HDSPM_Frequency44_1KHz HDSPM_Frequency1
182 #define HDSPM_Frequency48KHz (HDSPM_Frequency1|HDSPM_Frequency0)
183 #define HDSPM_Frequency64KHz (HDSPM_DoubleSpeed|HDSPM_Frequency0)
184 #define HDSPM_Frequency88_2KHz (HDSPM_DoubleSpeed|HDSPM_Frequency1)
185 #define HDSPM_Frequency96KHz (HDSPM_DoubleSpeed|HDSPM_Frequency1|HDSPM_Frequency0)
187 /* --- for internal discrimination */
188 #define HDSPM_CLOCK_SOURCE_AUTOSYNC 0 /* Sample Clock Sources */
189 #define HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ 1
190 #define HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ 2
191 #define HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ 3
192 #define HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ 4
193 #define HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ 5
194 #define HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ 6
195 #define HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ 7
196 #define HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ 8
197 #define HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ 9
199 /* Synccheck Status */
200 #define HDSPM_SYNC_CHECK_NO_LOCK 0
201 #define HDSPM_SYNC_CHECK_LOCK 1
202 #define HDSPM_SYNC_CHECK_SYNC 2
204 /* AutoSync References - used by "autosync_ref" control switch */
205 #define HDSPM_AUTOSYNC_FROM_WORD 0
206 #define HDSPM_AUTOSYNC_FROM_MADI 1
207 #define HDSPM_AUTOSYNC_FROM_NONE 2
209 /* Possible sources of MADI input */
210 #define HDSPM_OPTICAL 0 /* optical */
211 #define HDSPM_COAXIAL 1 /* BNC */
213 #define hdspm_encode_latency(x) (((x)<<1) & HDSPM_LatencyMask)
214 #define hdspm_decode_latency(x) (((x) & HDSPM_LatencyMask)>>1)
216 #define hdspm_encode_in(x) (((x)&0x3)<<14)
217 #define hdspm_decode_in(x) (((x)>>14)&0x3)
219 /* --- control2 register bits --- */
220 #define HDSPM_TMS (1<<0)
221 #define HDSPM_TCK (1<<1)
222 #define HDSPM_TDI (1<<2)
223 #define HDSPM_JTAG (1<<3)
224 #define HDSPM_PWDN (1<<4)
225 #define HDSPM_PROGRAM (1<<5)
226 #define HDSPM_CONFIG_MODE_0 (1<<6)
227 #define HDSPM_CONFIG_MODE_1 (1<<7)
228 /*#define HDSPM_VERSION_BIT (1<<8) not defined any more*/
229 #define HDSPM_BIGENDIAN_MODE (1<<9)
230 #define HDSPM_RD_MULTIPLE (1<<10)
232 /* --- Status Register bits --- */
233 #define HDSPM_audioIRQPending (1<<0) /* IRQ is high and pending */
234 #define HDSPM_RX_64ch (1<<1) /* Input 64chan. MODE=1, 56chn. MODE=0 */
235 #define HDSPM_AB_int (1<<2) /* InputChannel Opt=0, Coax=1 (like inp0) */
236 #define HDSPM_madiLock (1<<3) /* MADI Locked =1, no=0 */
238 #define HDSPM_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
239 /* since 64byte accurate last 6 bits
242 #define HDSPM_madiSync (1<<18) /* MADI is in sync */
243 #define HDSPM_DoubleSpeedStatus (1<<19) /* (input) card in double speed */
245 #define HDSPM_madiFreq0 (1<<22) /* system freq 0=error */
246 #define HDSPM_madiFreq1 (1<<23) /* 1=32, 2=44.1 3=48 */
247 #define HDSPM_madiFreq2 (1<<24) /* 4=64, 5=88.2 6=96 */
248 #define HDSPM_madiFreq3 (1<<25) /* 7=128, 8=176.4 9=192 */
250 #define HDSPM_BufferID (1<<26) /* (Double)Buffer ID toggles with Interrupt */
251 #define HDSPM_midi0IRQPending (1<<30) /* MIDI IRQ is pending */
252 #define HDSPM_midi1IRQPending (1<<31) /* and aktiv */
254 /* --- status bit helpers */
255 #define HDSPM_madiFreqMask (HDSPM_madiFreq0|HDSPM_madiFreq1|HDSPM_madiFreq2|HDSPM_madiFreq3)
256 #define HDSPM_madiFreq32 (HDSPM_madiFreq0)
257 #define HDSPM_madiFreq44_1 (HDSPM_madiFreq1)
258 #define HDSPM_madiFreq48 (HDSPM_madiFreq0|HDSPM_madiFreq1)
259 #define HDSPM_madiFreq64 (HDSPM_madiFreq2)
260 #define HDSPM_madiFreq88_2 (HDSPM_madiFreq0|HDSPM_madiFreq2)
261 #define HDSPM_madiFreq96 (HDSPM_madiFreq1|HDSPM_madiFreq2)
262 #define HDSPM_madiFreq128 (HDSPM_madiFreq0|HDSPM_madiFreq1|HDSPM_madiFreq2)
263 #define HDSPM_madiFreq176_4 (HDSPM_madiFreq3)
264 #define HDSPM_madiFreq192 (HDSPM_madiFreq3|HDSPM_madiFreq0)
266 /* Status2 Register bits */
268 #define HDSPM_version0 (1<<0) /* not realy defined but I guess */
269 #define HDSPM_version1 (1<<1) /* in former cards it was ??? */
270 #define HDSPM_version2 (1<<2)
272 #define HDSPM_wcLock (1<<3) /* Wordclock is detected and locked */
273 #define HDSPM_wcSync (1<<4) /* Wordclock is in sync with systemclock */
275 #define HDSPM_wc_freq0 (1<<5) /* input freq detected via autosync */
276 #define HDSPM_wc_freq1 (1<<6) /* 001=32, 010==44.1, 011=48, */
277 #define HDSPM_wc_freq2 (1<<7) /* 100=64, 101=88.2, 110=96, */
278 /* missing Bit for 111=128, 1000=176.4, 1001=192 */
280 #define HDSPM_SelSyncRef0 (1<<8) /* Sync Source in slave mode */
281 #define HDSPM_SelSyncRef1 (1<<9) /* 000=word, 001=MADI, */
282 #define HDSPM_SelSyncRef2 (1<<10) /* 111=no valid signal */
284 #define HDSPM_wc_valid (HDSPM_wcLock|HDSPM_wcSync)
286 #define HDSPM_wcFreqMask (HDSPM_wc_freq0|HDSPM_wc_freq1|HDSPM_wc_freq2)
287 #define HDSPM_wcFreq32 (HDSPM_wc_freq0)
288 #define HDSPM_wcFreq44_1 (HDSPM_wc_freq1)
289 #define HDSPM_wcFreq48 (HDSPM_wc_freq0|HDSPM_wc_freq1)
290 #define HDSPM_wcFreq64 (HDSPM_wc_freq2)
291 #define HDSPM_wcFreq88_2 (HDSPM_wc_freq0|HDSPM_wc_freq2)
292 #define HDSPM_wcFreq96 (HDSPM_wc_freq1|HDSPM_wc_freq2)
295 #define HDSPM_SelSyncRefMask (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|HDSPM_SelSyncRef2)
296 #define HDSPM_SelSyncRef_WORD 0
297 #define HDSPM_SelSyncRef_MADI (HDSPM_SelSyncRef0)
298 #define HDSPM_SelSyncRef_NVALID (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|HDSPM_SelSyncRef2)
301 #define UNITY_GAIN 32768 /* = 65536/2 */
302 #define MINUS_INFINITY_GAIN 0
305 #ifndef PCI_VENDOR_ID_XILINX
306 #define PCI_VENDOR_ID_XILINX 0x10ee
308 #ifndef PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP
309 #define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5
311 #ifndef PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI
312 #define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6
316 /* Number of channels for different Speed Modes */
317 #define MADI_SS_CHANNELS 64
318 #define MADI_DS_CHANNELS 32
319 #define MADI_QS_CHANNELS 16
321 /* the size of a substream (1 mono data stream) */
322 #define HDSPM_CHANNEL_BUFFER_SAMPLES (16*1024)
323 #define HDSPM_CHANNEL_BUFFER_BYTES (4*HDSPM_CHANNEL_BUFFER_SAMPLES)
325 /* the size of the area we need to allocate for DMA transfers. the
326 size is the same regardless of the number of channels, and
327 also the latency to use.
328 for one direction !!!
330 #define HDSPM_DMA_AREA_BYTES (HDSPM_MAX_CHANNELS * HDSPM_CHANNEL_BUFFER_BYTES)
331 #define HDSPM_DMA_AREA_KILOBYTES (HDSPM_DMA_AREA_BYTES/1024)
333 typedef struct _hdspm hdspm_t;
334 typedef struct _hdspm_midi hdspm_midi_t;
339 snd_rawmidi_t *rmidi;
340 snd_rawmidi_substream_t *input;
341 snd_rawmidi_substream_t *output;
342 char istimer; /* timer in use */
343 struct timer_list timer;
350 snd_pcm_substream_t *capture_substream; /* only one playback */
351 snd_pcm_substream_t *playback_substream; /* and/or capture stream */
353 char *card_name; /* for procinfo */
354 unsigned short firmware_rev; /* dont know if relevant */
356 int precise_ptr; /* use precise pointers, to be tested */
357 int monitor_outs; /* set up monitoring outs init flag */
359 u32 control_register; /* cached value */
360 u32 control2_register; /* cached value */
362 hdspm_midi_t midi[2];
363 struct tasklet_struct midi_tasklet;
366 unsigned char ss_channels; /* channels of card in single speed */
367 unsigned char ds_channels; /* Double Speed */
368 unsigned char qs_channels; /* Quad Speed */
370 unsigned char *playback_buffer; /* suitably aligned address */
371 unsigned char *capture_buffer; /* suitably aligned address */
373 pid_t capture_pid; /* process id which uses capture */
374 pid_t playback_pid; /* process id which uses capture */
375 int running; /* running status */
377 int last_external_sample_rate; /* samplerate mystic ... */
378 int last_internal_sample_rate;
379 int system_sample_rate;
381 char *channel_map; /* channel map for DS and Quadspeed */
383 int dev; /* Hardware vars... */
386 void __iomem *iobase;
388 int irq_count; /* for debug */
390 snd_card_t *card; /* one card */
391 snd_pcm_t *pcm; /* has one pcm */
392 snd_hwdep_t *hwdep; /* and a hwdep for additional ioctl */
393 struct pci_dev *pci; /* and an pci info */
396 snd_kcontrol_t *playback_mixer_ctls[HDSPM_MAX_CHANNELS]; /* fast alsa mixer */
397 snd_kcontrol_t *input_mixer_ctls[HDSPM_MAX_CHANNELS]; /* but input to much, so not used */
398 hdspm_mixer_t *mixer; /* full mixer accessable over mixer ioctl or hwdep-device */
402 /* These tables map the ALSA channels 1..N to the channels that we
403 need to use in order to find the relevant channel buffer. RME
404 refer to this kind of mapping as between "the ADAT channel and
405 the DMA channel." We index it using the logical audio channel,
406 and the value is the DMA channel (i.e. channel buffer number)
407 where the data for that channel can be read/written from/to.
410 static char channel_map_madi_ss[HDSPM_MAX_CHANNELS] = {
411 0, 1, 2, 3, 4, 5, 6, 7,
412 8, 9, 10, 11, 12, 13, 14, 15,
413 16, 17, 18, 19, 20, 21, 22, 23,
414 24, 25, 26, 27, 28, 29, 30, 31,
415 32, 33, 34, 35, 36, 37, 38, 39,
416 40, 41, 42, 43, 44, 45, 46, 47,
417 48, 49, 50, 51, 52, 53, 54, 55,
418 56, 57, 58, 59, 60, 61, 62, 63
421 static char channel_map_madi_ds[HDSPM_MAX_CHANNELS] = {
422 0, 2, 4, 6, 8, 10, 12, 14,
423 16, 18, 20, 22, 24, 26, 28, 30,
424 32, 34, 36, 38, 40, 42, 44, 46,
425 48, 50, 52, 54, 56, 58, 60, 62,
426 -1, -1, -1, -1, -1, -1, -1, -1,
427 -1, -1, -1, -1, -1, -1, -1, -1,
428 -1, -1, -1, -1, -1, -1, -1, -1,
429 -1, -1, -1, -1, -1, -1, -1, -1
432 static char channel_map_madi_qs[HDSPM_MAX_CHANNELS] = {
433 0, 4, 8, 12, 16, 20, 24, 28,
434 32, 36, 40, 44, 48, 52, 56, 60
435 -1, -1, -1, -1, -1, -1, -1, -1,
436 -1, -1, -1, -1, -1, -1, -1, -1,
437 -1, -1, -1, -1, -1, -1, -1, -1,
438 -1, -1, -1, -1, -1, -1, -1, -1,
439 -1, -1, -1, -1, -1, -1, -1, -1,
440 -1, -1, -1, -1, -1, -1, -1, -1
444 static struct pci_device_id snd_hdspm_ids[] = {
446 .vendor = PCI_VENDOR_ID_XILINX,
447 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI,
448 .subvendor = PCI_ANY_ID,
449 .subdevice = PCI_ANY_ID,
456 MODULE_DEVICE_TABLE(pci, snd_hdspm_ids);
459 static int __devinit snd_hdspm_create_alsa_devices(snd_card_t * card,
461 static int __devinit snd_hdspm_create_pcm(snd_card_t * card,
464 static inline void snd_hdspm_initialize_midi_flush(hdspm_t * hdspm);
465 static int hdspm_update_simple_mixer_controls(hdspm_t * hdspm);
466 static int hdspm_autosync_ref(hdspm_t * hdspm);
467 static int snd_hdspm_set_defaults(hdspm_t * hdspm);
468 static void hdspm_set_sgbuf(hdspm_t * hdspm, struct snd_sg_buf *sgbuf,
469 unsigned int reg, int channels);
471 /* Write/read to/from HDSPM with Adresses in Bytes
472 not words but only 32Bit writes are allowed */
474 static inline void hdspm_write(hdspm_t * hdspm, unsigned int reg,
477 writel(val, hdspm->iobase + reg);
480 static inline unsigned int hdspm_read(hdspm_t * hdspm, unsigned int reg)
482 return readl(hdspm->iobase + reg);
485 /* for each output channel (chan) I have an Input (in) and Playback (pb) Fader
486 mixer is write only on hardware so we have to cache him for read
487 each fader is a u32, but uses only the first 16 bit */
489 static inline int hdspm_read_in_gain(hdspm_t * hdspm, unsigned int chan,
492 if (chan > HDSPM_MIXER_CHANNELS || in > HDSPM_MIXER_CHANNELS)
495 return hdspm->mixer->ch[chan].in[in];
498 static inline int hdspm_read_pb_gain(hdspm_t * hdspm, unsigned int chan,
501 if (chan > HDSPM_MIXER_CHANNELS || pb > HDSPM_MIXER_CHANNELS)
503 return hdspm->mixer->ch[chan].pb[pb];
506 static inline int hdspm_write_in_gain(hdspm_t * hdspm, unsigned int chan,
507 unsigned int in, unsigned short data)
509 if (chan >= HDSPM_MIXER_CHANNELS || in >= HDSPM_MIXER_CHANNELS)
513 HDSPM_MADI_mixerBase +
514 ((in + 128 * chan) * sizeof(u32)),
515 (hdspm->mixer->ch[chan].in[in] = data & 0xFFFF));
519 static inline int hdspm_write_pb_gain(hdspm_t * hdspm, unsigned int chan,
520 unsigned int pb, unsigned short data)
522 if (chan >= HDSPM_MIXER_CHANNELS || pb >= HDSPM_MIXER_CHANNELS)
526 HDSPM_MADI_mixerBase +
527 ((64 + pb + 128 * chan) * sizeof(u32)),
528 (hdspm->mixer->ch[chan].pb[pb] = data & 0xFFFF));
533 /* enable DMA for specific channels, now available for DSP-MADI */
534 static inline void snd_hdspm_enable_in(hdspm_t * hdspm, int i, int v)
536 hdspm_write(hdspm, HDSPM_inputEnableBase + (4 * i), v);
539 static inline void snd_hdspm_enable_out(hdspm_t * hdspm, int i, int v)
541 hdspm_write(hdspm, HDSPM_outputEnableBase + (4 * i), v);
544 /* check if same process is writing and reading */
545 static inline int snd_hdspm_use_is_exclusive(hdspm_t * hdspm)
550 spin_lock_irqsave(&hdspm->lock, flags);
551 if ((hdspm->playback_pid != hdspm->capture_pid) &&
552 (hdspm->playback_pid >= 0) && (hdspm->capture_pid >= 0)) {
555 spin_unlock_irqrestore(&hdspm->lock, flags);
559 /* check for external sample rate */
560 static inline int hdspm_external_sample_rate(hdspm_t * hdspm)
562 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
563 unsigned int status = hdspm_read(hdspm, HDSPM_statusRegister);
564 unsigned int rate_bits;
567 /* if wordclock has synced freq and wordclock is valid */
568 if ((status2 & HDSPM_wcLock) != 0 &&
569 (status & HDSPM_SelSyncRef0) == 0) {
571 rate_bits = status2 & HDSPM_wcFreqMask;
577 case HDSPM_wcFreq44_1:
586 case HDSPM_wcFreq88_2:
592 /* Quadspeed Bit missing ???? */
599 /* if rate detected and Syncref is Word than have it, word has priority to MADI */
601 && (status2 & HDSPM_SelSyncRefMask) == HDSPM_SelSyncRef_WORD)
604 /* maby a madi input (which is taken if sel sync is madi) */
605 if (status & HDSPM_madiLock) {
606 rate_bits = status & HDSPM_madiFreqMask;
609 case HDSPM_madiFreq32:
612 case HDSPM_madiFreq44_1:
615 case HDSPM_madiFreq48:
618 case HDSPM_madiFreq64:
621 case HDSPM_madiFreq88_2:
624 case HDSPM_madiFreq96:
627 case HDSPM_madiFreq128:
630 case HDSPM_madiFreq176_4:
633 case HDSPM_madiFreq192:
644 /* Latency function */
645 static inline void hdspm_compute_period_size(hdspm_t * hdspm)
647 hdspm->period_bytes =
648 1 << ((hdspm_decode_latency(hdspm->control_register) + 8));
651 static snd_pcm_uframes_t hdspm_hw_pointer(hdspm_t * hdspm)
655 position = hdspm_read(hdspm, HDSPM_statusRegister);
657 if (!hdspm->precise_ptr) {
658 return (position & HDSPM_BufferID) ? (hdspm->period_bytes /
662 /* hwpointer comes in bytes and is 64Bytes accurate (by docu since PCI Burst)
663 i have experimented that it is at most 64 Byte to much for playing
664 so substraction of 64 byte should be ok for ALSA, but use it only
665 for application where you know what you do since if you come to
666 near with record pointer it can be a disaster */
668 position &= HDSPM_BufferPositionMask;
669 position = ((position - 64) % (2 * hdspm->period_bytes)) / 4;
675 static inline void hdspm_start_audio(hdspm_t * s)
677 s->control_register |= (HDSPM_AudioInterruptEnable | HDSPM_Start);
678 hdspm_write(s, HDSPM_controlRegister, s->control_register);
681 static inline void hdspm_stop_audio(hdspm_t * s)
683 s->control_register &= ~(HDSPM_Start | HDSPM_AudioInterruptEnable);
684 hdspm_write(s, HDSPM_controlRegister, s->control_register);
687 /* should I silence all or only opened ones ? doit all for first even is 4MB*/
688 static inline void hdspm_silence_playback(hdspm_t * hdspm)
691 int n = hdspm->period_bytes;
692 void *buf = hdspm->playback_buffer;
694 snd_assert(buf != NULL, return);
696 for (i = 0; i < HDSPM_MAX_CHANNELS; i++) {
698 buf += HDSPM_CHANNEL_BUFFER_BYTES;
702 static int hdspm_set_interrupt_interval(hdspm_t * s, unsigned int frames)
706 spin_lock_irq(&s->lock);
714 s->control_register &= ~HDSPM_LatencyMask;
715 s->control_register |= hdspm_encode_latency(n);
717 hdspm_write(s, HDSPM_controlRegister, s->control_register);
719 hdspm_compute_period_size(s);
721 spin_unlock_irq(&s->lock);
727 /* dummy set rate lets see what happens */
728 static int hdspm_set_rate(hdspm_t * hdspm, int rate, int called_internally)
730 int reject_if_open = 0;
735 /* ASSUMPTION: hdspm->lock is either set, or there is no need for
736 it (e.g. during module initialization).
739 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) {
742 if (called_internally) {
744 /* request from ctl or card initialization
745 just make a warning an remember setting
746 for future master mode switching */
749 (KERN_WARNING "HDSPM: Warning: device is not running as a clock master.\n");
753 /* hw_param request while in AutoSync mode */
755 hdspm_external_sample_rate(hdspm);
757 if ((hdspm_autosync_ref(hdspm) ==
758 HDSPM_AUTOSYNC_FROM_NONE)) {
760 snd_printk(KERN_WARNING "HDSPM: Detected no Externel Sync \n");
763 } else if (rate != external_freq) {
766 (KERN_WARNING "HDSPM: Warning: No AutoSync source for requested rate\n");
772 current_rate = hdspm->system_sample_rate;
774 /* Changing between Singe, Double and Quad speed is not
775 allowed if any substreams are open. This is because such a change
776 causes a shift in the location of the DMA buffers and a reduction
777 in the number of available buffers.
779 Note that a similar but essentially insoluble problem exists for
780 externally-driven rate changes. All we can do is to flag rate
781 changes in the read/write routines.
786 if (current_rate > 48000) {
789 rate_bits = HDSPM_Frequency32KHz;
792 if (current_rate > 48000) {
795 rate_bits = HDSPM_Frequency44_1KHz;
798 if (current_rate > 48000) {
801 rate_bits = HDSPM_Frequency48KHz;
804 if (current_rate <= 48000) {
807 rate_bits = HDSPM_Frequency64KHz;
810 if (current_rate <= 48000) {
813 rate_bits = HDSPM_Frequency88_2KHz;
816 if (current_rate <= 48000) {
819 rate_bits = HDSPM_Frequency96KHz;
826 && (hdspm->capture_pid >= 0 || hdspm->playback_pid >= 0)) {
828 (KERN_ERR "HDSPM: cannot change between single- and double-speed mode (capture PID = %d, playback PID = %d)\n",
829 hdspm->capture_pid, hdspm->playback_pid);
833 hdspm->control_register &= ~HDSPM_FrequencyMask;
834 hdspm->control_register |= rate_bits;
835 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
838 hdspm->channel_map = channel_map_madi_qs;
839 else if (rate > 48000)
840 hdspm->channel_map = channel_map_madi_ds;
842 hdspm->channel_map = channel_map_madi_ss;
844 hdspm->system_sample_rate = rate;
852 /* mainly for init to 0 on load */
853 static void all_in_all_mixer(hdspm_t * hdspm, int sgain)
857 (sgain > UNITY_GAIN) ? UNITY_GAIN : (sgain < 0) ? 0 : sgain;
859 for (i = 0; i < HDSPM_MIXER_CHANNELS; i++)
860 for (j = 0; j < HDSPM_MIXER_CHANNELS; j++) {
861 hdspm_write_in_gain(hdspm, i, j, gain);
862 hdspm_write_pb_gain(hdspm, i, j, gain);
866 /*----------------------------------------------------------------------------
868 ----------------------------------------------------------------------------*/
870 static inline unsigned char snd_hdspm_midi_read_byte (hdspm_t *hdspm, int id)
872 /* the hardware already does the relevant bit-mask with 0xff */
874 return hdspm_read(hdspm, HDSPM_midiDataIn1);
876 return hdspm_read(hdspm, HDSPM_midiDataIn0);
879 static inline void snd_hdspm_midi_write_byte (hdspm_t *hdspm, int id, int val)
881 /* the hardware already does the relevant bit-mask with 0xff */
883 return hdspm_write(hdspm, HDSPM_midiDataOut1, val);
885 return hdspm_write(hdspm, HDSPM_midiDataOut0, val);
888 static inline int snd_hdspm_midi_input_available (hdspm_t *hdspm, int id)
891 return (hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xff);
893 return (hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xff);
896 static inline int snd_hdspm_midi_output_possible (hdspm_t *hdspm, int id)
901 fifo_bytes_used = hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xff;
903 fifo_bytes_used = hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xff;
905 if (fifo_bytes_used < 128)
906 return 128 - fifo_bytes_used;
911 static inline void snd_hdspm_flush_midi_input (hdspm_t *hdspm, int id)
913 while (snd_hdspm_midi_input_available (hdspm, id))
914 snd_hdspm_midi_read_byte (hdspm, id);
917 static int snd_hdspm_midi_output_write (hdspm_midi_t *hmidi)
923 unsigned char buf[128];
925 /* Output is not interrupt driven */
927 spin_lock_irqsave (&hmidi->lock, flags);
929 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
930 if ((n_pending = snd_hdspm_midi_output_possible (hmidi->hdspm, hmidi->id)) > 0) {
931 if (n_pending > (int)sizeof (buf))
932 n_pending = sizeof (buf);
934 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
935 for (i = 0; i < to_write; ++i)
936 snd_hdspm_midi_write_byte (hmidi->hdspm, hmidi->id, buf[i]);
941 spin_unlock_irqrestore (&hmidi->lock, flags);
945 static int snd_hdspm_midi_input_read (hdspm_midi_t *hmidi)
947 unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
952 spin_lock_irqsave (&hmidi->lock, flags);
953 if ((n_pending = snd_hdspm_midi_input_available (hmidi->hdspm, hmidi->id)) > 0) {
955 if (n_pending > (int)sizeof (buf)) {
956 n_pending = sizeof (buf);
958 for (i = 0; i < n_pending; ++i) {
959 buf[i] = snd_hdspm_midi_read_byte (hmidi->hdspm, hmidi->id);
962 snd_rawmidi_receive (hmidi->input, buf, n_pending);
965 /* flush the MIDI input FIFO */
966 while (n_pending--) {
967 snd_hdspm_midi_read_byte (hmidi->hdspm, hmidi->id);
973 hmidi->hdspm->control_register |= HDSPM_Midi1InterruptEnable;
975 hmidi->hdspm->control_register |= HDSPM_Midi0InterruptEnable;
977 hdspm_write(hmidi->hdspm, HDSPM_controlRegister, hmidi->hdspm->control_register);
978 spin_unlock_irqrestore (&hmidi->lock, flags);
979 return snd_hdspm_midi_output_write (hmidi);
982 static void snd_hdspm_midi_input_trigger(snd_rawmidi_substream_t * substream, int up)
989 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
990 hdspm = hmidi->hdspm;
991 ie = hmidi->id ? HDSPM_Midi1InterruptEnable : HDSPM_Midi0InterruptEnable;
992 spin_lock_irqsave (&hdspm->lock, flags);
994 if (!(hdspm->control_register & ie)) {
995 snd_hdspm_flush_midi_input (hdspm, hmidi->id);
996 hdspm->control_register |= ie;
999 hdspm->control_register &= ~ie;
1002 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1003 spin_unlock_irqrestore (&hdspm->lock, flags);
1006 static void snd_hdspm_midi_output_timer(unsigned long data)
1008 hdspm_midi_t *hmidi = (hdspm_midi_t *) data;
1009 unsigned long flags;
1011 snd_hdspm_midi_output_write(hmidi);
1012 spin_lock_irqsave (&hmidi->lock, flags);
1014 /* this does not bump hmidi->istimer, because the
1015 kernel automatically removed the timer when it
1016 expired, and we are now adding it back, thus
1017 leaving istimer wherever it was set before.
1020 if (hmidi->istimer) {
1021 hmidi->timer.expires = 1 + jiffies;
1022 add_timer(&hmidi->timer);
1025 spin_unlock_irqrestore (&hmidi->lock, flags);
1028 static void snd_hdspm_midi_output_trigger(snd_rawmidi_substream_t * substream, int up)
1030 hdspm_midi_t *hmidi;
1031 unsigned long flags;
1033 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
1034 spin_lock_irqsave (&hmidi->lock, flags);
1036 if (!hmidi->istimer) {
1037 init_timer(&hmidi->timer);
1038 hmidi->timer.function = snd_hdspm_midi_output_timer;
1039 hmidi->timer.data = (unsigned long) hmidi;
1040 hmidi->timer.expires = 1 + jiffies;
1041 add_timer(&hmidi->timer);
1045 if (hmidi->istimer && --hmidi->istimer <= 0) {
1046 del_timer (&hmidi->timer);
1049 spin_unlock_irqrestore (&hmidi->lock, flags);
1051 snd_hdspm_midi_output_write(hmidi);
1054 static int snd_hdspm_midi_input_open(snd_rawmidi_substream_t * substream)
1056 hdspm_midi_t *hmidi;
1058 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
1059 spin_lock_irq (&hmidi->lock);
1060 snd_hdspm_flush_midi_input (hmidi->hdspm, hmidi->id);
1061 hmidi->input = substream;
1062 spin_unlock_irq (&hmidi->lock);
1067 static int snd_hdspm_midi_output_open(snd_rawmidi_substream_t * substream)
1069 hdspm_midi_t *hmidi;
1071 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
1072 spin_lock_irq (&hmidi->lock);
1073 hmidi->output = substream;
1074 spin_unlock_irq (&hmidi->lock);
1079 static int snd_hdspm_midi_input_close(snd_rawmidi_substream_t * substream)
1081 hdspm_midi_t *hmidi;
1083 snd_hdspm_midi_input_trigger (substream, 0);
1085 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
1086 spin_lock_irq (&hmidi->lock);
1087 hmidi->input = NULL;
1088 spin_unlock_irq (&hmidi->lock);
1093 static int snd_hdspm_midi_output_close(snd_rawmidi_substream_t * substream)
1095 hdspm_midi_t *hmidi;
1097 snd_hdspm_midi_output_trigger (substream, 0);
1099 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
1100 spin_lock_irq (&hmidi->lock);
1101 hmidi->output = NULL;
1102 spin_unlock_irq (&hmidi->lock);
1107 snd_rawmidi_ops_t snd_hdspm_midi_output =
1109 .open = snd_hdspm_midi_output_open,
1110 .close = snd_hdspm_midi_output_close,
1111 .trigger = snd_hdspm_midi_output_trigger,
1114 snd_rawmidi_ops_t snd_hdspm_midi_input =
1116 .open = snd_hdspm_midi_input_open,
1117 .close = snd_hdspm_midi_input_close,
1118 .trigger = snd_hdspm_midi_input_trigger,
1121 static int __devinit snd_hdspm_create_midi (snd_card_t *card, hdspm_t *hdspm, int id)
1126 hdspm->midi[id].id = id;
1127 hdspm->midi[id].rmidi = NULL;
1128 hdspm->midi[id].input = NULL;
1129 hdspm->midi[id].output = NULL;
1130 hdspm->midi[id].hdspm = hdspm;
1131 hdspm->midi[id].istimer = 0;
1132 hdspm->midi[id].pending = 0;
1133 spin_lock_init (&hdspm->midi[id].lock);
1135 sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1136 if ((err = snd_rawmidi_new (card, buf, id, 1, 1, &hdspm->midi[id].rmidi)) < 0)
1139 sprintf (hdspm->midi[id].rmidi->name, "%s MIDI %d", card->id, id+1);
1140 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id];
1142 snd_rawmidi_set_ops (hdspm->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdspm_midi_output);
1143 snd_rawmidi_set_ops (hdspm->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdspm_midi_input);
1145 hdspm->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1146 SNDRV_RAWMIDI_INFO_INPUT |
1147 SNDRV_RAWMIDI_INFO_DUPLEX;
1153 static void hdspm_midi_tasklet(unsigned long arg)
1155 hdspm_t *hdspm = (hdspm_t *)arg;
1157 if (hdspm->midi[0].pending)
1158 snd_hdspm_midi_input_read (&hdspm->midi[0]);
1159 if (hdspm->midi[1].pending)
1160 snd_hdspm_midi_input_read (&hdspm->midi[1]);
1164 /*-----------------------------------------------------------------------------
1166 ----------------------------------------------------------------------------*/
1168 /* get the system sample rate which is set */
1170 #define HDSPM_SYSTEM_SAMPLE_RATE(xname, xindex) \
1171 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1174 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1175 .info = snd_hdspm_info_system_sample_rate, \
1176 .get = snd_hdspm_get_system_sample_rate \
1179 static int snd_hdspm_info_system_sample_rate(snd_kcontrol_t * kcontrol,
1180 snd_ctl_elem_info_t * uinfo)
1182 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1187 static int snd_hdspm_get_system_sample_rate(snd_kcontrol_t * kcontrol,
1188 snd_ctl_elem_value_t *
1191 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1193 ucontrol->value.enumerated.item[0] = hdspm->system_sample_rate;
1197 #define HDSPM_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1198 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, \
1201 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1202 .info = snd_hdspm_info_autosync_sample_rate, \
1203 .get = snd_hdspm_get_autosync_sample_rate \
1206 static int snd_hdspm_info_autosync_sample_rate(snd_kcontrol_t * kcontrol,
1207 snd_ctl_elem_info_t * uinfo)
1209 static char *texts[] = { "32000", "44100", "48000",
1210 "64000", "88200", "96000",
1211 "128000", "176400", "192000",
1214 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1216 uinfo->value.enumerated.items = 10;
1217 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1218 uinfo->value.enumerated.item =
1219 uinfo->value.enumerated.items - 1;
1220 strcpy(uinfo->value.enumerated.name,
1221 texts[uinfo->value.enumerated.item]);
1225 static int snd_hdspm_get_autosync_sample_rate(snd_kcontrol_t * kcontrol,
1226 snd_ctl_elem_value_t *
1229 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1231 switch (hdspm_external_sample_rate(hdspm)) {
1233 ucontrol->value.enumerated.item[0] = 0;
1236 ucontrol->value.enumerated.item[0] = 1;
1239 ucontrol->value.enumerated.item[0] = 2;
1242 ucontrol->value.enumerated.item[0] = 3;
1245 ucontrol->value.enumerated.item[0] = 4;
1248 ucontrol->value.enumerated.item[0] = 5;
1251 ucontrol->value.enumerated.item[0] = 6;
1254 ucontrol->value.enumerated.item[0] = 7;
1257 ucontrol->value.enumerated.item[0] = 8;
1261 ucontrol->value.enumerated.item[0] = 9;
1266 #define HDSPM_SYSTEM_CLOCK_MODE(xname, xindex) \
1267 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1270 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1271 .info = snd_hdspm_info_system_clock_mode, \
1272 .get = snd_hdspm_get_system_clock_mode, \
1277 static int hdspm_system_clock_mode(hdspm_t * hdspm)
1279 /* Always reflect the hardware info, rme is never wrong !!!! */
1281 if (hdspm->control_register & HDSPM_ClockModeMaster)
1286 static int snd_hdspm_info_system_clock_mode(snd_kcontrol_t * kcontrol,
1287 snd_ctl_elem_info_t * uinfo)
1289 static char *texts[] = { "Master", "Slave" };
1291 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1293 uinfo->value.enumerated.items = 2;
1294 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1295 uinfo->value.enumerated.item =
1296 uinfo->value.enumerated.items - 1;
1297 strcpy(uinfo->value.enumerated.name,
1298 texts[uinfo->value.enumerated.item]);
1302 static int snd_hdspm_get_system_clock_mode(snd_kcontrol_t * kcontrol,
1303 snd_ctl_elem_value_t * ucontrol)
1305 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1307 ucontrol->value.enumerated.item[0] =
1308 hdspm_system_clock_mode(hdspm);
1312 #define HDSPM_CLOCK_SOURCE(xname, xindex) \
1313 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, \
1316 .info = snd_hdspm_info_clock_source, \
1317 .get = snd_hdspm_get_clock_source, \
1318 .put = snd_hdspm_put_clock_source \
1321 static int hdspm_clock_source(hdspm_t * hdspm)
1323 if (hdspm->control_register & HDSPM_ClockModeMaster) {
1324 switch (hdspm->system_sample_rate) {
1351 static int hdspm_set_clock_source(hdspm_t * hdspm, int mode)
1356 case HDSPM_CLOCK_SOURCE_AUTOSYNC:
1357 if (hdspm_external_sample_rate(hdspm) != 0) {
1358 hdspm->control_register &= ~HDSPM_ClockModeMaster;
1359 hdspm_write(hdspm, HDSPM_controlRegister,
1360 hdspm->control_register);
1364 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ:
1367 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ:
1370 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ:
1373 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ:
1376 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ:
1379 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ:
1382 case HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ:
1385 case HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ:
1388 case HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ:
1395 hdspm->control_register |= HDSPM_ClockModeMaster;
1396 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1397 hdspm_set_rate(hdspm, rate, 1);
1401 static int snd_hdspm_info_clock_source(snd_kcontrol_t * kcontrol,
1402 snd_ctl_elem_info_t * uinfo)
1404 static char *texts[] = { "AutoSync",
1405 "Internal 32.0 kHz", "Internal 44.1 kHz",
1406 "Internal 48.0 kHz",
1407 "Internal 64.0 kHz", "Internal 88.2 kHz",
1408 "Internal 96.0 kHz",
1409 "Internal 128.0 kHz", "Internal 176.4 kHz",
1410 "Internal 192.0 kHz"
1413 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1415 uinfo->value.enumerated.items = 10;
1417 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1418 uinfo->value.enumerated.item =
1419 uinfo->value.enumerated.items - 1;
1421 strcpy(uinfo->value.enumerated.name,
1422 texts[uinfo->value.enumerated.item]);
1427 static int snd_hdspm_get_clock_source(snd_kcontrol_t * kcontrol,
1428 snd_ctl_elem_value_t * ucontrol)
1430 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1432 ucontrol->value.enumerated.item[0] = hdspm_clock_source(hdspm);
1436 static int snd_hdspm_put_clock_source(snd_kcontrol_t * kcontrol,
1437 snd_ctl_elem_value_t * ucontrol)
1439 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1443 if (!snd_hdspm_use_is_exclusive(hdspm))
1445 val = ucontrol->value.enumerated.item[0];
1450 spin_lock_irq(&hdspm->lock);
1451 if (val != hdspm_clock_source(hdspm))
1452 change = (hdspm_set_clock_source(hdspm, val) == 0) ? 1 : 0;
1455 spin_unlock_irq(&hdspm->lock);
1459 #define HDSPM_PREF_SYNC_REF(xname, xindex) \
1460 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1463 .info = snd_hdspm_info_pref_sync_ref, \
1464 .get = snd_hdspm_get_pref_sync_ref, \
1465 .put = snd_hdspm_put_pref_sync_ref \
1468 static int hdspm_pref_sync_ref(hdspm_t * hdspm)
1470 /* Notice that this looks at the requested sync source,
1471 not the one actually in use.
1473 switch (hdspm->control_register & HDSPM_SyncRefMask) {
1474 case HDSPM_SyncRef_Word:
1475 return HDSPM_SYNC_FROM_WORD;
1476 case HDSPM_SyncRef_MADI:
1477 return HDSPM_SYNC_FROM_MADI;
1480 return HDSPM_SYNC_FROM_WORD;
1483 static int hdspm_set_pref_sync_ref(hdspm_t * hdspm, int pref)
1485 hdspm->control_register &= ~HDSPM_SyncRefMask;
1488 case HDSPM_SYNC_FROM_MADI:
1489 hdspm->control_register |= HDSPM_SyncRef_MADI;
1491 case HDSPM_SYNC_FROM_WORD:
1492 hdspm->control_register |= HDSPM_SyncRef_Word;
1497 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1501 static int snd_hdspm_info_pref_sync_ref(snd_kcontrol_t * kcontrol,
1502 snd_ctl_elem_info_t * uinfo)
1504 static char *texts[] = { "Word", "MADI" };
1506 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1509 uinfo->value.enumerated.items = 2;
1511 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1512 uinfo->value.enumerated.item =
1513 uinfo->value.enumerated.items - 1;
1514 strcpy(uinfo->value.enumerated.name,
1515 texts[uinfo->value.enumerated.item]);
1519 static int snd_hdspm_get_pref_sync_ref(snd_kcontrol_t * kcontrol,
1520 snd_ctl_elem_value_t * ucontrol)
1522 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1524 ucontrol->value.enumerated.item[0] = hdspm_pref_sync_ref(hdspm);
1528 static int snd_hdspm_put_pref_sync_ref(snd_kcontrol_t * kcontrol,
1529 snd_ctl_elem_value_t * ucontrol)
1531 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1537 if (!snd_hdspm_use_is_exclusive(hdspm))
1540 val = ucontrol->value.enumerated.item[0] % max;
1542 spin_lock_irq(&hdspm->lock);
1543 change = (int) val != hdspm_pref_sync_ref(hdspm);
1544 hdspm_set_pref_sync_ref(hdspm, val);
1545 spin_unlock_irq(&hdspm->lock);
1549 #define HDSPM_AUTOSYNC_REF(xname, xindex) \
1550 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1553 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1554 .info = snd_hdspm_info_autosync_ref, \
1555 .get = snd_hdspm_get_autosync_ref, \
1558 static int hdspm_autosync_ref(hdspm_t * hdspm)
1560 /* This looks at the autosync selected sync reference */
1561 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
1563 switch (status2 & HDSPM_SelSyncRefMask) {
1565 case HDSPM_SelSyncRef_WORD:
1566 return HDSPM_AUTOSYNC_FROM_WORD;
1568 case HDSPM_SelSyncRef_MADI:
1569 return HDSPM_AUTOSYNC_FROM_MADI;
1571 case HDSPM_SelSyncRef_NVALID:
1572 return HDSPM_AUTOSYNC_FROM_NONE;
1581 static int snd_hdspm_info_autosync_ref(snd_kcontrol_t * kcontrol,
1582 snd_ctl_elem_info_t * uinfo)
1584 static char *texts[] = { "WordClock", "MADI", "None" };
1586 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1588 uinfo->value.enumerated.items = 3;
1589 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1590 uinfo->value.enumerated.item =
1591 uinfo->value.enumerated.items - 1;
1592 strcpy(uinfo->value.enumerated.name,
1593 texts[uinfo->value.enumerated.item]);
1597 static int snd_hdspm_get_autosync_ref(snd_kcontrol_t * kcontrol,
1598 snd_ctl_elem_value_t * ucontrol)
1600 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1602 ucontrol->value.enumerated.item[0] = hdspm_pref_sync_ref(hdspm);
1606 #define HDSPM_LINE_OUT(xname, xindex) \
1607 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1610 .info = snd_hdspm_info_line_out, \
1611 .get = snd_hdspm_get_line_out, \
1612 .put = snd_hdspm_put_line_out \
1615 static int hdspm_line_out(hdspm_t * hdspm)
1617 return (hdspm->control_register & HDSPM_LineOut) ? 1 : 0;
1621 static int hdspm_set_line_output(hdspm_t * hdspm, int out)
1624 hdspm->control_register |= HDSPM_LineOut;
1626 hdspm->control_register &= ~HDSPM_LineOut;
1627 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1632 static int snd_hdspm_info_line_out(snd_kcontrol_t * kcontrol,
1633 snd_ctl_elem_info_t * uinfo)
1635 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1637 uinfo->value.integer.min = 0;
1638 uinfo->value.integer.max = 1;
1642 static int snd_hdspm_get_line_out(snd_kcontrol_t * kcontrol,
1643 snd_ctl_elem_value_t * ucontrol)
1645 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1647 spin_lock_irq(&hdspm->lock);
1648 ucontrol->value.integer.value[0] = hdspm_line_out(hdspm);
1649 spin_unlock_irq(&hdspm->lock);
1653 static int snd_hdspm_put_line_out(snd_kcontrol_t * kcontrol,
1654 snd_ctl_elem_value_t * ucontrol)
1656 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1660 if (!snd_hdspm_use_is_exclusive(hdspm))
1662 val = ucontrol->value.integer.value[0] & 1;
1663 spin_lock_irq(&hdspm->lock);
1664 change = (int) val != hdspm_line_out(hdspm);
1665 hdspm_set_line_output(hdspm, val);
1666 spin_unlock_irq(&hdspm->lock);
1670 #define HDSPM_TX_64(xname, xindex) \
1671 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1674 .info = snd_hdspm_info_tx_64, \
1675 .get = snd_hdspm_get_tx_64, \
1676 .put = snd_hdspm_put_tx_64 \
1679 static int hdspm_tx_64(hdspm_t * hdspm)
1681 return (hdspm->control_register & HDSPM_TX_64ch) ? 1 : 0;
1684 static int hdspm_set_tx_64(hdspm_t * hdspm, int out)
1687 hdspm->control_register |= HDSPM_TX_64ch;
1689 hdspm->control_register &= ~HDSPM_TX_64ch;
1690 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1695 static int snd_hdspm_info_tx_64(snd_kcontrol_t * kcontrol,
1696 snd_ctl_elem_info_t * uinfo)
1698 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1700 uinfo->value.integer.min = 0;
1701 uinfo->value.integer.max = 1;
1705 static int snd_hdspm_get_tx_64(snd_kcontrol_t * kcontrol,
1706 snd_ctl_elem_value_t * ucontrol)
1708 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1710 spin_lock_irq(&hdspm->lock);
1711 ucontrol->value.integer.value[0] = hdspm_tx_64(hdspm);
1712 spin_unlock_irq(&hdspm->lock);
1716 static int snd_hdspm_put_tx_64(snd_kcontrol_t * kcontrol,
1717 snd_ctl_elem_value_t * ucontrol)
1719 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1723 if (!snd_hdspm_use_is_exclusive(hdspm))
1725 val = ucontrol->value.integer.value[0] & 1;
1726 spin_lock_irq(&hdspm->lock);
1727 change = (int) val != hdspm_tx_64(hdspm);
1728 hdspm_set_tx_64(hdspm, val);
1729 spin_unlock_irq(&hdspm->lock);
1733 #define HDSPM_C_TMS(xname, xindex) \
1734 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1737 .info = snd_hdspm_info_c_tms, \
1738 .get = snd_hdspm_get_c_tms, \
1739 .put = snd_hdspm_put_c_tms \
1742 static int hdspm_c_tms(hdspm_t * hdspm)
1744 return (hdspm->control_register & HDSPM_clr_tms) ? 1 : 0;
1747 static int hdspm_set_c_tms(hdspm_t * hdspm, int out)
1750 hdspm->control_register |= HDSPM_clr_tms;
1752 hdspm->control_register &= ~HDSPM_clr_tms;
1753 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1758 static int snd_hdspm_info_c_tms(snd_kcontrol_t * kcontrol,
1759 snd_ctl_elem_info_t * uinfo)
1761 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1763 uinfo->value.integer.min = 0;
1764 uinfo->value.integer.max = 1;
1768 static int snd_hdspm_get_c_tms(snd_kcontrol_t * kcontrol,
1769 snd_ctl_elem_value_t * ucontrol)
1771 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1773 spin_lock_irq(&hdspm->lock);
1774 ucontrol->value.integer.value[0] = hdspm_c_tms(hdspm);
1775 spin_unlock_irq(&hdspm->lock);
1779 static int snd_hdspm_put_c_tms(snd_kcontrol_t * kcontrol,
1780 snd_ctl_elem_value_t * ucontrol)
1782 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1786 if (!snd_hdspm_use_is_exclusive(hdspm))
1788 val = ucontrol->value.integer.value[0] & 1;
1789 spin_lock_irq(&hdspm->lock);
1790 change = (int) val != hdspm_c_tms(hdspm);
1791 hdspm_set_c_tms(hdspm, val);
1792 spin_unlock_irq(&hdspm->lock);
1796 #define HDSPM_SAFE_MODE(xname, xindex) \
1797 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1800 .info = snd_hdspm_info_safe_mode, \
1801 .get = snd_hdspm_get_safe_mode, \
1802 .put = snd_hdspm_put_safe_mode \
1805 static int hdspm_safe_mode(hdspm_t * hdspm)
1807 return (hdspm->control_register & HDSPM_AutoInp) ? 1 : 0;
1810 static int hdspm_set_safe_mode(hdspm_t * hdspm, int out)
1813 hdspm->control_register |= HDSPM_AutoInp;
1815 hdspm->control_register &= ~HDSPM_AutoInp;
1816 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1821 static int snd_hdspm_info_safe_mode(snd_kcontrol_t * kcontrol,
1822 snd_ctl_elem_info_t * uinfo)
1824 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1826 uinfo->value.integer.min = 0;
1827 uinfo->value.integer.max = 1;
1831 static int snd_hdspm_get_safe_mode(snd_kcontrol_t * kcontrol,
1832 snd_ctl_elem_value_t * ucontrol)
1834 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1836 spin_lock_irq(&hdspm->lock);
1837 ucontrol->value.integer.value[0] = hdspm_safe_mode(hdspm);
1838 spin_unlock_irq(&hdspm->lock);
1842 static int snd_hdspm_put_safe_mode(snd_kcontrol_t * kcontrol,
1843 snd_ctl_elem_value_t * ucontrol)
1845 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1849 if (!snd_hdspm_use_is_exclusive(hdspm))
1851 val = ucontrol->value.integer.value[0] & 1;
1852 spin_lock_irq(&hdspm->lock);
1853 change = (int) val != hdspm_safe_mode(hdspm);
1854 hdspm_set_safe_mode(hdspm, val);
1855 spin_unlock_irq(&hdspm->lock);
1859 #define HDSPM_INPUT_SELECT(xname, xindex) \
1860 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1863 .info = snd_hdspm_info_input_select, \
1864 .get = snd_hdspm_get_input_select, \
1865 .put = snd_hdspm_put_input_select \
1868 static int hdspm_input_select(hdspm_t * hdspm)
1870 return (hdspm->control_register & HDSPM_InputSelect0) ? 1 : 0;
1873 static int hdspm_set_input_select(hdspm_t * hdspm, int out)
1876 hdspm->control_register |= HDSPM_InputSelect0;
1878 hdspm->control_register &= ~HDSPM_InputSelect0;
1879 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1884 static int snd_hdspm_info_input_select(snd_kcontrol_t * kcontrol,
1885 snd_ctl_elem_info_t * uinfo)
1887 static char *texts[] = { "optical", "coaxial" };
1889 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1891 uinfo->value.enumerated.items = 2;
1893 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1894 uinfo->value.enumerated.item =
1895 uinfo->value.enumerated.items - 1;
1896 strcpy(uinfo->value.enumerated.name,
1897 texts[uinfo->value.enumerated.item]);
1902 static int snd_hdspm_get_input_select(snd_kcontrol_t * kcontrol,
1903 snd_ctl_elem_value_t * ucontrol)
1905 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1907 spin_lock_irq(&hdspm->lock);
1908 ucontrol->value.enumerated.item[0] = hdspm_input_select(hdspm);
1909 spin_unlock_irq(&hdspm->lock);
1913 static int snd_hdspm_put_input_select(snd_kcontrol_t * kcontrol,
1914 snd_ctl_elem_value_t * ucontrol)
1916 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1920 if (!snd_hdspm_use_is_exclusive(hdspm))
1922 val = ucontrol->value.integer.value[0] & 1;
1923 spin_lock_irq(&hdspm->lock);
1924 change = (int) val != hdspm_input_select(hdspm);
1925 hdspm_set_input_select(hdspm, val);
1926 spin_unlock_irq(&hdspm->lock);
1931 deprecated since to much faders ???
1932 MIXER interface says output (source, destination, value)
1933 where source > MAX_channels are playback channels
1935 - playback mixer matrix: [channelout+64] [output] [value]
1936 - input(thru) mixer matrix: [channelin] [output] [value]
1937 (better do 2 kontrols for seperation ?)
1940 #define HDSPM_MIXER(xname, xindex) \
1941 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1944 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
1945 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1946 .info = snd_hdspm_info_mixer, \
1947 .get = snd_hdspm_get_mixer, \
1948 .put = snd_hdspm_put_mixer \
1951 static int snd_hdspm_info_mixer(snd_kcontrol_t * kcontrol,
1952 snd_ctl_elem_info_t * uinfo)
1954 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1956 uinfo->value.integer.min = 0;
1957 uinfo->value.integer.max = 65535;
1958 uinfo->value.integer.step = 1;
1962 static int snd_hdspm_get_mixer(snd_kcontrol_t * kcontrol,
1963 snd_ctl_elem_value_t * ucontrol)
1965 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1969 source = ucontrol->value.integer.value[0];
1972 else if (source >= 2 * HDSPM_MAX_CHANNELS)
1973 source = 2 * HDSPM_MAX_CHANNELS - 1;
1975 destination = ucontrol->value.integer.value[1];
1976 if (destination < 0)
1978 else if (destination >= HDSPM_MAX_CHANNELS)
1979 destination = HDSPM_MAX_CHANNELS - 1;
1981 spin_lock_irq(&hdspm->lock);
1982 if (source >= HDSPM_MAX_CHANNELS)
1983 ucontrol->value.integer.value[2] =
1984 hdspm_read_pb_gain(hdspm, destination,
1985 source - HDSPM_MAX_CHANNELS);
1987 ucontrol->value.integer.value[2] =
1988 hdspm_read_in_gain(hdspm, destination, source);
1990 spin_unlock_irq(&hdspm->lock);
1995 static int snd_hdspm_put_mixer(snd_kcontrol_t * kcontrol,
1996 snd_ctl_elem_value_t * ucontrol)
1998 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
2004 if (!snd_hdspm_use_is_exclusive(hdspm))
2007 source = ucontrol->value.integer.value[0];
2008 destination = ucontrol->value.integer.value[1];
2010 if (source < 0 || source >= 2 * HDSPM_MAX_CHANNELS)
2012 if (destination < 0 || destination >= HDSPM_MAX_CHANNELS)
2015 gain = ucontrol->value.integer.value[2];
2017 spin_lock_irq(&hdspm->lock);
2019 if (source >= HDSPM_MAX_CHANNELS)
2020 change = gain != hdspm_read_pb_gain(hdspm, destination,
2022 HDSPM_MAX_CHANNELS);
2025 gain != hdspm_read_in_gain(hdspm, destination, source);
2028 if (source >= HDSPM_MAX_CHANNELS)
2029 hdspm_write_pb_gain(hdspm, destination,
2030 source - HDSPM_MAX_CHANNELS,
2033 hdspm_write_in_gain(hdspm, destination, source,
2036 spin_unlock_irq(&hdspm->lock);
2041 /* The simple mixer control(s) provide gain control for the
2042 basic 1:1 mappings of playback streams to output
2046 #define HDSPM_PLAYBACK_MIXER \
2047 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2048 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE | \
2049 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2050 .info = snd_hdspm_info_playback_mixer, \
2051 .get = snd_hdspm_get_playback_mixer, \
2052 .put = snd_hdspm_put_playback_mixer \
2055 static int snd_hdspm_info_playback_mixer(snd_kcontrol_t * kcontrol,
2056 snd_ctl_elem_info_t * uinfo)
2058 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2060 uinfo->value.integer.min = 0;
2061 uinfo->value.integer.max = 65536;
2062 uinfo->value.integer.step = 1;
2066 static int snd_hdspm_get_playback_mixer(snd_kcontrol_t * kcontrol,
2067 snd_ctl_elem_value_t * ucontrol)
2069 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
2073 channel = ucontrol->id.index - 1;
2075 snd_assert(channel >= 0
2076 || channel < HDSPM_MAX_CHANNELS, return -EINVAL);
2078 if ((mapped_channel = hdspm->channel_map[channel]) < 0)
2081 spin_lock_irq(&hdspm->lock);
2082 ucontrol->value.integer.value[0] =
2083 hdspm_read_pb_gain(hdspm, mapped_channel, mapped_channel);
2084 spin_unlock_irq(&hdspm->lock);
2086 /* snd_printdd("get pb mixer index %d, channel %d, mapped_channel %d, value %d\n",
2087 ucontrol->id.index, channel, mapped_channel, ucontrol->value.integer.value[0]);
2093 static int snd_hdspm_put_playback_mixer(snd_kcontrol_t * kcontrol,
2094 snd_ctl_elem_value_t * ucontrol)
2096 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
2102 if (!snd_hdspm_use_is_exclusive(hdspm))
2105 channel = ucontrol->id.index - 1;
2107 snd_assert(channel >= 0
2108 || channel < HDSPM_MAX_CHANNELS, return -EINVAL);
2110 if ((mapped_channel = hdspm->channel_map[channel]) < 0)
2113 gain = ucontrol->value.integer.value[0];
2115 spin_lock_irq(&hdspm->lock);
2117 gain != hdspm_read_pb_gain(hdspm, mapped_channel,
2120 hdspm_write_pb_gain(hdspm, mapped_channel, mapped_channel,
2122 spin_unlock_irq(&hdspm->lock);
2126 #define HDSPM_WC_SYNC_CHECK(xname, xindex) \
2127 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2130 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2131 .info = snd_hdspm_info_sync_check, \
2132 .get = snd_hdspm_get_wc_sync_check \
2135 static int snd_hdspm_info_sync_check(snd_kcontrol_t * kcontrol,
2136 snd_ctl_elem_info_t * uinfo)
2138 static char *texts[] = { "No Lock", "Lock", "Sync" };
2139 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2141 uinfo->value.enumerated.items = 3;
2142 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2143 uinfo->value.enumerated.item =
2144 uinfo->value.enumerated.items - 1;
2145 strcpy(uinfo->value.enumerated.name,
2146 texts[uinfo->value.enumerated.item]);
2150 static int hdspm_wc_sync_check(hdspm_t * hdspm)
2152 int status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
2153 if (status2 & HDSPM_wcLock) {
2154 if (status2 & HDSPM_wcSync)
2162 static int snd_hdspm_get_wc_sync_check(snd_kcontrol_t * kcontrol,
2163 snd_ctl_elem_value_t * ucontrol)
2165 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
2167 ucontrol->value.enumerated.item[0] = hdspm_wc_sync_check(hdspm);
2172 #define HDSPM_MADI_SYNC_CHECK(xname, xindex) \
2173 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2176 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2177 .info = snd_hdspm_info_sync_check, \
2178 .get = snd_hdspm_get_madisync_sync_check \
2181 static int hdspm_madisync_sync_check(hdspm_t * hdspm)
2183 int status = hdspm_read(hdspm, HDSPM_statusRegister);
2184 if (status & HDSPM_madiLock) {
2185 if (status & HDSPM_madiSync)
2193 static int snd_hdspm_get_madisync_sync_check(snd_kcontrol_t * kcontrol,
2194 snd_ctl_elem_value_t *
2197 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
2199 ucontrol->value.enumerated.item[0] =
2200 hdspm_madisync_sync_check(hdspm);
2207 static snd_kcontrol_new_t snd_hdspm_controls[] = {
2209 HDSPM_MIXER("Mixer", 0),
2210 /* 'Sample Clock Source' complies with the alsa control naming scheme */
2211 HDSPM_CLOCK_SOURCE("Sample Clock Source", 0),
2213 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
2214 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0),
2215 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0),
2216 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
2217 /* 'External Rate' complies with the alsa control naming scheme */
2218 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
2219 HDSPM_WC_SYNC_CHECK("Word Clock Lock Status", 0),
2220 HDSPM_MADI_SYNC_CHECK("MADI Sync Lock Status", 0),
2221 HDSPM_LINE_OUT("Line Out", 0),
2222 HDSPM_TX_64("TX 64 channels mode", 0),
2223 HDSPM_C_TMS("Clear Track Marker", 0),
2224 HDSPM_SAFE_MODE("Safe Mode", 0),
2225 HDSPM_INPUT_SELECT("Input Select", 0),
2228 static snd_kcontrol_new_t snd_hdspm_playback_mixer = HDSPM_PLAYBACK_MIXER;
2231 static int hdspm_update_simple_mixer_controls(hdspm_t * hdspm)
2235 for (i = hdspm->ds_channels; i < hdspm->ss_channels; ++i) {
2236 if (hdspm->system_sample_rate > 48000) {
2237 hdspm->playback_mixer_ctls[i]->vd[0].access =
2238 SNDRV_CTL_ELEM_ACCESS_INACTIVE |
2239 SNDRV_CTL_ELEM_ACCESS_READ |
2240 SNDRV_CTL_ELEM_ACCESS_VOLATILE;
2242 hdspm->playback_mixer_ctls[i]->vd[0].access =
2243 SNDRV_CTL_ELEM_ACCESS_READWRITE |
2244 SNDRV_CTL_ELEM_ACCESS_VOLATILE;
2246 snd_ctl_notify(hdspm->card, SNDRV_CTL_EVENT_MASK_VALUE |
2247 SNDRV_CTL_EVENT_MASK_INFO,
2248 &hdspm->playback_mixer_ctls[i]->id);
2255 static int snd_hdspm_create_controls(snd_card_t * card, hdspm_t * hdspm)
2257 unsigned int idx, limit;
2259 snd_kcontrol_t *kctl;
2261 /* add control list first */
2263 for (idx = 0; idx < ARRAY_SIZE(snd_hdspm_controls); idx++) {
2265 snd_ctl_add(card, kctl =
2266 snd_ctl_new1(&snd_hdspm_controls[idx],
2272 /* Channel playback mixer as default control
2273 Note: the whole matrix would be 128*HDSPM_MIXER_CHANNELS Faders, thats to big for any alsamixer
2274 they are accesible via special IOCTL on hwdep
2275 and the mixer 2dimensional mixer control */
2277 snd_hdspm_playback_mixer.name = "Chn";
2278 limit = HDSPM_MAX_CHANNELS;
2280 /* The index values are one greater than the channel ID so that alsamixer
2281 will display them correctly. We want to use the index for fast lookup
2282 of the relevant channel, but if we use it at all, most ALSA software
2283 does the wrong thing with it ...
2286 for (idx = 0; idx < limit; ++idx) {
2287 snd_hdspm_playback_mixer.index = idx + 1;
2288 if ((err = snd_ctl_add(card,
2291 (&snd_hdspm_playback_mixer,
2295 hdspm->playback_mixer_ctls[idx] = kctl;
2301 /*------------------------------------------------------------
2303 ------------------------------------------------------------*/
2306 snd_hdspm_proc_read(snd_info_entry_t * entry, snd_info_buffer_t * buffer)
2308 hdspm_t *hdspm = (hdspm_t *) entry->private_data;
2309 unsigned int status;
2310 unsigned int status2;
2311 char *pref_sync_ref;
2313 char *system_clock_mode;
2319 status = hdspm_read(hdspm, HDSPM_statusRegister);
2320 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
2322 snd_iprintf(buffer, "%s (Card #%d) Rev.%x Status2first3bits: %x\n",
2323 hdspm->card_name, hdspm->card->number + 1,
2324 hdspm->firmware_rev,
2325 (status2 & HDSPM_version0) |
2326 (status2 & HDSPM_version1) | (status2 &
2329 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
2330 hdspm->irq, hdspm->port, (unsigned long)hdspm->iobase);
2332 snd_iprintf(buffer, "--- System ---\n");
2335 "IRQ Pending: Audio=%d, MIDI0=%d, MIDI1=%d, IRQcount=%d\n",
2336 status & HDSPM_audioIRQPending,
2337 (status & HDSPM_midi0IRQPending) ? 1 : 0,
2338 (status & HDSPM_midi1IRQPending) ? 1 : 0,
2341 "HW pointer: id = %d, rawptr = %d (%d->%d) estimated= %ld (bytes)\n",
2342 ((status & HDSPM_BufferID) ? 1 : 0),
2343 (status & HDSPM_BufferPositionMask),
2344 (status & HDSPM_BufferPositionMask) % (2 *
2347 ((status & HDSPM_BufferPositionMask) -
2348 64) % (2 * (int)hdspm->period_bytes),
2349 (long) hdspm_hw_pointer(hdspm) * 4);
2352 "MIDI FIFO: Out1=0x%x, Out2=0x%x, In1=0x%x, In2=0x%x \n",
2353 hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xFF,
2354 hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xFF,
2355 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF,
2356 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF);
2358 "Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, status2=0x%x\n",
2359 hdspm->control_register, hdspm->control2_register,
2362 snd_iprintf(buffer, "--- Settings ---\n");
2365 hdspm_decode_latency(hdspm->
2367 HDSPM_LatencyMask));
2370 "Size (Latency): %d samples (2 periods of %lu bytes)\n",
2371 x, (unsigned long) hdspm->period_bytes);
2373 snd_iprintf(buffer, "Line out: %s, Precise Pointer: %s\n",
2375 control_register & HDSPM_LineOut) ? "on " : "off",
2376 (hdspm->precise_ptr) ? "on" : "off");
2378 switch (hdspm->control_register & HDSPM_InputMask) {
2379 case HDSPM_InputOptical:
2382 case HDSPM_InputCoaxial:
2389 switch (hdspm->control_register & HDSPM_SyncRefMask) {
2390 case HDSPM_SyncRef_Word:
2391 syncref = "WordClock";
2393 case HDSPM_SyncRef_MADI:
2399 snd_iprintf(buffer, "Inputsel = %s, SyncRef = %s\n", insel,
2403 "ClearTrackMarker = %s, Transmit in %s Channel Mode, Auto Input %s\n",
2405 control_register & HDSPM_clr_tms) ? "on" : "off",
2407 control_register & HDSPM_TX_64ch) ? "64" : "56",
2409 control_register & HDSPM_AutoInp) ? "on" : "off");
2411 switch (hdspm_clock_source(hdspm)) {
2412 case HDSPM_CLOCK_SOURCE_AUTOSYNC:
2413 clock_source = "AutoSync";
2415 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ:
2416 clock_source = "Internal 32 kHz";
2418 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2419 clock_source = "Internal 44.1 kHz";
2421 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ:
2422 clock_source = "Internal 48 kHz";
2424 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ:
2425 clock_source = "Internal 64 kHz";
2427 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2428 clock_source = "Internal 88.2 kHz";
2430 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ:
2431 clock_source = "Internal 96 kHz";
2434 clock_source = "Error";
2436 snd_iprintf(buffer, "Sample Clock Source: %s\n", clock_source);
2437 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) {
2438 system_clock_mode = "Slave";
2440 system_clock_mode = "Master";
2442 snd_iprintf(buffer, "System Clock Mode: %s\n", system_clock_mode);
2444 switch (hdspm_pref_sync_ref(hdspm)) {
2445 case HDSPM_SYNC_FROM_WORD:
2446 pref_sync_ref = "Word Clock";
2448 case HDSPM_SYNC_FROM_MADI:
2449 pref_sync_ref = "MADI Sync";
2452 pref_sync_ref = "XXXX Clock";
2455 snd_iprintf(buffer, "Preferred Sync Reference: %s\n",
2458 snd_iprintf(buffer, "System Clock Frequency: %d\n",
2459 hdspm->system_sample_rate);
2462 snd_iprintf(buffer, "--- Status:\n");
2464 x = status & HDSPM_madiSync;
2465 x2 = status2 & HDSPM_wcSync;
2467 snd_iprintf(buffer, "Inputs MADI=%s, WordClock=%s\n",
2468 (status & HDSPM_madiLock) ? (x ? "Sync" : "Lock") :
2470 (status2 & HDSPM_wcLock) ? (x2 ? "Sync" : "Lock") :
2473 switch (hdspm_autosync_ref(hdspm)) {
2474 case HDSPM_AUTOSYNC_FROM_WORD:
2475 autosync_ref = "Word Clock";
2477 case HDSPM_AUTOSYNC_FROM_MADI:
2478 autosync_ref = "MADI Sync";
2480 case HDSPM_AUTOSYNC_FROM_NONE:
2481 autosync_ref = "Input not valid";
2484 autosync_ref = "---";
2488 "AutoSync: Reference= %s, Freq=%d (MADI = %d, Word = %d)\n",
2489 autosync_ref, hdspm_external_sample_rate(hdspm),
2490 (status & HDSPM_madiFreqMask) >> 22,
2491 (status2 & HDSPM_wcFreqMask) >> 5);
2493 snd_iprintf(buffer, "Input: %s, Mode=%s\n",
2494 (status & HDSPM_AB_int) ? "Coax" : "Optical",
2495 (status & HDSPM_RX_64ch) ? "64 channels" :
2498 snd_iprintf(buffer, "\n");
2501 static void __devinit snd_hdspm_proc_init(hdspm_t * hdspm)
2503 snd_info_entry_t *entry;
2505 if (!snd_card_proc_new(hdspm->card, "hdspm", &entry))
2506 snd_info_set_text_ops(entry, hdspm, 1024,
2507 snd_hdspm_proc_read);
2510 /*------------------------------------------------------------
2512 ------------------------------------------------------------*/
2514 static int snd_hdspm_set_defaults(hdspm_t * hdspm)
2518 /* ASSUMPTION: hdspm->lock is either held, or there is no need to
2519 hold it (e.g. during module initalization).
2524 hdspm->control_register = HDSPM_ClockModeMaster | /* Master Cloack Mode on */
2525 hdspm_encode_latency(7) | /* latency maximum = 8192 samples */
2526 HDSPM_InputCoaxial | /* Input Coax not Optical */
2527 HDSPM_SyncRef_MADI | /* Madi is syncclock */
2528 HDSPM_LineOut | /* Analog output in */
2529 HDSPM_TX_64ch | /* transmit in 64ch mode */
2530 HDSPM_AutoInp; /* AutoInput chossing (takeover) */
2532 /* ! HDSPM_Frequency0|HDSPM_Frequency1 = 44.1khz */
2533 /* ! HDSPM_DoubleSpeed HDSPM_QuadSpeed = normal speed */
2534 /* ! HDSPM_clr_tms = do not clear bits in track marks */
2536 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
2538 #ifdef SNDRV_BIG_ENDIAN
2539 hdspm->control2_register = HDSPM_BIGENDIAN_MODE;
2541 hdspm->control2_register = 0;
2544 hdspm_write(hdspm, HDSPM_control2Reg, hdspm->control2_register);
2545 hdspm_compute_period_size(hdspm);
2547 /* silence everything */
2549 all_in_all_mixer(hdspm, 0 * UNITY_GAIN);
2551 if (line_outs_monitor[hdspm->dev]) {
2553 snd_printk(KERN_INFO "HDSPM: sending all playback streams to line outs.\n");
2555 for (i = 0; i < HDSPM_MIXER_CHANNELS; i++) {
2556 if (hdspm_write_pb_gain(hdspm, i, i, UNITY_GAIN))
2561 /* set a default rate so that the channel map is set up. */
2562 hdspm->channel_map = channel_map_madi_ss;
2563 hdspm_set_rate(hdspm, 44100, 1);
2569 /*------------------------------------------------------------
2571 ------------------------------------------------------------*/
2573 static irqreturn_t snd_hdspm_interrupt(int irq, void *dev_id,
2574 struct pt_regs *regs)
2576 hdspm_t *hdspm = (hdspm_t *) dev_id;
2577 unsigned int status;
2581 unsigned int midi0status;
2582 unsigned int midi1status;
2585 status = hdspm_read(hdspm, HDSPM_statusRegister);
2587 audio = status & HDSPM_audioIRQPending;
2588 midi0 = status & HDSPM_midi0IRQPending;
2589 midi1 = status & HDSPM_midi1IRQPending;
2591 if (!audio && !midi0 && !midi1)
2594 hdspm_write(hdspm, HDSPM_interruptConfirmation, 0);
2597 midi0status = hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xff;
2598 midi1status = hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xff;
2602 if (hdspm->capture_substream)
2603 snd_pcm_period_elapsed(hdspm->pcm->
2605 [SNDRV_PCM_STREAM_CAPTURE].
2608 if (hdspm->playback_substream)
2609 snd_pcm_period_elapsed(hdspm->pcm->
2611 [SNDRV_PCM_STREAM_PLAYBACK].
2615 if (midi0 && midi0status) {
2616 /* we disable interrupts for this input until processing is done */
2617 hdspm->control_register &= ~HDSPM_Midi0InterruptEnable;
2618 hdspm_write(hdspm, HDSPM_controlRegister,
2619 hdspm->control_register);
2620 hdspm->midi[0].pending = 1;
2623 if (midi1 && midi1status) {
2624 /* we disable interrupts for this input until processing is done */
2625 hdspm->control_register &= ~HDSPM_Midi1InterruptEnable;
2626 hdspm_write(hdspm, HDSPM_controlRegister,
2627 hdspm->control_register);
2628 hdspm->midi[1].pending = 1;
2632 tasklet_hi_schedule(&hdspm->midi_tasklet);
2636 /*------------------------------------------------------------
2638 ------------------------------------------------------------*/
2641 static snd_pcm_uframes_t snd_hdspm_hw_pointer(snd_pcm_substream_t *
2644 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2645 return hdspm_hw_pointer(hdspm);
2648 static char *hdspm_channel_buffer_location(hdspm_t * hdspm,
2649 int stream, int channel)
2653 snd_assert(channel >= 0
2654 || channel < HDSPM_MAX_CHANNELS, return NULL);
2656 if ((mapped_channel = hdspm->channel_map[channel]) < 0)
2659 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
2660 return hdspm->capture_buffer +
2661 mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES;
2663 return hdspm->playback_buffer +
2664 mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES;
2669 /* dont know why need it ??? */
2670 static int snd_hdspm_playback_copy(snd_pcm_substream_t * substream,
2671 int channel, snd_pcm_uframes_t pos,
2672 void __user *src, snd_pcm_uframes_t count)
2674 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2677 snd_assert(pos + count <= HDSPM_CHANNEL_BUFFER_BYTES / 4,
2680 channel_buf = hdspm_channel_buffer_location(hdspm,
2684 snd_assert(channel_buf != NULL, return -EIO);
2686 return copy_from_user(channel_buf + pos * 4, src, count * 4);
2689 static int snd_hdspm_capture_copy(snd_pcm_substream_t * substream,
2690 int channel, snd_pcm_uframes_t pos,
2691 void __user *dst, snd_pcm_uframes_t count)
2693 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2696 snd_assert(pos + count <= HDSPM_CHANNEL_BUFFER_BYTES / 4,
2699 channel_buf = hdspm_channel_buffer_location(hdspm,
2702 snd_assert(channel_buf != NULL, return -EIO);
2703 return copy_to_user(dst, channel_buf + pos * 4, count * 4);
2706 static int snd_hdspm_hw_silence(snd_pcm_substream_t * substream,
2707 int channel, snd_pcm_uframes_t pos,
2708 snd_pcm_uframes_t count)
2710 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2714 hdspm_channel_buffer_location(hdspm, substream->pstr->stream,
2716 snd_assert(channel_buf != NULL, return -EIO);
2717 memset(channel_buf + pos * 4, 0, count * 4);
2721 static int snd_hdspm_reset(snd_pcm_substream_t * substream)
2723 snd_pcm_runtime_t *runtime = substream->runtime;
2724 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2725 snd_pcm_substream_t *other;
2727 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2728 other = hdspm->capture_substream;
2730 other = hdspm->playback_substream;
2733 runtime->status->hw_ptr = hdspm_hw_pointer(hdspm);
2735 runtime->status->hw_ptr = 0;
2737 struct list_head *pos;
2738 snd_pcm_substream_t *s;
2739 snd_pcm_runtime_t *oruntime = other->runtime;
2740 snd_pcm_group_for_each(pos, substream) {
2741 s = snd_pcm_group_substream_entry(pos);
2743 oruntime->status->hw_ptr =
2744 runtime->status->hw_ptr;
2752 static int snd_hdspm_hw_params(snd_pcm_substream_t * substream,
2753 snd_pcm_hw_params_t * params)
2755 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2760 struct snd_sg_buf *sgbuf;
2763 spin_lock_irq(&hdspm->lock);
2765 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2766 this_pid = hdspm->playback_pid;
2767 other_pid = hdspm->capture_pid;
2769 this_pid = hdspm->capture_pid;
2770 other_pid = hdspm->playback_pid;
2773 if ((other_pid > 0) && (this_pid != other_pid)) {
2775 /* The other stream is open, and not by the same
2776 task as this one. Make sure that the parameters
2777 that matter are the same.
2780 if (params_rate(params) != hdspm->system_sample_rate) {
2781 spin_unlock_irq(&hdspm->lock);
2782 _snd_pcm_hw_param_setempty(params,
2783 SNDRV_PCM_HW_PARAM_RATE);
2787 if (params_period_size(params) != hdspm->period_bytes / 4) {
2788 spin_unlock_irq(&hdspm->lock);
2789 _snd_pcm_hw_param_setempty(params,
2790 SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2796 spin_unlock_irq(&hdspm->lock);
2798 /* how to make sure that the rate matches an externally-set one ? */
2800 spin_lock_irq(&hdspm->lock);
2801 if ((err = hdspm_set_rate(hdspm, params_rate(params), 0)) < 0) {
2802 spin_unlock_irq(&hdspm->lock);
2803 _snd_pcm_hw_param_setempty(params,
2804 SNDRV_PCM_HW_PARAM_RATE);
2807 spin_unlock_irq(&hdspm->lock);
2810 hdspm_set_interrupt_interval(hdspm,
2811 params_period_size(params))) <
2813 _snd_pcm_hw_param_setempty(params,
2814 SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2818 /* Memory allocation, takashi's method, dont know if we should spinlock */
2819 /* malloc all buffer even if not enabled to get sure */
2820 /* malloc only needed bytes */
2822 snd_pcm_lib_malloc_pages(substream,
2823 HDSPM_CHANNEL_BUFFER_BYTES *
2824 params_channels(params));
2828 sgbuf = snd_pcm_substream_sgbuf(substream);
2830 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2832 hdspm_set_sgbuf(hdspm, sgbuf, HDSPM_pageAddressBufferOut,
2833 params_channels(params));
2835 for (i = 0; i < params_channels(params); ++i)
2836 snd_hdspm_enable_out(hdspm, i, 1);
2838 hdspm->playback_buffer =
2839 (unsigned char *) substream->runtime->dma_area;
2841 hdspm_set_sgbuf(hdspm, sgbuf, HDSPM_pageAddressBufferIn,
2842 params_channels(params));
2844 for (i = 0; i < params_channels(params); ++i)
2845 snd_hdspm_enable_in(hdspm, i, 1);
2847 hdspm->capture_buffer =
2848 (unsigned char *) substream->runtime->dma_area;
2853 static int snd_hdspm_hw_free(snd_pcm_substream_t * substream)
2856 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2858 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2860 /* params_channels(params) should be enough,
2861 but to get sure in case of error */
2862 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i)
2863 snd_hdspm_enable_out(hdspm, i, 0);
2865 hdspm->playback_buffer = NULL;
2867 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i)
2868 snd_hdspm_enable_in(hdspm, i, 0);
2870 hdspm->capture_buffer = NULL;
2874 snd_pcm_lib_free_pages(substream);
2879 static int snd_hdspm_channel_info(snd_pcm_substream_t * substream,
2880 snd_pcm_channel_info_t * info)
2882 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2885 snd_assert(info->channel < HDSPM_MAX_CHANNELS, return -EINVAL);
2887 if ((mapped_channel = hdspm->channel_map[info->channel]) < 0)
2890 info->offset = mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES;
2896 static int snd_hdspm_ioctl(snd_pcm_substream_t * substream,
2897 unsigned int cmd, void *arg)
2900 case SNDRV_PCM_IOCTL1_RESET:
2902 return snd_hdspm_reset(substream);
2905 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2907 snd_pcm_channel_info_t *info = arg;
2908 return snd_hdspm_channel_info(substream, info);
2914 return snd_pcm_lib_ioctl(substream, cmd, arg);
2917 static int snd_hdspm_trigger(snd_pcm_substream_t * substream, int cmd)
2919 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2920 snd_pcm_substream_t *other;
2923 spin_lock(&hdspm->lock);
2924 running = hdspm->running;
2926 case SNDRV_PCM_TRIGGER_START:
2927 running |= 1 << substream->stream;
2929 case SNDRV_PCM_TRIGGER_STOP:
2930 running &= ~(1 << substream->stream);
2934 spin_unlock(&hdspm->lock);
2937 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2938 other = hdspm->capture_substream;
2940 other = hdspm->playback_substream;
2943 struct list_head *pos;
2944 snd_pcm_substream_t *s;
2945 snd_pcm_group_for_each(pos, substream) {
2946 s = snd_pcm_group_substream_entry(pos);
2948 snd_pcm_trigger_done(s, substream);
2949 if (cmd == SNDRV_PCM_TRIGGER_START)
2950 running |= 1 << s->stream;
2952 running &= ~(1 << s->stream);
2956 if (cmd == SNDRV_PCM_TRIGGER_START) {
2957 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK))
2958 && substream->stream ==
2959 SNDRV_PCM_STREAM_CAPTURE)
2960 hdspm_silence_playback(hdspm);
2963 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2964 hdspm_silence_playback(hdspm);
2967 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2968 hdspm_silence_playback(hdspm);
2971 snd_pcm_trigger_done(substream, substream);
2972 if (!hdspm->running && running)
2973 hdspm_start_audio(hdspm);
2974 else if (hdspm->running && !running)
2975 hdspm_stop_audio(hdspm);
2976 hdspm->running = running;
2977 spin_unlock(&hdspm->lock);
2982 static int snd_hdspm_prepare(snd_pcm_substream_t * substream)
2987 static unsigned int period_sizes[] =
2988 { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2990 static snd_pcm_hardware_t snd_hdspm_playback_subinfo = {
2991 .info = (SNDRV_PCM_INFO_MMAP |
2992 SNDRV_PCM_INFO_MMAP_VALID |
2993 SNDRV_PCM_INFO_NONINTERLEAVED |
2994 SNDRV_PCM_INFO_SYNC_START | SNDRV_PCM_INFO_DOUBLE),
2995 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2996 .rates = (SNDRV_PCM_RATE_32000 |
2997 SNDRV_PCM_RATE_44100 |
2998 SNDRV_PCM_RATE_48000 |
2999 SNDRV_PCM_RATE_64000 |
3000 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000),
3004 .channels_max = HDSPM_MAX_CHANNELS,
3006 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS,
3007 .period_bytes_min = (64 * 4),
3008 .period_bytes_max = (8192 * 4) * HDSPM_MAX_CHANNELS,
3014 static snd_pcm_hardware_t snd_hdspm_capture_subinfo = {
3015 .info = (SNDRV_PCM_INFO_MMAP |
3016 SNDRV_PCM_INFO_MMAP_VALID |
3017 SNDRV_PCM_INFO_NONINTERLEAVED |
3018 SNDRV_PCM_INFO_SYNC_START),
3019 .formats = SNDRV_PCM_FMTBIT_S32_LE,
3020 .rates = (SNDRV_PCM_RATE_32000 |
3021 SNDRV_PCM_RATE_44100 |
3022 SNDRV_PCM_RATE_48000 |
3023 SNDRV_PCM_RATE_64000 |
3024 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000),
3028 .channels_max = HDSPM_MAX_CHANNELS,
3030 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS,
3031 .period_bytes_min = (64 * 4),
3032 .period_bytes_max = (8192 * 4) * HDSPM_MAX_CHANNELS,
3038 static snd_pcm_hw_constraint_list_t hw_constraints_period_sizes = {
3039 .count = ARRAY_SIZE(period_sizes),
3040 .list = period_sizes,
3045 static int snd_hdspm_hw_rule_channels_rate(snd_pcm_hw_params_t * params,
3046 snd_pcm_hw_rule_t * rule)
3048 hdspm_t *hdspm = rule->private;
3050 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
3052 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
3054 if (r->min > 48000) {
3055 snd_interval_t t = {
3057 .max = hdspm->ds_channels,
3060 return snd_interval_refine(c, &t);
3061 } else if (r->max < 64000) {
3062 snd_interval_t t = {
3064 .max = hdspm->ss_channels,
3067 return snd_interval_refine(c, &t);
3072 static int snd_hdspm_hw_rule_rate_channels(snd_pcm_hw_params_t * params,
3073 snd_pcm_hw_rule_t * rule)
3075 hdspm_t *hdspm = rule->private;
3077 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
3079 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
3081 if (c->min <= hdspm->ss_channels) {
3082 snd_interval_t t = {
3087 return snd_interval_refine(r, &t);
3088 } else if (c->max > hdspm->ss_channels) {
3089 snd_interval_t t = {
3095 return snd_interval_refine(r, &t);
3100 static int snd_hdspm_playback_open(snd_pcm_substream_t * substream)
3102 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
3103 snd_pcm_runtime_t *runtime = substream->runtime;
3105 snd_printdd("Open device substream %d\n", substream->stream);
3107 spin_lock_irq(&hdspm->lock);
3109 snd_pcm_set_sync(substream);
3111 runtime->hw = snd_hdspm_playback_subinfo;
3113 if (hdspm->capture_substream == NULL)
3114 hdspm_stop_audio(hdspm);
3116 hdspm->playback_pid = current->pid;
3117 hdspm->playback_substream = substream;
3119 spin_unlock_irq(&hdspm->lock);
3121 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
3123 snd_pcm_hw_constraint_list(runtime, 0,
3124 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
3125 &hw_constraints_period_sizes);
3127 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
3128 snd_hdspm_hw_rule_channels_rate, hdspm,
3129 SNDRV_PCM_HW_PARAM_RATE, -1);
3131 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
3132 snd_hdspm_hw_rule_rate_channels, hdspm,
3133 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
3138 static int snd_hdspm_playback_release(snd_pcm_substream_t * substream)
3140 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
3142 spin_lock_irq(&hdspm->lock);
3144 hdspm->playback_pid = -1;
3145 hdspm->playback_substream = NULL;
3147 spin_unlock_irq(&hdspm->lock);
3153 static int snd_hdspm_capture_open(snd_pcm_substream_t * substream)
3155 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
3156 snd_pcm_runtime_t *runtime = substream->runtime;
3158 spin_lock_irq(&hdspm->lock);
3159 snd_pcm_set_sync(substream);
3160 runtime->hw = snd_hdspm_capture_subinfo;
3162 if (hdspm->playback_substream == NULL)
3163 hdspm_stop_audio(hdspm);
3165 hdspm->capture_pid = current->pid;
3166 hdspm->capture_substream = substream;
3168 spin_unlock_irq(&hdspm->lock);
3170 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
3171 snd_pcm_hw_constraint_list(runtime, 0,
3172 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
3173 &hw_constraints_period_sizes);
3175 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
3176 snd_hdspm_hw_rule_channels_rate, hdspm,
3177 SNDRV_PCM_HW_PARAM_RATE, -1);
3179 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
3180 snd_hdspm_hw_rule_rate_channels, hdspm,
3181 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
3185 static int snd_hdspm_capture_release(snd_pcm_substream_t * substream)
3187 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
3189 spin_lock_irq(&hdspm->lock);
3191 hdspm->capture_pid = -1;
3192 hdspm->capture_substream = NULL;
3194 spin_unlock_irq(&hdspm->lock);
3198 static int snd_hdspm_hwdep_dummy_op(snd_hwdep_t * hw, struct file *file)
3200 /* we have nothing to initialize but the call is required */
3205 static int snd_hdspm_hwdep_ioctl(snd_hwdep_t * hw, struct file *file,
3206 unsigned int cmd, unsigned long arg)
3208 hdspm_t *hdspm = (hdspm_t *) hw->private_data;
3209 struct sndrv_hdspm_mixer_ioctl mixer;
3210 hdspm_config_info_t info;
3211 hdspm_version_t hdspm_version;
3212 struct sndrv_hdspm_peak_rms_ioctl rms;
3217 case SNDRV_HDSPM_IOCTL_GET_PEAK_RMS:
3218 if (copy_from_user(&rms, (void __user *)arg, sizeof(rms)))
3220 /* maybe there is a chance to memorymap in future so dont touch just copy */
3221 if(copy_to_user_fromio((void __user *)rms.peak,
3222 hdspm->iobase+HDSPM_MADI_peakrmsbase,
3223 sizeof(hdspm_peak_rms_t)) != 0 )
3229 case SNDRV_HDSPM_IOCTL_GET_CONFIG_INFO:
3231 spin_lock_irq(&hdspm->lock);
3232 info.pref_sync_ref =
3233 (unsigned char) hdspm_pref_sync_ref(hdspm);
3234 info.wordclock_sync_check =
3235 (unsigned char) hdspm_wc_sync_check(hdspm);
3237 info.system_sample_rate = hdspm->system_sample_rate;
3238 info.autosync_sample_rate =
3239 hdspm_external_sample_rate(hdspm);
3240 info.system_clock_mode =
3241 (unsigned char) hdspm_system_clock_mode(hdspm);
3243 (unsigned char) hdspm_clock_source(hdspm);
3245 (unsigned char) hdspm_autosync_ref(hdspm);
3246 info.line_out = (unsigned char) hdspm_line_out(hdspm);
3248 spin_unlock_irq(&hdspm->lock);
3249 if (copy_to_user((void __user *) arg, &info, sizeof(info)))
3253 case SNDRV_HDSPM_IOCTL_GET_VERSION:
3254 hdspm_version.firmware_rev = hdspm->firmware_rev;
3255 if (copy_to_user((void __user *) arg, &hdspm_version,
3256 sizeof(hdspm_version)))
3260 case SNDRV_HDSPM_IOCTL_GET_MIXER:
3261 if (copy_from_user(&mixer, (void __user *)arg, sizeof(mixer)))
3264 ((void __user *)mixer.mixer, hdspm->mixer, sizeof(hdspm_mixer_t)))
3274 static snd_pcm_ops_t snd_hdspm_playback_ops = {
3275 .open = snd_hdspm_playback_open,
3276 .close = snd_hdspm_playback_release,
3277 .ioctl = snd_hdspm_ioctl,
3278 .hw_params = snd_hdspm_hw_params,
3279 .hw_free = snd_hdspm_hw_free,
3280 .prepare = snd_hdspm_prepare,
3281 .trigger = snd_hdspm_trigger,
3282 .pointer = snd_hdspm_hw_pointer,
3283 .copy = snd_hdspm_playback_copy,
3284 .silence = snd_hdspm_hw_silence,
3285 .page = snd_pcm_sgbuf_ops_page,
3288 static snd_pcm_ops_t snd_hdspm_capture_ops = {
3289 .open = snd_hdspm_capture_open,
3290 .close = snd_hdspm_capture_release,
3291 .ioctl = snd_hdspm_ioctl,
3292 .hw_params = snd_hdspm_hw_params,
3293 .hw_free = snd_hdspm_hw_free,
3294 .prepare = snd_hdspm_prepare,
3295 .trigger = snd_hdspm_trigger,
3296 .pointer = snd_hdspm_hw_pointer,
3297 .copy = snd_hdspm_capture_copy,
3298 .page = snd_pcm_sgbuf_ops_page,
3301 static int __devinit snd_hdspm_create_hwdep(snd_card_t * card,
3307 if ((err = snd_hwdep_new(card, "HDSPM hwdep", 0, &hw)) < 0)
3311 hw->private_data = hdspm;
3312 strcpy(hw->name, "HDSPM hwdep interface");
3314 hw->ops.open = snd_hdspm_hwdep_dummy_op;
3315 hw->ops.ioctl = snd_hdspm_hwdep_ioctl;
3316 hw->ops.release = snd_hdspm_hwdep_dummy_op;
3322 /*------------------------------------------------------------
3324 ------------------------------------------------------------*/
3325 static int __devinit snd_hdspm_preallocate_memory(hdspm_t * hdspm)
3333 wanted = HDSPM_DMA_AREA_BYTES + 4096; /* dont know why, but it works */
3336 snd_pcm_lib_preallocate_pages_for_all(pcm,
3337 SNDRV_DMA_TYPE_DEV_SG,
3338 snd_dma_pci_data(hdspm->pci),
3341 snd_printdd("Could not preallocate %d Bytes\n", wanted);
3345 snd_printdd(" Preallocated %d Bytes\n", wanted);
3350 static int snd_hdspm_memory_free(hdspm_t * hdspm)
3352 snd_printdd("memory_free_for_all %p\n", hdspm->pcm);
3354 snd_pcm_lib_preallocate_free_for_all(hdspm->pcm);
3359 static void hdspm_set_sgbuf(hdspm_t * hdspm, struct snd_sg_buf *sgbuf,
3360 unsigned int reg, int channels)
3363 for (i = 0; i < (channels * 16); i++)
3364 hdspm_write(hdspm, reg + 4 * i,
3365 snd_pcm_sgbuf_get_addr(sgbuf,
3366 (size_t) 4096 * i));
3369 /* ------------- ALSA Devices ---------------------------- */
3370 static int __devinit snd_hdspm_create_pcm(snd_card_t * card,
3376 if ((err = snd_pcm_new(card, hdspm->card_name, 0, 1, 1, &pcm)) < 0)
3380 pcm->private_data = hdspm;
3381 strcpy(pcm->name, hdspm->card_name);
3383 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
3384 &snd_hdspm_playback_ops);
3385 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
3386 &snd_hdspm_capture_ops);
3388 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
3390 if ((err = snd_hdspm_preallocate_memory(hdspm)) < 0)
3396 static inline void snd_hdspm_initialize_midi_flush(hdspm_t * hdspm)
3398 snd_hdspm_flush_midi_input(hdspm, 0);
3399 snd_hdspm_flush_midi_input(hdspm, 1);
3402 static int __devinit snd_hdspm_create_alsa_devices(snd_card_t * card,
3407 snd_printdd("Create card...\n");
3408 if ((err = snd_hdspm_create_pcm(card, hdspm)) < 0)
3411 if ((err = snd_hdspm_create_midi(card, hdspm, 0)) < 0)
3414 if ((err = snd_hdspm_create_midi(card, hdspm, 1)) < 0)
3417 if ((err = snd_hdspm_create_controls(card, hdspm)) < 0)
3420 if ((err = snd_hdspm_create_hwdep(card, hdspm)) < 0)
3423 snd_printdd("proc init...\n");
3424 snd_hdspm_proc_init(hdspm);
3426 hdspm->system_sample_rate = -1;
3427 hdspm->last_external_sample_rate = -1;
3428 hdspm->last_internal_sample_rate = -1;
3429 hdspm->playback_pid = -1;
3430 hdspm->capture_pid = -1;
3431 hdspm->capture_substream = NULL;
3432 hdspm->playback_substream = NULL;
3434 snd_printdd("Set defaults...\n");
3435 if ((err = snd_hdspm_set_defaults(hdspm)) < 0)
3438 snd_printdd("Update mixer controls...\n");
3439 hdspm_update_simple_mixer_controls(hdspm);
3441 snd_printdd("Initializeing complete ???\n");
3443 if ((err = snd_card_register(card)) < 0) {
3444 snd_printk(KERN_ERR "HDSPM: error registering card\n");
3448 snd_printdd("... yes now\n");
3453 static int __devinit snd_hdspm_create(snd_card_t * card, hdspm_t * hdspm,
3454 int precise_ptr, int enable_monitor)
3456 struct pci_dev *pci = hdspm->pci;
3460 unsigned long io_extent;
3463 hdspm->irq_count = 0;
3465 hdspm->midi[0].rmidi = NULL;
3466 hdspm->midi[1].rmidi = NULL;
3467 hdspm->midi[0].input = NULL;
3468 hdspm->midi[1].input = NULL;
3469 hdspm->midi[0].output = NULL;
3470 hdspm->midi[1].output = NULL;
3471 spin_lock_init(&hdspm->midi[0].lock);
3472 spin_lock_init(&hdspm->midi[1].lock);
3473 hdspm->iobase = NULL;
3474 hdspm->control_register = 0;
3475 hdspm->control2_register = 0;
3477 hdspm->playback_buffer = NULL;
3478 hdspm->capture_buffer = NULL;
3480 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i)
3481 hdspm->playback_mixer_ctls[i] = NULL;
3482 hdspm->mixer = NULL;
3486 spin_lock_init(&hdspm->lock);
3488 tasklet_init(&hdspm->midi_tasklet,
3489 hdspm_midi_tasklet, (unsigned long) hdspm);
3491 pci_read_config_word(hdspm->pci,
3492 PCI_CLASS_REVISION, &hdspm->firmware_rev);
3494 strcpy(card->driver, "HDSPM");
3495 strcpy(card->mixername, "Xilinx FPGA");
3496 hdspm->card_name = "RME HDSPM MADI";
3498 if ((err = pci_enable_device(pci)) < 0)
3501 pci_set_master(hdspm->pci);
3503 if ((err = pci_request_regions(pci, "hdspm")) < 0)
3506 hdspm->port = pci_resource_start(pci, 0);
3507 io_extent = pci_resource_len(pci, 0);
3509 snd_printdd("grabbed memory region 0x%lx-0x%lx\n",
3510 hdspm->port, hdspm->port + io_extent - 1);
3513 if ((hdspm->iobase = ioremap_nocache(hdspm->port, io_extent)) == NULL) {
3514 snd_printk(KERN_ERR "HDSPM: unable to remap region 0x%lx-0x%lx\n",
3515 hdspm->port, hdspm->port + io_extent - 1);
3518 snd_printdd("remapped region (0x%lx) 0x%lx-0x%lx\n",
3519 (unsigned long)hdspm->iobase, hdspm->port,
3520 hdspm->port + io_extent - 1);
3522 if (request_irq(pci->irq, snd_hdspm_interrupt,
3523 SA_INTERRUPT | SA_SHIRQ, "hdspm",
3525 snd_printk(KERN_ERR "HDSPM: unable to use IRQ %d\n", pci->irq);
3529 snd_printdd("use IRQ %d\n", pci->irq);
3531 hdspm->irq = pci->irq;
3532 hdspm->precise_ptr = precise_ptr;
3534 hdspm->monitor_outs = enable_monitor;
3536 snd_printdd("kmalloc Mixer memory of %d Bytes\n",
3537 sizeof(hdspm_mixer_t));
3539 (hdspm_mixer_t *) kmalloc(sizeof(hdspm_mixer_t), GFP_KERNEL))
3541 snd_printk(KERN_ERR "HDSPM: unable to kmalloc Mixer memory of %d Bytes\n",
3542 (int)sizeof(hdspm_mixer_t));
3546 hdspm->ss_channels = MADI_SS_CHANNELS;
3547 hdspm->ds_channels = MADI_DS_CHANNELS;
3548 hdspm->qs_channels = MADI_QS_CHANNELS;
3550 snd_printdd("create alsa devices.\n");
3551 if ((err = snd_hdspm_create_alsa_devices(card, hdspm)) < 0)
3554 snd_hdspm_initialize_midi_flush(hdspm);
3559 static int snd_hdspm_free(hdspm_t * hdspm)
3564 /* stop th audio, and cancel all interrupts */
3565 hdspm->control_register &=
3566 ~(HDSPM_Start | HDSPM_AudioInterruptEnable
3567 | HDSPM_Midi0InterruptEnable |
3568 HDSPM_Midi1InterruptEnable);
3569 hdspm_write(hdspm, HDSPM_controlRegister,
3570 hdspm->control_register);
3573 if (hdspm->irq >= 0)
3574 free_irq(hdspm->irq, (void *) hdspm);
3578 kfree(hdspm->mixer);
3581 iounmap(hdspm->iobase);
3583 snd_hdspm_memory_free(hdspm);
3586 pci_release_regions(hdspm->pci);
3588 pci_disable_device(hdspm->pci);
3592 static void snd_hdspm_card_free(snd_card_t * card)
3594 hdspm_t *hdspm = (hdspm_t *) card->private_data;
3597 snd_hdspm_free(hdspm);
3600 static int __devinit snd_hdspm_probe(struct pci_dev *pci,
3601 const struct pci_device_id *pci_id)
3608 if (dev >= SNDRV_CARDS)
3615 if (!(card = snd_card_new(index[dev], id[dev],
3616 THIS_MODULE, sizeof(hdspm_t))))
3619 hdspm = (hdspm_t *) card->private_data;
3620 card->private_free = snd_hdspm_card_free;
3625 snd_hdspm_create(card, hdspm, precise_ptr[dev],
3626 enable_monitor[dev])) < 0) {
3627 snd_card_free(card);
3631 strcpy(card->shortname, "HDSPM MADI");
3632 sprintf(card->longname, "%s at 0x%lx, irq %d", hdspm->card_name,
3633 hdspm->port, hdspm->irq);
3635 if ((err = snd_card_register(card)) < 0) {
3636 snd_card_free(card);
3640 pci_set_drvdata(pci, card);
3646 static void __devexit snd_hdspm_remove(struct pci_dev *pci)
3648 snd_card_free(pci_get_drvdata(pci));
3649 pci_set_drvdata(pci, NULL);
3652 static struct pci_driver driver = {
3653 .name = "RME Hammerfall DSP MADI",
3654 .id_table = snd_hdspm_ids,
3655 .probe = snd_hdspm_probe,
3656 .remove = __devexit_p(snd_hdspm_remove),
3660 static int __init alsa_card_hdspm_init(void)
3662 return pci_register_driver(&driver);
3665 static void __exit alsa_card_hdspm_exit(void)
3667 pci_unregister_driver(&driver);
3670 module_init(alsa_card_hdspm_init)
3671 module_exit(alsa_card_hdspm_exit)