3 * arch/mips/vr41xx/common/int-handler.S
5 * BRIEF MODULE DESCRIPTION
6 * Interrupt dispatcher for the NEC VR4100 series.
9 * yyuasa@mvista.com or source@mvista.com
11 * Copyright 2001 MontaVista Software Inc.
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
18 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
24 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
26 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
27 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 675 Mass Ave, Cambridge, MA 02139, USA.
35 * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
36 * - New creation, NEC VR4100 series are supported.
38 * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
39 * - Coped with INTASSIGN of NEC VR4133.
42 #include <asm/regdef.h>
43 #include <asm/mipsregs.h>
44 #include <asm/stackframe.h>
50 NESTED(vr41xx_handle_interrupt, PT_SIZE, ra)
58 * Get the pending interrupts
65 andi t1, t0, CAUSEF_IP7 # MIPS timer interrupt
69 andi t1, t0, 0x7800 # check for Int1-4
72 andi t1, t0, CAUSEF_IP3 # check for Int1
76 andi t1, t0, CAUSEF_IP4 # check for Int2
80 andi t1, t0, CAUSEF_IP5 # check for Int3
84 andi t1, t0, CAUSEF_IP6 # check for Int4
89 andi t1, t0, CAUSEF_IP2 # check for Int0
93 andi t1, t0, CAUSEF_IP0 # check for IP0
97 andi t1, t0, CAUSEF_IP1 # check for IP1
114 END(vr41xx_handle_interrupt)