Merge master.kernel.org:/pub/scm/linux/kernel/git/dwmw2/audit-2.6
[linux-2.6] / drivers / media / video / cx88 / cx88-mpeg.c
1 /*
2  *
3  *  Support for the mpeg transport stream transfers
4  *  PCI function #2 of the cx2388x.
5  *
6  *    (c) 2004 Jelle Foks <jelle@foks.8m.com>
7  *    (c) 2004 Chris Pascoe <c.pascoe@itee.uq.edu.au>
8  *    (c) 2004 Gerd Knorr <kraxel@bytesex.org>
9  *
10  *  This program is free software; you can redistribute it and/or modify
11  *  it under the terms of the GNU General Public License as published by
12  *  the Free Software Foundation; either version 2 of the License, or
13  *  (at your option) any later version.
14  *
15  *  This program is distributed in the hope that it will be useful,
16  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  *  GNU General Public License for more details.
19  *
20  *  You should have received a copy of the GNU General Public License
21  *  along with this program; if not, write to the Free Software
22  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23  */
24
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/init.h>
28 #include <linux/device.h>
29 #include <linux/interrupt.h>
30 #include <asm/delay.h>
31
32 #include "cx88.h"
33
34 /* ------------------------------------------------------------------ */
35
36 MODULE_DESCRIPTION("mpeg driver for cx2388x based TV cards");
37 MODULE_AUTHOR("Jelle Foks <jelle@foks.8m.com>");
38 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
39 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
40 MODULE_LICENSE("GPL");
41
42 static unsigned int debug = 0;
43 module_param(debug,int,0644);
44 MODULE_PARM_DESC(debug,"enable debug messages [mpeg]");
45
46 #define dprintk(level,fmt, arg...)      if (debug >= level) \
47         printk(KERN_DEBUG "%s/2: " fmt, dev->core->name , ## arg)
48
49 /* ------------------------------------------------------------------ */
50
51 static int cx8802_start_dma(struct cx8802_dev    *dev,
52                             struct cx88_dmaqueue *q,
53                             struct cx88_buffer   *buf)
54 {
55         struct cx88_core *core = dev->core;
56
57         dprintk(0, "cx8802_start_dma %d\n", buf->vb.width);
58
59         /* setup fifo + format */
60         cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH28],
61                                 dev->ts_packet_size, buf->risc.dma);
62
63         /* write TS length to chip */
64         cx_write(MO_TS_LNGTH, buf->vb.width);
65
66         /* FIXME: this needs a review.
67          * also: move to cx88-blackbird + cx88-dvb source files? */
68
69         if (cx88_boards[core->board].dvb) {
70                 /* negedge driven & software reset */
71                 cx_write(TS_GEN_CNTRL, 0x0040 | dev->ts_gen_cntrl);
72                 udelay(100);
73                 cx_write(MO_PINMUX_IO, 0x00);
74                 cx_write(TS_HW_SOP_CNTRL,0x47<<16|188<<4|0x01);
75                 switch (core->board) {
76                 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
77                 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
78                 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
79                         cx_write(TS_SOP_STAT, 1<<13);
80                         break;
81                 default:
82                         cx_write(TS_SOP_STAT, 0x00);
83                         break;
84                 }
85                 cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl);
86                 udelay(100);
87         }
88
89         if (cx88_boards[core->board].blackbird) {
90                 cx_write(MO_PINMUX_IO, 0x88); /* enable MPEG parallel IO */
91
92                 cx_write(TS_GEN_CNTRL, 0x46); /* punctured clock TS & posedge driven & software reset */
93                 udelay(100);
94
95                 cx_write(TS_HW_SOP_CNTRL, 0x408); /* mpeg start byte */
96                 cx_write(TS_VALERR_CNTRL, 0x2000);
97
98                 cx_write(TS_GEN_CNTRL, 0x06); /* punctured clock TS & posedge driven */
99                 udelay(100);
100         }
101
102         /* reset counter */
103         cx_write(MO_TS_GPCNTRL, GP_COUNT_CONTROL_RESET);
104         q->count = 1;
105
106         /* enable irqs */
107         dprintk( 0, "setting the interrupt mask\n" );
108         cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x04);
109         cx_set(MO_TS_INTMSK,  0x1f0011);
110
111         /* start dma */
112         cx_set(MO_DEV_CNTRL2, (1<<5));
113         cx_set(MO_TS_DMACNTRL, 0x11);
114         return 0;
115 }
116
117 static int cx8802_stop_dma(struct cx8802_dev *dev)
118 {
119         struct cx88_core *core = dev->core;
120         dprintk( 0, "cx8802_stop_dma\n" );
121
122         /* stop dma */
123         cx_clear(MO_TS_DMACNTRL, 0x11);
124
125         /* disable irqs */
126         cx_clear(MO_PCI_INTMSK, 0x000004);
127         cx_clear(MO_TS_INTMSK, 0x1f0011);
128
129         /* Reset the controller */
130         cx_write(TS_GEN_CNTRL, 0xcd);
131         return 0;
132 }
133
134 static int cx8802_restart_queue(struct cx8802_dev    *dev,
135                                 struct cx88_dmaqueue *q)
136 {
137         struct cx88_buffer *buf;
138         struct list_head *item;
139
140         dprintk( 0, "cx8802_restart_queue\n" );
141         if (list_empty(&q->active))
142         {
143                 dprintk( 0, "cx8802_restart_queue: queue is empty\n" );
144                 return 0;
145         }
146
147         buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
148         dprintk(2,"restart_queue [%p/%d]: restart dma\n",
149                 buf, buf->vb.i);
150         cx8802_start_dma(dev, q, buf);
151         list_for_each(item,&q->active) {
152                 buf = list_entry(item, struct cx88_buffer, vb.queue);
153                 buf->count = q->count++;
154         }
155         mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
156         return 0;
157 }
158
159 /* ------------------------------------------------------------------ */
160
161 int cx8802_buf_prepare(struct cx8802_dev *dev, struct cx88_buffer *buf)
162 {
163         int size = dev->ts_packet_size * dev->ts_packet_count;
164         int rc;
165
166         dprintk(1, "%s: %p\n", __FUNCTION__, buf);
167         if (0 != buf->vb.baddr  &&  buf->vb.bsize < size)
168                 return -EINVAL;
169
170         if (STATE_NEEDS_INIT == buf->vb.state) {
171                 buf->vb.width  = dev->ts_packet_size;
172                 buf->vb.height = dev->ts_packet_count;
173                 buf->vb.size   = size;
174                 buf->vb.field  = V4L2_FIELD_TOP;
175
176                 if (0 != (rc = videobuf_iolock(dev->pci,&buf->vb,NULL)))
177                         goto fail;
178                 cx88_risc_databuffer(dev->pci, &buf->risc,
179                                      buf->vb.dma.sglist,
180                                      buf->vb.width, buf->vb.height);
181         }
182         buf->vb.state = STATE_PREPARED;
183         return 0;
184
185  fail:
186         cx88_free_buffer(dev->pci,buf);
187         return rc;
188 }
189
190 void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf)
191 {
192         struct cx88_buffer    *prev;
193         struct cx88_dmaqueue  *q    = &dev->mpegq;
194
195         dprintk( 1, "cx8802_buf_queue\n" );
196         /* add jump to stopper */
197         buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
198         buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
199
200         if (list_empty(&q->active)) {
201                 dprintk( 0, "queue is empty - first active\n" );
202                 list_add_tail(&buf->vb.queue,&q->active);
203                 cx8802_start_dma(dev, q, buf);
204                 buf->vb.state = STATE_ACTIVE;
205                 buf->count    = q->count++;
206                 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
207                 dprintk(0,"[%p/%d] %s - first active\n",
208                         buf, buf->vb.i, __FUNCTION__);
209
210         } else {
211                 dprintk( 1, "queue is not empty - append to active\n" );
212                 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
213                 list_add_tail(&buf->vb.queue,&q->active);
214                 buf->vb.state = STATE_ACTIVE;
215                 buf->count    = q->count++;
216                 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
217                 dprintk( 1, "[%p/%d] %s - append to active\n",
218                         buf, buf->vb.i, __FUNCTION__);
219         }
220 }
221
222 /* ----------------------------------------------------------- */
223
224 static void do_cancel_buffers(struct cx8802_dev *dev, char *reason, int restart)
225 {
226         struct cx88_dmaqueue *q = &dev->mpegq;
227         struct cx88_buffer *buf;
228         unsigned long flags;
229
230         spin_lock_irqsave(&dev->slock,flags);
231         while (!list_empty(&q->active)) {
232                 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
233                 list_del(&buf->vb.queue);
234                 buf->vb.state = STATE_ERROR;
235                 wake_up(&buf->vb.done);
236                 dprintk(1,"[%p/%d] %s - dma=0x%08lx\n",
237                         buf, buf->vb.i, reason, (unsigned long)buf->risc.dma);
238         }
239         if (restart)
240         {
241                 dprintk(0, "restarting queue\n" );
242                 cx8802_restart_queue(dev,q);
243         }
244         spin_unlock_irqrestore(&dev->slock,flags);
245 }
246
247 void cx8802_cancel_buffers(struct cx8802_dev *dev)
248 {
249         struct cx88_dmaqueue *q = &dev->mpegq;
250
251         dprintk( 1, "cx8802_cancel_buffers" );
252         del_timer_sync(&q->timeout);
253         cx8802_stop_dma(dev);
254         do_cancel_buffers(dev,"cancel",0);
255 }
256
257 static void cx8802_timeout(unsigned long data)
258 {
259         struct cx8802_dev *dev = (struct cx8802_dev*)data;
260
261         dprintk(0, "%s\n",__FUNCTION__);
262
263         if (debug)
264                 cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]);
265         cx8802_stop_dma(dev);
266         do_cancel_buffers(dev,"timeout",1);
267 }
268
269 static char *cx88_mpeg_irqs[32] = {
270         "ts_risci1", NULL, NULL, NULL,
271         "ts_risci2", NULL, NULL, NULL,
272         "ts_oflow",  NULL, NULL, NULL,
273         "ts_sync",   NULL, NULL, NULL,
274         "opc_err", "par_err", "rip_err", "pci_abort",
275         "ts_err?",
276 };
277
278 static void cx8802_mpeg_irq(struct cx8802_dev *dev)
279 {
280         struct cx88_core *core = dev->core;
281         u32 status, mask, count;
282
283         dprintk( 1, "cx8802_mpeg_irq\n" );
284         status = cx_read(MO_TS_INTSTAT);
285         mask   = cx_read(MO_TS_INTMSK);
286         if (0 == (status & mask))
287                 return;
288
289         cx_write(MO_TS_INTSTAT, status);
290
291         if (debug || (status & mask & ~0xff))
292                 cx88_print_irqbits(core->name, "irq mpeg ",
293                                    cx88_mpeg_irqs, status, mask);
294
295         /* risc op code error */
296         if (status & (1 << 16)) {
297                 printk(KERN_WARNING "%s: mpeg risc op code error\n",core->name);
298                 cx_clear(MO_TS_DMACNTRL, 0x11);
299                 cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]);
300         }
301
302         /* risc1 y */
303         if (status & 0x01) {
304                 dprintk( 1, "wake up\n" );
305                 spin_lock(&dev->slock);
306                 count = cx_read(MO_TS_GPCNT);
307                 cx88_wakeup(dev->core, &dev->mpegq, count);
308                 spin_unlock(&dev->slock);
309         }
310
311         /* risc2 y */
312         if (status & 0x10) {
313                 spin_lock(&dev->slock);
314                 cx8802_restart_queue(dev,&dev->mpegq);
315                 spin_unlock(&dev->slock);
316         }
317
318         /* other general errors */
319         if (status & 0x1f0100) {
320                 dprintk( 0, "general errors: 0x%08x\n", status & 0x1f0100 );
321                 spin_lock(&dev->slock);
322                 cx8802_stop_dma(dev);
323                 cx8802_restart_queue(dev,&dev->mpegq);
324                 spin_unlock(&dev->slock);
325         }
326 }
327
328 #define MAX_IRQ_LOOP 10
329
330 static irqreturn_t cx8802_irq(int irq, void *dev_id, struct pt_regs *regs)
331 {
332         struct cx8802_dev *dev = dev_id;
333         struct cx88_core *core = dev->core;
334         u32 status;
335         int loop, handled = 0;
336
337         for (loop = 0; loop < MAX_IRQ_LOOP; loop++) {
338                 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x04);
339                 if (0 == status)
340                         goto out;
341                 dprintk( 1, "cx8802_irq\n" );
342                 dprintk( 1, "    loop: %d/%d\n", loop, MAX_IRQ_LOOP );
343                 dprintk( 1, "    status: %d\n", status );
344                 handled = 1;
345                 cx_write(MO_PCI_INTSTAT, status);
346
347                 if (status & core->pci_irqmask)
348                         cx88_core_irq(core,status);
349                 if (status & 0x04)
350                         cx8802_mpeg_irq(dev);
351         };
352         if (MAX_IRQ_LOOP == loop) {
353                 dprintk( 0, "clearing mask\n" );
354                 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
355                        core->name);
356                 cx_write(MO_PCI_INTMSK,0);
357         }
358
359  out:
360         return IRQ_RETVAL(handled);
361 }
362
363 /* ----------------------------------------------------------- */
364 /* exported stuff                                              */
365
366 int cx8802_init_common(struct cx8802_dev *dev)
367 {
368         struct cx88_core *core = dev->core;
369         int err;
370
371         /* pci init */
372         if (pci_enable_device(dev->pci))
373                 return -EIO;
374         pci_set_master(dev->pci);
375         if (!pci_dma_supported(dev->pci,0xffffffff)) {
376                 printk("%s/2: Oops: no 32bit PCI DMA ???\n",dev->core->name);
377                 return -EIO;
378         }
379
380         pci_read_config_byte(dev->pci, PCI_CLASS_REVISION, &dev->pci_rev);
381         pci_read_config_byte(dev->pci, PCI_LATENCY_TIMER,  &dev->pci_lat);
382         printk(KERN_INFO "%s/2: found at %s, rev: %d, irq: %d, "
383                "latency: %d, mmio: 0x%lx\n", dev->core->name,
384                pci_name(dev->pci), dev->pci_rev, dev->pci->irq,
385                dev->pci_lat,pci_resource_start(dev->pci,0));
386
387         /* initialize driver struct */
388         spin_lock_init(&dev->slock);
389
390         /* init dma queue */
391         INIT_LIST_HEAD(&dev->mpegq.active);
392         INIT_LIST_HEAD(&dev->mpegq.queued);
393         dev->mpegq.timeout.function = cx8802_timeout;
394         dev->mpegq.timeout.data     = (unsigned long)dev;
395         init_timer(&dev->mpegq.timeout);
396         cx88_risc_stopper(dev->pci,&dev->mpegq.stopper,
397                           MO_TS_DMACNTRL,0x11,0x00);
398
399         /* get irq */
400         err = request_irq(dev->pci->irq, cx8802_irq,
401                           SA_SHIRQ | SA_INTERRUPT, dev->core->name, dev);
402         if (err < 0) {
403                 printk(KERN_ERR "%s: can't get IRQ %d\n",
404                        dev->core->name, dev->pci->irq);
405                 return err;
406         }
407         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
408
409         /* everything worked */
410         pci_set_drvdata(dev->pci,dev);
411         return 0;
412 }
413
414 void cx8802_fini_common(struct cx8802_dev *dev)
415 {
416         dprintk( 2, "cx8802_fini_common\n" );
417         cx8802_stop_dma(dev);
418         pci_disable_device(dev->pci);
419
420         /* unregister stuff */
421         free_irq(dev->pci->irq, dev);
422         pci_set_drvdata(dev->pci, NULL);
423
424         /* free memory */
425         btcx_riscmem_free(dev->pci,&dev->mpegq.stopper);
426 }
427
428 /* ----------------------------------------------------------- */
429
430 int cx8802_suspend_common(struct pci_dev *pci_dev, pm_message_t state)
431 {
432         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
433         struct cx88_core *core = dev->core;
434
435         /* stop mpeg dma */
436         spin_lock(&dev->slock);
437         if (!list_empty(&dev->mpegq.active)) {
438                 dprintk( 2, "suspend\n" );
439                 printk("%s: suspend mpeg\n", core->name);
440                 cx8802_stop_dma(dev);
441                 del_timer(&dev->mpegq.timeout);
442         }
443         spin_unlock(&dev->slock);
444
445         /* FIXME -- shutdown device */
446         cx88_shutdown(dev->core);
447
448         pci_save_state(pci_dev);
449         if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
450                 pci_disable_device(pci_dev);
451                 dev->state.disabled = 1;
452         }
453         return 0;
454 }
455
456 int cx8802_resume_common(struct pci_dev *pci_dev)
457 {
458         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
459         struct cx88_core *core = dev->core;
460         int err;
461
462         if (dev->state.disabled) {
463                 err=pci_enable_device(pci_dev);
464                 if (err) {
465                         printk(KERN_ERR "%s: can't enable device\n",
466                                                dev->core->name);
467                         return err;
468                 }
469                 dev->state.disabled = 0;
470         }
471         err=pci_set_power_state(pci_dev, PCI_D0);
472         if (err) {
473                 printk(KERN_ERR "%s: can't enable device\n",
474                                                dev->core->name);
475                 pci_disable_device(pci_dev);
476                 dev->state.disabled = 1;
477
478                 return err;
479         }
480         pci_restore_state(pci_dev);
481
482         /* FIXME: re-initialize hardware */
483         cx88_reset(dev->core);
484
485         /* restart video+vbi capture */
486         spin_lock(&dev->slock);
487         if (!list_empty(&dev->mpegq.active)) {
488                 printk("%s: resume mpeg\n", core->name);
489                 cx8802_restart_queue(dev,&dev->mpegq);
490         }
491         spin_unlock(&dev->slock);
492
493         return 0;
494 }
495
496 /* ----------------------------------------------------------- */
497
498 EXPORT_SYMBOL(cx8802_buf_prepare);
499 EXPORT_SYMBOL(cx8802_buf_queue);
500 EXPORT_SYMBOL(cx8802_cancel_buffers);
501
502 EXPORT_SYMBOL(cx8802_init_common);
503 EXPORT_SYMBOL(cx8802_fini_common);
504
505 EXPORT_SYMBOL(cx8802_suspend_common);
506 EXPORT_SYMBOL(cx8802_resume_common);
507
508 /* ----------------------------------------------------------- */
509 /*
510  * Local variables:
511  * c-basic-offset: 8
512  * End:
513  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
514  */