4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
41 #include <linux/sched.h>
42 #include <linux/highmem.h>
43 #include <linux/debugfs.h>
44 #include <linux/bug.h>
46 #include <asm/pgtable.h>
47 #include <asm/tlbflush.h>
48 #include <asm/fixmap.h>
49 #include <asm/mmu_context.h>
50 #include <asm/setup.h>
51 #include <asm/paravirt.h>
52 #include <asm/linkage.h>
54 #include <asm/xen/hypercall.h>
55 #include <asm/xen/hypervisor.h>
58 #include <xen/interface/xen.h>
59 #include <xen/interface/version.h>
60 #include <xen/hvc-console.h>
62 #include "multicalls.h"
66 #define MMU_UPDATE_HISTO 30
68 #ifdef CONFIG_XEN_DEBUG_FS
72 u32 pgd_update_pinned;
73 u32 pgd_update_batched;
76 u32 pud_update_pinned;
77 u32 pud_update_batched;
80 u32 pmd_update_pinned;
81 u32 pmd_update_batched;
84 u32 pte_update_pinned;
85 u32 pte_update_batched;
88 u32 mmu_update_extended;
89 u32 mmu_update_histo[MMU_UPDATE_HISTO];
92 u32 prot_commit_batched;
95 u32 set_pte_at_batched;
96 u32 set_pte_at_pinned;
97 u32 set_pte_at_current;
98 u32 set_pte_at_kernel;
101 static u8 zero_stats;
103 static inline void check_zero(void)
105 if (unlikely(zero_stats)) {
106 memset(&mmu_stats, 0, sizeof(mmu_stats));
111 #define ADD_STATS(elem, val) \
112 do { check_zero(); mmu_stats.elem += (val); } while(0)
114 #else /* !CONFIG_XEN_DEBUG_FS */
116 #define ADD_STATS(elem, val) do { (void)(val); } while(0)
118 #endif /* CONFIG_XEN_DEBUG_FS */
122 * Identity map, in addition to plain kernel map. This needs to be
123 * large enough to allocate page table pages to allocate the rest.
124 * Each page can map 2MB.
126 static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
129 /* l3 pud for userspace vsyscall mapping */
130 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
131 #endif /* CONFIG_X86_64 */
134 * Note about cr3 (pagetable base) values:
136 * xen_cr3 contains the current logical cr3 value; it contains the
137 * last set cr3. This may not be the current effective cr3, because
138 * its update may be being lazily deferred. However, a vcpu looking
139 * at its own cr3 can use this value knowing that it everything will
140 * be self-consistent.
142 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
143 * hypercall to set the vcpu cr3 is complete (so it may be a little
144 * out of date, but it will never be set early). If one vcpu is
145 * looking at another vcpu's cr3 value, it should use this variable.
147 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
148 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
152 * Just beyond the highest usermode address. STACK_TOP_MAX has a
153 * redzone above it, so round it up to a PGD boundary.
155 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
158 #define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
159 #define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
161 /* Placeholder for holes in the address space */
162 static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data =
163 { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
165 /* Array of pointers to pages containing p2m entries */
166 static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data =
167 { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
169 /* Arrays of p2m arrays expressed in mfns used for save/restore */
170 static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss;
172 static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE]
175 static inline unsigned p2m_top_index(unsigned long pfn)
177 BUG_ON(pfn >= MAX_DOMAIN_PAGES);
178 return pfn / P2M_ENTRIES_PER_PAGE;
181 static inline unsigned p2m_index(unsigned long pfn)
183 return pfn % P2M_ENTRIES_PER_PAGE;
186 /* Build the parallel p2m_top_mfn structures */
187 void xen_setup_mfn_list_list(void)
191 for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
192 unsigned topidx = p2m_top_index(pfn);
194 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
197 for (idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
198 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
199 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
202 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
204 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
205 virt_to_mfn(p2m_top_mfn_list);
206 HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
209 /* Set up p2m_top to point to the domain-builder provided p2m pages */
210 void __init xen_build_dynamic_phys_to_machine(void)
212 unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
213 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
216 for (pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
217 unsigned topidx = p2m_top_index(pfn);
219 p2m_top[topidx] = &mfn_list[pfn];
223 unsigned long get_phys_to_machine(unsigned long pfn)
225 unsigned topidx, idx;
227 if (unlikely(pfn >= MAX_DOMAIN_PAGES))
228 return INVALID_P2M_ENTRY;
230 topidx = p2m_top_index(pfn);
231 idx = p2m_index(pfn);
232 return p2m_top[topidx][idx];
234 EXPORT_SYMBOL_GPL(get_phys_to_machine);
236 static void alloc_p2m(unsigned long **pp, unsigned long *mfnp)
241 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
244 for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
245 p[i] = INVALID_P2M_ENTRY;
247 if (cmpxchg(pp, p2m_missing, p) != p2m_missing)
248 free_page((unsigned long)p);
250 *mfnp = virt_to_mfn(p);
253 void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
255 unsigned topidx, idx;
257 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
258 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
262 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
263 BUG_ON(mfn != INVALID_P2M_ENTRY);
267 topidx = p2m_top_index(pfn);
268 if (p2m_top[topidx] == p2m_missing) {
269 /* no need to allocate a page to store an invalid entry */
270 if (mfn == INVALID_P2M_ENTRY)
272 alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]);
275 idx = p2m_index(pfn);
276 p2m_top[topidx][idx] = mfn;
279 xmaddr_t arbitrary_virt_to_machine(void *vaddr)
281 unsigned long address = (unsigned long)vaddr;
287 * if the PFN is in the linear mapped vaddr range, we can just use
288 * the (quick) virt_to_machine() p2m lookup
290 if (virt_addr_valid(vaddr))
291 return virt_to_machine(vaddr);
293 /* otherwise we have to do a (slower) full page-table walk */
295 pte = lookup_address(address, &level);
297 offset = address & ~PAGE_MASK;
298 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
301 void make_lowmem_page_readonly(void *vaddr)
304 unsigned long address = (unsigned long)vaddr;
307 pte = lookup_address(address, &level);
310 ptev = pte_wrprotect(*pte);
312 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
316 void make_lowmem_page_readwrite(void *vaddr)
319 unsigned long address = (unsigned long)vaddr;
322 pte = lookup_address(address, &level);
325 ptev = pte_mkwrite(*pte);
327 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
332 static bool xen_page_pinned(void *ptr)
334 struct page *page = virt_to_page(ptr);
336 return PagePinned(page);
339 static void xen_extend_mmu_update(const struct mmu_update *update)
341 struct multicall_space mcs;
342 struct mmu_update *u;
344 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
346 if (mcs.mc != NULL) {
347 ADD_STATS(mmu_update_extended, 1);
348 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1);
352 if (mcs.mc->args[1] < MMU_UPDATE_HISTO)
353 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1);
355 ADD_STATS(mmu_update_histo[0], 1);
357 ADD_STATS(mmu_update, 1);
358 mcs = __xen_mc_entry(sizeof(*u));
359 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
360 ADD_STATS(mmu_update_histo[1], 1);
367 void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
375 /* ptr may be ioremapped for 64-bit pagetable setup */
376 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
377 u.val = pmd_val_ma(val);
378 xen_extend_mmu_update(&u);
380 ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
382 xen_mc_issue(PARAVIRT_LAZY_MMU);
387 void xen_set_pmd(pmd_t *ptr, pmd_t val)
389 ADD_STATS(pmd_update, 1);
391 /* If page is not pinned, we can just update the entry
393 if (!xen_page_pinned(ptr)) {
398 ADD_STATS(pmd_update_pinned, 1);
400 xen_set_pmd_hyper(ptr, val);
404 * Associate a virtual page frame with a given physical page frame
405 * and protection flags for that frame.
407 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
409 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
412 void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
413 pte_t *ptep, pte_t pteval)
415 /* updates to init_mm may be done without lock */
419 ADD_STATS(set_pte_at, 1);
420 // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
421 ADD_STATS(set_pte_at_current, mm == current->mm);
422 ADD_STATS(set_pte_at_kernel, mm == &init_mm);
424 if (mm == current->mm || mm == &init_mm) {
425 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
426 struct multicall_space mcs;
427 mcs = xen_mc_entry(0);
429 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
430 ADD_STATS(set_pte_at_batched, 1);
431 xen_mc_issue(PARAVIRT_LAZY_MMU);
434 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
437 xen_set_pte(ptep, pteval);
444 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
445 unsigned long addr, pte_t *ptep)
447 /* Just return the pte as-is. We preserve the bits on commit */
451 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
452 pte_t *ptep, pte_t pte)
458 u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
459 u.val = pte_val_ma(pte);
460 xen_extend_mmu_update(&u);
462 ADD_STATS(prot_commit, 1);
463 ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
465 xen_mc_issue(PARAVIRT_LAZY_MMU);
468 /* Assume pteval_t is equivalent to all the other *val_t types. */
469 static pteval_t pte_mfn_to_pfn(pteval_t val)
471 if (val & _PAGE_PRESENT) {
472 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
473 pteval_t flags = val & PTE_FLAGS_MASK;
474 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
480 static pteval_t pte_pfn_to_mfn(pteval_t val)
482 if (val & _PAGE_PRESENT) {
483 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
484 pteval_t flags = val & PTE_FLAGS_MASK;
485 val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
491 pteval_t xen_pte_val(pte_t pte)
493 return pte_mfn_to_pfn(pte.pte);
495 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
497 pgdval_t xen_pgd_val(pgd_t pgd)
499 return pte_mfn_to_pfn(pgd.pgd);
501 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
503 pte_t xen_make_pte(pteval_t pte)
505 pte = pte_pfn_to_mfn(pte);
506 return native_make_pte(pte);
508 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
510 pgd_t xen_make_pgd(pgdval_t pgd)
512 pgd = pte_pfn_to_mfn(pgd);
513 return native_make_pgd(pgd);
515 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
517 pmdval_t xen_pmd_val(pmd_t pmd)
519 return pte_mfn_to_pfn(pmd.pmd);
521 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
523 void xen_set_pud_hyper(pud_t *ptr, pud_t val)
531 /* ptr may be ioremapped for 64-bit pagetable setup */
532 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
533 u.val = pud_val_ma(val);
534 xen_extend_mmu_update(&u);
536 ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
538 xen_mc_issue(PARAVIRT_LAZY_MMU);
543 void xen_set_pud(pud_t *ptr, pud_t val)
545 ADD_STATS(pud_update, 1);
547 /* If page is not pinned, we can just update the entry
549 if (!xen_page_pinned(ptr)) {
554 ADD_STATS(pud_update_pinned, 1);
556 xen_set_pud_hyper(ptr, val);
559 void xen_set_pte(pte_t *ptep, pte_t pte)
561 ADD_STATS(pte_update, 1);
562 // ADD_STATS(pte_update_pinned, xen_page_pinned(ptep));
563 ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
565 #ifdef CONFIG_X86_PAE
566 ptep->pte_high = pte.pte_high;
568 ptep->pte_low = pte.pte_low;
574 #ifdef CONFIG_X86_PAE
575 void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
577 set_64bit((u64 *)ptep, native_pte_val(pte));
580 void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
583 smp_wmb(); /* make sure low gets written first */
587 void xen_pmd_clear(pmd_t *pmdp)
589 set_pmd(pmdp, __pmd(0));
591 #endif /* CONFIG_X86_PAE */
593 pmd_t xen_make_pmd(pmdval_t pmd)
595 pmd = pte_pfn_to_mfn(pmd);
596 return native_make_pmd(pmd);
598 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
600 #if PAGETABLE_LEVELS == 4
601 pudval_t xen_pud_val(pud_t pud)
603 return pte_mfn_to_pfn(pud.pud);
605 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
607 pud_t xen_make_pud(pudval_t pud)
609 pud = pte_pfn_to_mfn(pud);
611 return native_make_pud(pud);
613 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
615 pgd_t *xen_get_user_pgd(pgd_t *pgd)
617 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
618 unsigned offset = pgd - pgd_page;
619 pgd_t *user_ptr = NULL;
621 if (offset < pgd_index(USER_LIMIT)) {
622 struct page *page = virt_to_page(pgd_page);
623 user_ptr = (pgd_t *)page->private;
631 static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
635 u.ptr = virt_to_machine(ptr).maddr;
636 u.val = pgd_val_ma(val);
637 xen_extend_mmu_update(&u);
641 * Raw hypercall-based set_pgd, intended for in early boot before
642 * there's a page structure. This implies:
643 * 1. The only existing pagetable is the kernel's
644 * 2. It is always pinned
645 * 3. It has no user pagetable attached to it
647 void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
653 __xen_set_pgd_hyper(ptr, val);
655 xen_mc_issue(PARAVIRT_LAZY_MMU);
660 void xen_set_pgd(pgd_t *ptr, pgd_t val)
662 pgd_t *user_ptr = xen_get_user_pgd(ptr);
664 ADD_STATS(pgd_update, 1);
666 /* If page is not pinned, we can just update the entry
668 if (!xen_page_pinned(ptr)) {
671 WARN_ON(xen_page_pinned(user_ptr));
677 ADD_STATS(pgd_update_pinned, 1);
678 ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
680 /* If it's pinned, then we can at least batch the kernel and
681 user updates together. */
684 __xen_set_pgd_hyper(ptr, val);
686 __xen_set_pgd_hyper(user_ptr, val);
688 xen_mc_issue(PARAVIRT_LAZY_MMU);
690 #endif /* PAGETABLE_LEVELS == 4 */
693 * (Yet another) pagetable walker. This one is intended for pinning a
694 * pagetable. This means that it walks a pagetable and calls the
695 * callback function on each page it finds making up the page table,
696 * at every level. It walks the entire pagetable, but it only bothers
697 * pinning pte pages which are below limit. In the normal case this
698 * will be STACK_TOP_MAX, but at boot we need to pin up to
701 * For 32-bit the important bit is that we don't pin beyond there,
702 * because then we start getting into Xen's ptes.
704 * For 64-bit, we must skip the Xen hole in the middle of the address
705 * space, just after the big x86-64 virtual hole.
707 static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
708 int (*func)(struct mm_struct *mm, struct page *,
713 unsigned hole_low, hole_high;
714 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
715 unsigned pgdidx, pudidx, pmdidx;
717 /* The limit is the last byte to be touched */
719 BUG_ON(limit >= FIXADDR_TOP);
721 if (xen_feature(XENFEAT_auto_translated_physmap))
725 * 64-bit has a great big hole in the middle of the address
726 * space, which contains the Xen mappings. On 32-bit these
727 * will end up making a zero-sized hole and so is a no-op.
729 hole_low = pgd_index(USER_LIMIT);
730 hole_high = pgd_index(PAGE_OFFSET);
732 pgdidx_limit = pgd_index(limit);
734 pudidx_limit = pud_index(limit);
739 pmdidx_limit = pmd_index(limit);
744 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
747 if (pgdidx >= hole_low && pgdidx < hole_high)
750 if (!pgd_val(pgd[pgdidx]))
753 pud = pud_offset(&pgd[pgdidx], 0);
755 if (PTRS_PER_PUD > 1) /* not folded */
756 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
758 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
761 if (pgdidx == pgdidx_limit &&
762 pudidx > pudidx_limit)
765 if (pud_none(pud[pudidx]))
768 pmd = pmd_offset(&pud[pudidx], 0);
770 if (PTRS_PER_PMD > 1) /* not folded */
771 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
773 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
776 if (pgdidx == pgdidx_limit &&
777 pudidx == pudidx_limit &&
778 pmdidx > pmdidx_limit)
781 if (pmd_none(pmd[pmdidx]))
784 pte = pmd_page(pmd[pmdidx]);
785 flush |= (*func)(mm, pte, PT_PTE);
791 /* Do the top level last, so that the callbacks can use it as
792 a cue to do final things like tlb flushes. */
793 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
798 static int xen_pgd_walk(struct mm_struct *mm,
799 int (*func)(struct mm_struct *mm, struct page *,
803 return __xen_pgd_walk(mm, mm->pgd, func, limit);
806 /* If we're using split pte locks, then take the page's lock and
807 return a pointer to it. Otherwise return NULL. */
808 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
810 spinlock_t *ptl = NULL;
812 #if USE_SPLIT_PTLOCKS
813 ptl = __pte_lockptr(page);
814 spin_lock_nest_lock(ptl, &mm->page_table_lock);
820 static void xen_pte_unlock(void *v)
826 static void xen_do_pin(unsigned level, unsigned long pfn)
828 struct mmuext_op *op;
829 struct multicall_space mcs;
831 mcs = __xen_mc_entry(sizeof(*op));
834 op->arg1.mfn = pfn_to_mfn(pfn);
835 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
838 static int xen_pin_page(struct mm_struct *mm, struct page *page,
841 unsigned pgfl = TestSetPagePinned(page);
845 flush = 0; /* already pinned */
846 else if (PageHighMem(page))
847 /* kmaps need flushing if we found an unpinned
851 void *pt = lowmem_page_address(page);
852 unsigned long pfn = page_to_pfn(page);
853 struct multicall_space mcs = __xen_mc_entry(0);
859 * We need to hold the pagetable lock between the time
860 * we make the pagetable RO and when we actually pin
861 * it. If we don't, then other users may come in and
862 * attempt to update the pagetable by writing it,
863 * which will fail because the memory is RO but not
864 * pinned, so Xen won't do the trap'n'emulate.
866 * If we're using split pte locks, we can't hold the
867 * entire pagetable's worth of locks during the
868 * traverse, because we may wrap the preempt count (8
869 * bits). The solution is to mark RO and pin each PTE
870 * page while holding the lock. This means the number
871 * of locks we end up holding is never more than a
872 * batch size (~32 entries, at present).
874 * If we're not using split pte locks, we needn't pin
875 * the PTE pages independently, because we're
876 * protected by the overall pagetable lock.
880 ptl = xen_pte_lock(page, mm);
882 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
883 pfn_pte(pfn, PAGE_KERNEL_RO),
884 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
887 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
889 /* Queue a deferred unlock for when this batch
891 xen_mc_callback(xen_pte_unlock, ptl);
898 /* This is called just after a mm has been created, but it has not
899 been used yet. We need to make sure that its pagetable is all
900 read-only, and can be pinned. */
901 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
907 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
908 /* re-enable interrupts for flushing */
918 pgd_t *user_pgd = xen_get_user_pgd(pgd);
920 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
923 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
924 xen_do_pin(MMUEXT_PIN_L4_TABLE,
925 PFN_DOWN(__pa(user_pgd)));
928 #else /* CONFIG_X86_32 */
929 #ifdef CONFIG_X86_PAE
930 /* Need to make sure unshared kernel PMD is pinnable */
931 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
934 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
935 #endif /* CONFIG_X86_64 */
939 static void xen_pgd_pin(struct mm_struct *mm)
941 __xen_pgd_pin(mm, mm->pgd);
945 * On save, we need to pin all pagetables to make sure they get their
946 * mfns turned into pfns. Search the list for any unpinned pgds and pin
947 * them (unpinned pgds are not currently in use, probably because the
948 * process is under construction or destruction).
950 * Expected to be called in stop_machine() ("equivalent to taking
951 * every spinlock in the system"), so the locking doesn't really
952 * matter all that much.
954 void xen_mm_pin_all(void)
959 spin_lock_irqsave(&pgd_lock, flags);
961 list_for_each_entry(page, &pgd_list, lru) {
962 if (!PagePinned(page)) {
963 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
964 SetPageSavePinned(page);
968 spin_unlock_irqrestore(&pgd_lock, flags);
972 * The init_mm pagetable is really pinned as soon as its created, but
973 * that's before we have page structures to store the bits. So do all
974 * the book-keeping now.
976 static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page,
983 void __init xen_mark_init_mm_pinned(void)
985 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
988 static int xen_unpin_page(struct mm_struct *mm, struct page *page,
991 unsigned pgfl = TestClearPagePinned(page);
993 if (pgfl && !PageHighMem(page)) {
994 void *pt = lowmem_page_address(page);
995 unsigned long pfn = page_to_pfn(page);
996 spinlock_t *ptl = NULL;
997 struct multicall_space mcs;
1000 * Do the converse to pin_page. If we're using split
1001 * pte locks, we must be holding the lock for while
1002 * the pte page is unpinned but still RO to prevent
1003 * concurrent updates from seeing it in this
1004 * partially-pinned state.
1006 if (level == PT_PTE) {
1007 ptl = xen_pte_lock(page, mm);
1010 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
1013 mcs = __xen_mc_entry(0);
1015 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
1016 pfn_pte(pfn, PAGE_KERNEL),
1017 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
1020 /* unlock when batch completed */
1021 xen_mc_callback(xen_pte_unlock, ptl);
1025 return 0; /* never need to flush on unpin */
1028 /* Release a pagetables pages back as normal RW */
1029 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
1033 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1035 #ifdef CONFIG_X86_64
1037 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1040 xen_do_pin(MMUEXT_UNPIN_TABLE,
1041 PFN_DOWN(__pa(user_pgd)));
1042 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
1047 #ifdef CONFIG_X86_PAE
1048 /* Need to make sure unshared kernel PMD is unpinned */
1049 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
1053 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
1058 static void xen_pgd_unpin(struct mm_struct *mm)
1060 __xen_pgd_unpin(mm, mm->pgd);
1064 * On resume, undo any pinning done at save, so that the rest of the
1065 * kernel doesn't see any unexpected pinned pagetables.
1067 void xen_mm_unpin_all(void)
1069 unsigned long flags;
1072 spin_lock_irqsave(&pgd_lock, flags);
1074 list_for_each_entry(page, &pgd_list, lru) {
1075 if (PageSavePinned(page)) {
1076 BUG_ON(!PagePinned(page));
1077 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
1078 ClearPageSavePinned(page);
1082 spin_unlock_irqrestore(&pgd_lock, flags);
1085 void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1087 spin_lock(&next->page_table_lock);
1089 spin_unlock(&next->page_table_lock);
1092 void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1094 spin_lock(&mm->page_table_lock);
1096 spin_unlock(&mm->page_table_lock);
1101 /* Another cpu may still have their %cr3 pointing at the pagetable, so
1102 we need to repoint it somewhere else before we can unpin it. */
1103 static void drop_other_mm_ref(void *info)
1105 struct mm_struct *mm = info;
1106 struct mm_struct *active_mm;
1108 active_mm = percpu_read(cpu_tlbstate.active_mm);
1110 if (active_mm == mm)
1111 leave_mm(smp_processor_id());
1113 /* If this cpu still has a stale cr3 reference, then make sure
1114 it has been flushed. */
1115 if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) {
1116 load_cr3(swapper_pg_dir);
1117 arch_flush_lazy_cpu_mode();
1121 static void xen_drop_mm_ref(struct mm_struct *mm)
1126 if (current->active_mm == mm) {
1127 if (current->mm == mm)
1128 load_cr3(swapper_pg_dir);
1130 leave_mm(smp_processor_id());
1131 arch_flush_lazy_cpu_mode();
1134 /* Get the "official" set of cpus referring to our pagetable. */
1135 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1136 for_each_online_cpu(cpu) {
1137 if (!cpumask_test_cpu(cpu, &mm->cpu_vm_mask)
1138 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1140 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1144 cpumask_copy(mask, &mm->cpu_vm_mask);
1146 /* It's possible that a vcpu may have a stale reference to our
1147 cr3, because its in lazy mode, and it hasn't yet flushed
1148 its set of pending hypercalls yet. In this case, we can
1149 look at its actual current cr3 value, and force it to flush
1151 for_each_online_cpu(cpu) {
1152 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1153 cpumask_set_cpu(cpu, mask);
1156 if (!cpumask_empty(mask))
1157 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1158 free_cpumask_var(mask);
1161 static void xen_drop_mm_ref(struct mm_struct *mm)
1163 if (current->active_mm == mm)
1164 load_cr3(swapper_pg_dir);
1169 * While a process runs, Xen pins its pagetables, which means that the
1170 * hypervisor forces it to be read-only, and it controls all updates
1171 * to it. This means that all pagetable updates have to go via the
1172 * hypervisor, which is moderately expensive.
1174 * Since we're pulling the pagetable down, we switch to use init_mm,
1175 * unpin old process pagetable and mark it all read-write, which
1176 * allows further operations on it to be simple memory accesses.
1178 * The only subtle point is that another CPU may be still using the
1179 * pagetable because of lazy tlb flushing. This means we need need to
1180 * switch all CPUs off this pagetable before we can unpin it.
1182 void xen_exit_mmap(struct mm_struct *mm)
1184 get_cpu(); /* make sure we don't move around */
1185 xen_drop_mm_ref(mm);
1188 spin_lock(&mm->page_table_lock);
1190 /* pgd may not be pinned in the error exit path of execve */
1191 if (xen_page_pinned(mm->pgd))
1194 spin_unlock(&mm->page_table_lock);
1197 static __init void xen_pagetable_setup_start(pgd_t *base)
1201 static __init void xen_pagetable_setup_done(pgd_t *base)
1203 xen_setup_shared_info();
1206 static void xen_write_cr2(unsigned long cr2)
1208 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1211 static unsigned long xen_read_cr2(void)
1213 return percpu_read(xen_vcpu)->arch.cr2;
1216 unsigned long xen_read_cr2_direct(void)
1218 return percpu_read(xen_vcpu_info.arch.cr2);
1221 static void xen_flush_tlb(void)
1223 struct mmuext_op *op;
1224 struct multicall_space mcs;
1228 mcs = xen_mc_entry(sizeof(*op));
1231 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1232 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1234 xen_mc_issue(PARAVIRT_LAZY_MMU);
1239 static void xen_flush_tlb_single(unsigned long addr)
1241 struct mmuext_op *op;
1242 struct multicall_space mcs;
1246 mcs = xen_mc_entry(sizeof(*op));
1248 op->cmd = MMUEXT_INVLPG_LOCAL;
1249 op->arg1.linear_addr = addr & PAGE_MASK;
1250 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1252 xen_mc_issue(PARAVIRT_LAZY_MMU);
1257 static void xen_flush_tlb_others(const struct cpumask *cpus,
1258 struct mm_struct *mm, unsigned long va)
1261 struct mmuext_op op;
1262 DECLARE_BITMAP(mask, NR_CPUS);
1264 struct multicall_space mcs;
1266 BUG_ON(cpumask_empty(cpus));
1269 mcs = xen_mc_entry(sizeof(*args));
1271 args->op.arg2.vcpumask = to_cpumask(args->mask);
1273 /* Remove us, and any offline CPUS. */
1274 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1275 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1276 if (unlikely(cpumask_empty(to_cpumask(args->mask))))
1279 if (va == TLB_FLUSH_ALL) {
1280 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1282 args->op.cmd = MMUEXT_INVLPG_MULTI;
1283 args->op.arg1.linear_addr = va;
1286 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1289 xen_mc_issue(PARAVIRT_LAZY_MMU);
1292 static unsigned long xen_read_cr3(void)
1294 return percpu_read(xen_cr3);
1297 static void set_current_cr3(void *v)
1299 percpu_write(xen_current_cr3, (unsigned long)v);
1302 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1304 struct mmuext_op *op;
1305 struct multicall_space mcs;
1309 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1313 WARN_ON(mfn == 0 && kernel);
1315 mcs = __xen_mc_entry(sizeof(*op));
1318 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1321 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1324 percpu_write(xen_cr3, cr3);
1326 /* Update xen_current_cr3 once the batch has actually
1328 xen_mc_callback(set_current_cr3, (void *)cr3);
1332 static void xen_write_cr3(unsigned long cr3)
1334 BUG_ON(preemptible());
1336 xen_mc_batch(); /* disables interrupts */
1338 /* Update while interrupts are disabled, so its atomic with
1340 percpu_write(xen_cr3, cr3);
1342 __xen_write_cr3(true, cr3);
1344 #ifdef CONFIG_X86_64
1346 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1348 __xen_write_cr3(false, __pa(user_pgd));
1350 __xen_write_cr3(false, 0);
1354 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1357 static int xen_pgd_alloc(struct mm_struct *mm)
1359 pgd_t *pgd = mm->pgd;
1362 BUG_ON(PagePinned(virt_to_page(pgd)));
1364 #ifdef CONFIG_X86_64
1366 struct page *page = virt_to_page(pgd);
1369 BUG_ON(page->private != 0);
1373 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1374 page->private = (unsigned long)user_pgd;
1376 if (user_pgd != NULL) {
1377 user_pgd[pgd_index(VSYSCALL_START)] =
1378 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1382 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1389 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1391 #ifdef CONFIG_X86_64
1392 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1395 free_page((unsigned long)user_pgd);
1399 #ifdef CONFIG_HIGHPTE
1400 static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
1402 pgprot_t prot = PAGE_KERNEL;
1404 if (PagePinned(page))
1405 prot = PAGE_KERNEL_RO;
1407 if (0 && PageHighMem(page))
1408 printk("mapping highpte %lx type %d prot %s\n",
1409 page_to_pfn(page), type,
1410 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
1412 return kmap_atomic_prot(page, type, prot);
1416 #ifdef CONFIG_X86_32
1417 static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
1419 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1420 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1421 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1427 /* Init-time set_pte while constructing initial pagetables, which
1428 doesn't allow RO pagetable pages to be remapped RW */
1429 static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1431 pte = mask_rw_pte(ptep, pte);
1433 xen_set_pte(ptep, pte);
1437 /* Early in boot, while setting up the initial pagetable, assume
1438 everything is pinned. */
1439 static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1441 #ifdef CONFIG_FLATMEM
1442 BUG_ON(mem_map); /* should only be used early */
1444 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1447 /* Early release_pte assumes that all pts are pinned, since there's
1448 only init_mm and anything attached to that is pinned. */
1449 static void xen_release_pte_init(unsigned long pfn)
1451 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1454 static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1456 struct mmuext_op op;
1458 op.arg1.mfn = pfn_to_mfn(pfn);
1459 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1463 /* This needs to make sure the new pte page is pinned iff its being
1464 attached to a pinned pagetable. */
1465 static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1467 struct page *page = pfn_to_page(pfn);
1469 if (PagePinned(virt_to_page(mm->pgd))) {
1470 SetPagePinned(page);
1473 if (!PageHighMem(page)) {
1474 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1475 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1476 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1478 /* make sure there are no stray mappings of
1480 kmap_flush_unused();
1485 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1487 xen_alloc_ptpage(mm, pfn, PT_PTE);
1490 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1492 xen_alloc_ptpage(mm, pfn, PT_PMD);
1495 /* This should never happen until we're OK to use struct page */
1496 static void xen_release_ptpage(unsigned long pfn, unsigned level)
1498 struct page *page = pfn_to_page(pfn);
1500 if (PagePinned(page)) {
1501 if (!PageHighMem(page)) {
1502 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1503 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1504 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1506 ClearPagePinned(page);
1510 static void xen_release_pte(unsigned long pfn)
1512 xen_release_ptpage(pfn, PT_PTE);
1515 static void xen_release_pmd(unsigned long pfn)
1517 xen_release_ptpage(pfn, PT_PMD);
1520 #if PAGETABLE_LEVELS == 4
1521 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1523 xen_alloc_ptpage(mm, pfn, PT_PUD);
1526 static void xen_release_pud(unsigned long pfn)
1528 xen_release_ptpage(pfn, PT_PUD);
1532 void __init xen_reserve_top(void)
1534 #ifdef CONFIG_X86_32
1535 unsigned long top = HYPERVISOR_VIRT_START;
1536 struct xen_platform_parameters pp;
1538 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1539 top = pp.virt_start;
1541 reserve_top_address(-top);
1542 #endif /* CONFIG_X86_32 */
1546 * Like __va(), but returns address in the kernel mapping (which is
1547 * all we have until the physical memory mapping has been set up.
1549 static void *__ka(phys_addr_t paddr)
1551 #ifdef CONFIG_X86_64
1552 return (void *)(paddr + __START_KERNEL_map);
1558 /* Convert a machine address to physical address */
1559 static unsigned long m2p(phys_addr_t maddr)
1563 maddr &= PTE_PFN_MASK;
1564 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1569 /* Convert a machine address to kernel virtual */
1570 static void *m2v(phys_addr_t maddr)
1572 return __ka(m2p(maddr));
1575 static void set_page_prot(void *addr, pgprot_t prot)
1577 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1578 pte_t pte = pfn_pte(pfn, prot);
1580 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1584 static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1586 unsigned pmdidx, pteidx;
1592 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1595 /* Reuse or allocate a page of ptes */
1596 if (pmd_present(pmd[pmdidx]))
1597 pte_page = m2v(pmd[pmdidx].pmd);
1599 /* Check for free pte pages */
1600 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1603 pte_page = &level1_ident_pgt[ident_pte];
1604 ident_pte += PTRS_PER_PTE;
1606 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1609 /* Install mappings */
1610 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1613 if (pfn > max_pfn_mapped)
1614 max_pfn_mapped = pfn;
1616 if (!pte_none(pte_page[pteidx]))
1619 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1620 pte_page[pteidx] = pte;
1624 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1625 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1627 set_page_prot(pmd, PAGE_KERNEL_RO);
1630 #ifdef CONFIG_X86_64
1631 static void convert_pfn_mfn(void *v)
1636 /* All levels are converted the same way, so just treat them
1638 for (i = 0; i < PTRS_PER_PTE; i++)
1639 pte[i] = xen_make_pte(pte[i].pte);
1643 * Set up the inital kernel pagetable.
1645 * We can construct this by grafting the Xen provided pagetable into
1646 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1647 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1648 * means that only the kernel has a physical mapping to start with -
1649 * but that's enough to get __va working. We need to fill in the rest
1650 * of the physical mapping once some sort of allocator has been set
1653 __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1654 unsigned long max_pfn)
1659 /* Zap identity mapping */
1660 init_level4_pgt[0] = __pgd(0);
1662 /* Pre-constructed entries are in pfn, so convert to mfn */
1663 convert_pfn_mfn(init_level4_pgt);
1664 convert_pfn_mfn(level3_ident_pgt);
1665 convert_pfn_mfn(level3_kernel_pgt);
1667 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1668 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1670 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1671 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1673 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1674 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1675 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1677 /* Set up identity map */
1678 xen_map_identity_early(level2_ident_pgt, max_pfn);
1680 /* Make pagetable pieces RO */
1681 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1682 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1683 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1684 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1685 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1686 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1688 /* Pin down new L4 */
1689 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1690 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1692 /* Unpin Xen-provided one */
1693 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1696 pgd = init_level4_pgt;
1699 * At this stage there can be no user pgd, and no page
1700 * structure to attach it to, so make sure we just set kernel
1704 __xen_write_cr3(true, __pa(pgd));
1705 xen_mc_issue(PARAVIRT_LAZY_CPU);
1707 reserve_early(__pa(xen_start_info->pt_base),
1708 __pa(xen_start_info->pt_base +
1709 xen_start_info->nr_pt_frames * PAGE_SIZE),
1714 #else /* !CONFIG_X86_64 */
1715 static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1717 __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1718 unsigned long max_pfn)
1722 init_pg_tables_start = __pa(pgd);
1723 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1724 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1726 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1727 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1729 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1731 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1732 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1733 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1735 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1736 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1737 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1739 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1741 xen_write_cr3(__pa(swapper_pg_dir));
1743 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1745 return swapper_pg_dir;
1747 #endif /* CONFIG_X86_64 */
1749 static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1753 phys >>= PAGE_SHIFT;
1756 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1757 #ifdef CONFIG_X86_F00F_BUG
1760 #ifdef CONFIG_X86_32
1763 # ifdef CONFIG_HIGHMEM
1764 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1767 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1769 #ifdef CONFIG_X86_LOCAL_APIC
1770 case FIX_APIC_BASE: /* maps dummy local APIC */
1772 pte = pfn_pte(phys, prot);
1776 pte = mfn_pte(phys, prot);
1780 __native_set_fixmap(idx, pte);
1782 #ifdef CONFIG_X86_64
1783 /* Replicate changes to map the vsyscall page into the user
1784 pagetable vsyscall mapping. */
1785 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1786 unsigned long vaddr = __fix_to_virt(idx);
1787 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1792 __init void xen_post_allocator_init(void)
1794 pv_mmu_ops.set_pte = xen_set_pte;
1795 pv_mmu_ops.set_pmd = xen_set_pmd;
1796 pv_mmu_ops.set_pud = xen_set_pud;
1797 #if PAGETABLE_LEVELS == 4
1798 pv_mmu_ops.set_pgd = xen_set_pgd;
1801 /* This will work as long as patching hasn't happened yet
1802 (which it hasn't) */
1803 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1804 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1805 pv_mmu_ops.release_pte = xen_release_pte;
1806 pv_mmu_ops.release_pmd = xen_release_pmd;
1807 #if PAGETABLE_LEVELS == 4
1808 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1809 pv_mmu_ops.release_pud = xen_release_pud;
1812 #ifdef CONFIG_X86_64
1813 SetPagePinned(virt_to_page(level3_user_vsyscall));
1815 xen_mark_init_mm_pinned();
1819 const struct pv_mmu_ops xen_mmu_ops __initdata = {
1820 .pagetable_setup_start = xen_pagetable_setup_start,
1821 .pagetable_setup_done = xen_pagetable_setup_done,
1823 .read_cr2 = xen_read_cr2,
1824 .write_cr2 = xen_write_cr2,
1826 .read_cr3 = xen_read_cr3,
1827 .write_cr3 = xen_write_cr3,
1829 .flush_tlb_user = xen_flush_tlb,
1830 .flush_tlb_kernel = xen_flush_tlb,
1831 .flush_tlb_single = xen_flush_tlb_single,
1832 .flush_tlb_others = xen_flush_tlb_others,
1834 .pte_update = paravirt_nop,
1835 .pte_update_defer = paravirt_nop,
1837 .pgd_alloc = xen_pgd_alloc,
1838 .pgd_free = xen_pgd_free,
1840 .alloc_pte = xen_alloc_pte_init,
1841 .release_pte = xen_release_pte_init,
1842 .alloc_pmd = xen_alloc_pte_init,
1843 .alloc_pmd_clone = paravirt_nop,
1844 .release_pmd = xen_release_pte_init,
1846 #ifdef CONFIG_HIGHPTE
1847 .kmap_atomic_pte = xen_kmap_atomic_pte,
1850 #ifdef CONFIG_X86_64
1851 .set_pte = xen_set_pte,
1853 .set_pte = xen_set_pte_init,
1855 .set_pte_at = xen_set_pte_at,
1856 .set_pmd = xen_set_pmd_hyper,
1858 .ptep_modify_prot_start = __ptep_modify_prot_start,
1859 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1861 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
1862 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
1864 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
1865 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
1867 #ifdef CONFIG_X86_PAE
1868 .set_pte_atomic = xen_set_pte_atomic,
1869 .set_pte_present = xen_set_pte_at,
1870 .pte_clear = xen_pte_clear,
1871 .pmd_clear = xen_pmd_clear,
1872 #endif /* CONFIG_X86_PAE */
1873 .set_pud = xen_set_pud_hyper,
1875 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
1876 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
1878 #if PAGETABLE_LEVELS == 4
1879 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
1880 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
1881 .set_pgd = xen_set_pgd_hyper,
1883 .alloc_pud = xen_alloc_pte_init,
1884 .release_pud = xen_release_pte_init,
1885 #endif /* PAGETABLE_LEVELS == 4 */
1887 .activate_mm = xen_activate_mm,
1888 .dup_mmap = xen_dup_mmap,
1889 .exit_mmap = xen_exit_mmap,
1892 .enter = paravirt_enter_lazy_mmu,
1893 .leave = xen_leave_lazy,
1896 .set_fixmap = xen_set_fixmap,
1900 #ifdef CONFIG_XEN_DEBUG_FS
1902 static struct dentry *d_mmu_debug;
1904 static int __init xen_mmu_debugfs(void)
1906 struct dentry *d_xen = xen_init_debugfs();
1911 d_mmu_debug = debugfs_create_dir("mmu", d_xen);
1913 debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats);
1915 debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update);
1916 debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug,
1917 &mmu_stats.pgd_update_pinned);
1918 debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug,
1919 &mmu_stats.pgd_update_pinned);
1921 debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update);
1922 debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug,
1923 &mmu_stats.pud_update_pinned);
1924 debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug,
1925 &mmu_stats.pud_update_pinned);
1927 debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update);
1928 debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug,
1929 &mmu_stats.pmd_update_pinned);
1930 debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug,
1931 &mmu_stats.pmd_update_pinned);
1933 debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update);
1934 // debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug,
1935 // &mmu_stats.pte_update_pinned);
1936 debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug,
1937 &mmu_stats.pte_update_pinned);
1939 debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update);
1940 debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug,
1941 &mmu_stats.mmu_update_extended);
1942 xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug,
1943 mmu_stats.mmu_update_histo, 20);
1945 debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at);
1946 debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug,
1947 &mmu_stats.set_pte_at_batched);
1948 debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug,
1949 &mmu_stats.set_pte_at_current);
1950 debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug,
1951 &mmu_stats.set_pte_at_kernel);
1953 debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit);
1954 debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug,
1955 &mmu_stats.prot_commit_batched);
1959 fs_initcall(xen_mmu_debugfs);
1961 #endif /* CONFIG_XEN_DEBUG_FS */