Merge branch 'x86/uaccess' into core/percpu
[linux-2.6] / drivers / gpu / drm / i915 / dvo_sil164.c
1 /**************************************************************************
2
3 Copyright © 2006 Dave Airlie
4
5 All Rights Reserved.
6
7 Permission is hereby granted, free of charge, to any person obtaining a
8 copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sub license, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial portions
17 of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
23 ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **************************************************************************/
28
29 #include "dvo.h"
30
31 #define SIL164_VID 0x0001
32 #define SIL164_DID 0x0006
33
34 #define SIL164_VID_LO 0x00
35 #define SIL164_VID_HI 0x01
36 #define SIL164_DID_LO 0x02
37 #define SIL164_DID_HI 0x03
38 #define SIL164_REV    0x04
39 #define SIL164_RSVD   0x05
40 #define SIL164_FREQ_LO 0x06
41 #define SIL164_FREQ_HI 0x07
42
43 #define SIL164_REG8 0x08
44 #define SIL164_8_VEN (1<<5)
45 #define SIL164_8_HEN (1<<4)
46 #define SIL164_8_DSEL (1<<3)
47 #define SIL164_8_BSEL (1<<2)
48 #define SIL164_8_EDGE (1<<1)
49 #define SIL164_8_PD   (1<<0)
50
51 #define SIL164_REG9 0x09
52 #define SIL164_9_VLOW (1<<7)
53 #define SIL164_9_MSEL_MASK (0x7<<4)
54 #define SIL164_9_TSEL (1<<3)
55 #define SIL164_9_RSEN (1<<2)
56 #define SIL164_9_HTPLG (1<<1)
57 #define SIL164_9_MDI (1<<0)
58
59 #define SIL164_REGC 0x0c
60
61 struct sil164_save_rec {
62         uint8_t reg8;
63         uint8_t reg9;
64         uint8_t regc;
65 };
66
67 struct sil164_priv {
68         //I2CDevRec d;
69         bool quiet;
70         struct sil164_save_rec save_regs;
71         struct sil164_save_rec mode_regs;
72 };
73
74 #define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))
75
76 static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
77 {
78         struct sil164_priv *sil = dvo->dev_priv;
79         struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
80         u8 out_buf[2];
81         u8 in_buf[2];
82
83         struct i2c_msg msgs[] = {
84                 {
85                         .addr = i2cbus->slave_addr,
86                         .flags = 0,
87                         .len = 1,
88                         .buf = out_buf,
89                 },
90                 {
91                         .addr = i2cbus->slave_addr,
92                         .flags = I2C_M_RD,
93                         .len = 1,
94                         .buf = in_buf,
95                 }
96         };
97
98         out_buf[0] = addr;
99         out_buf[1] = 0;
100
101         if (i2c_transfer(&i2cbus->adapter, msgs, 2) == 2) {
102                 *ch = in_buf[0];
103                 return true;
104         };
105
106         if (!sil->quiet) {
107                 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
108                           addr, i2cbus->adapter.name, i2cbus->slave_addr);
109         }
110         return false;
111 }
112
113 static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
114 {
115         struct sil164_priv *sil= dvo->dev_priv;
116         struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
117         uint8_t out_buf[2];
118         struct i2c_msg msg = {
119                 .addr = i2cbus->slave_addr,
120                 .flags = 0,
121                 .len = 2,
122                 .buf = out_buf,
123         };
124
125         out_buf[0] = addr;
126         out_buf[1] = ch;
127
128         if (i2c_transfer(&i2cbus->adapter, &msg, 1) == 1)
129                 return true;
130
131         if (!sil->quiet) {
132                 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
133                           addr, i2cbus->adapter.name, i2cbus->slave_addr);
134         }
135
136         return false;
137 }
138
139 /* Silicon Image 164 driver for chip on i2c bus */
140 static bool sil164_init(struct intel_dvo_device *dvo,
141                         struct intel_i2c_chan *i2cbus)
142 {
143         /* this will detect the SIL164 chip on the specified i2c bus */
144         struct sil164_priv *sil;
145         unsigned char ch;
146
147         sil = kzalloc(sizeof(struct sil164_priv), GFP_KERNEL);
148         if (sil == NULL)
149                 return false;
150
151         dvo->i2c_bus = i2cbus;
152         dvo->i2c_bus->slave_addr = dvo->slave_addr;
153         dvo->dev_priv = sil;
154         sil->quiet = true;
155
156         if (!sil164_readb(dvo, SIL164_VID_LO, &ch))
157                 goto out;
158
159         if (ch != (SIL164_VID & 0xff)) {
160                 DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
161                           ch, i2cbus->adapter.name, i2cbus->slave_addr);
162                 goto out;
163         }
164
165         if (!sil164_readb(dvo, SIL164_DID_LO, &ch))
166                 goto out;
167
168         if (ch != (SIL164_DID & 0xff)) {
169                 DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
170                           ch, i2cbus->adapter.name, i2cbus->slave_addr);
171                 goto out;
172         }
173         sil->quiet = false;
174
175         DRM_DEBUG("init sil164 dvo controller successfully!\n");
176         return true;
177
178 out:
179         kfree(sil);
180         return false;
181 }
182
183 static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
184 {
185         uint8_t reg9;
186
187         sil164_readb(dvo, SIL164_REG9, &reg9);
188
189         if (reg9 & SIL164_9_HTPLG)
190                 return connector_status_connected;
191         else
192                 return connector_status_disconnected;
193 }
194
195 static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo,
196                                               struct drm_display_mode *mode)
197 {
198         return MODE_OK;
199 }
200
201 static void sil164_mode_set(struct intel_dvo_device *dvo,
202                             struct drm_display_mode *mode,
203                             struct drm_display_mode *adjusted_mode)
204 {
205         /* As long as the basics are set up, since we don't have clock
206          * dependencies in the mode setup, we can just leave the
207          * registers alone and everything will work fine.
208          */
209         /* recommended programming sequence from doc */
210         /*sil164_writeb(sil, 0x08, 0x30);
211           sil164_writeb(sil, 0x09, 0x00);
212           sil164_writeb(sil, 0x0a, 0x90);
213           sil164_writeb(sil, 0x0c, 0x89);
214           sil164_writeb(sil, 0x08, 0x31);*/
215         /* don't do much */
216         return;
217 }
218
219 /* set the SIL164 power state */
220 static void sil164_dpms(struct intel_dvo_device *dvo, int mode)
221 {
222         int ret;
223         unsigned char ch;
224
225         ret = sil164_readb(dvo, SIL164_REG8, &ch);
226         if (ret == false)
227                 return;
228
229         if (mode == DRM_MODE_DPMS_ON)
230                 ch |= SIL164_8_PD;
231         else
232                 ch &= ~SIL164_8_PD;
233
234         sil164_writeb(dvo, SIL164_REG8, ch);
235         return;
236 }
237
238 static void sil164_dump_regs(struct intel_dvo_device *dvo)
239 {
240         uint8_t val;
241
242         sil164_readb(dvo, SIL164_FREQ_LO, &val);
243         DRM_DEBUG("SIL164_FREQ_LO: 0x%02x\n", val);
244         sil164_readb(dvo, SIL164_FREQ_HI, &val);
245         DRM_DEBUG("SIL164_FREQ_HI: 0x%02x\n", val);
246         sil164_readb(dvo, SIL164_REG8, &val);
247         DRM_DEBUG("SIL164_REG8: 0x%02x\n", val);
248         sil164_readb(dvo, SIL164_REG9, &val);
249         DRM_DEBUG("SIL164_REG9: 0x%02x\n", val);
250         sil164_readb(dvo, SIL164_REGC, &val);
251         DRM_DEBUG("SIL164_REGC: 0x%02x\n", val);
252 }
253
254 static void sil164_save(struct intel_dvo_device *dvo)
255 {
256         struct sil164_priv *sil= dvo->dev_priv;
257
258         if (!sil164_readb(dvo, SIL164_REG8, &sil->save_regs.reg8))
259                 return;
260
261         if (!sil164_readb(dvo, SIL164_REG9, &sil->save_regs.reg9))
262                 return;
263
264         if (!sil164_readb(dvo, SIL164_REGC, &sil->save_regs.regc))
265                 return;
266
267         return;
268 }
269
270 static void sil164_restore(struct intel_dvo_device *dvo)
271 {
272         struct sil164_priv *sil = dvo->dev_priv;
273
274         /* Restore it powered down initially */
275         sil164_writeb(dvo, SIL164_REG8, sil->save_regs.reg8 & ~0x1);
276
277         sil164_writeb(dvo, SIL164_REG9, sil->save_regs.reg9);
278         sil164_writeb(dvo, SIL164_REGC, sil->save_regs.regc);
279         sil164_writeb(dvo, SIL164_REG8, sil->save_regs.reg8);
280 }
281
282 static void sil164_destroy(struct intel_dvo_device *dvo)
283 {
284         struct sil164_priv *sil = dvo->dev_priv;
285
286         if (sil) {
287                 kfree(sil);
288                 dvo->dev_priv = NULL;
289         }
290 }
291
292 struct intel_dvo_dev_ops sil164_ops = {
293         .init = sil164_init,
294         .detect = sil164_detect,
295         .mode_valid = sil164_mode_valid,
296         .mode_set = sil164_mode_set,
297         .dpms = sil164_dpms,
298         .dump_regs = sil164_dump_regs,
299         .save = sil164_save,
300         .restore = sil164_restore,
301         .destroy = sil164_destroy,
302 };