2 * linux/arch/i386/kernel/head.S -- the 32-bit startup code.
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Enhanced CPU detection and feature setting code by Mike Jagdis
7 * and Martin Mares, November 1997.
11 #include <linux/threads.h>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/segment.h>
16 #include <asm/pgtable.h>
18 #include <asm/cache.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/setup.h>
22 #include <asm/processor-flags.h>
24 /* Physical address */
25 #define pa(X) ((X) - __PAGE_OFFSET)
28 * References to members of the new_cpu_data structure.
31 #define X86 new_cpu_data+CPUINFO_x86
32 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
33 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
34 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
35 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
36 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
37 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
38 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
41 * This is how much memory *in addition to the memory covered up to
42 * and including _end* we need mapped initially.
44 * - one bit for each possible page, but only in low memory, which means
45 * 2^32/4096/8 = 128K worst case (4G/4G split.)
46 * - enough space to map all low memory, which means
47 * (2^32/4096) / 1024 pages (worst case, non PAE)
48 * (2^32/4096) / 512 + 4 pages (worst case for PAE)
49 * - a few pages for allocator use before the kernel pagetable has
52 * Modulo rounding, each megabyte assigned here requires a kilobyte of
53 * memory, which is currently unreclaimed.
55 * This should be a multiple of a page.
57 LOW_PAGES = 1<<(32-PAGE_SHIFT_asm)
60 * To preserve the DMA pool in PAGEALLOC kernels, we'll allocate
61 * pagetables from above the 16MB DMA limit, so we'll have to set
62 * up pagetables 16MB more (worst-case):
64 #ifdef CONFIG_DEBUG_PAGEALLOC
65 LOW_PAGES = LOW_PAGES + 0x1000000
69 PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD
71 PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD)
73 BOOTBITMAP_SIZE = LOW_PAGES / 8
76 INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm
79 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
80 * %esi points to the real-mode code as a 32-bit pointer.
81 * CS and DS must be 4 GB flat segments, but we don't depend on
82 * any particular GDT layout, because we load our own as soon as we
85 .section .text.head,"ax",@progbits
87 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
88 us to not reload segments */
89 testb $(1<<6), BP_loadflags(%esi)
93 * Set segments to known values.
95 lgdt pa(boot_gdt_descr)
96 movl $(__BOOT_DS),%eax
104 * Clear BSS first so that there are no surprises...
108 movl $pa(__bss_start),%edi
109 movl $pa(__bss_stop),%ecx
114 * Copy bootup parameters out of the way.
115 * Note: %esi still has the pointer to the real-mode data.
116 * With the kexec as boot loader, parameter segment might be loaded beyond
117 * kernel image and might not even be addressable by early boot page tables.
118 * (kexec on panic case). Hence copy out the parameters before initializing
121 movl $pa(boot_params),%edi
122 movl $(PARAM_SIZE/4),%ecx
126 movl pa(boot_params) + NEW_CL_POINTER,%esi
128 jz 1f # No comand line
129 movl $pa(boot_command_line),%edi
130 movl $(COMMAND_LINE_SIZE/4),%ecx
135 #ifdef CONFIG_PARAVIRT
136 /* This is can only trip for a broken bootloader... */
137 cmpw $0x207, pa(boot_params + BP_version)
140 /* Paravirt-compatible boot parameters. Look to see what architecture
141 we're booting under. */
142 movl pa(boot_params + BP_hardware_subarch), %eax
143 cmpl $num_subarch_entries, %eax
146 movl pa(subarch_entries)(,%eax,4), %eax
147 subl $__PAGE_OFFSET, %eax
153 /* Unknown implementation; there's really
154 nothing we can do at this point. */
160 .long default_entry /* normal x86/PC */
161 .long lguest_entry /* lguest hypervisor */
162 .long xen_entry /* Xen hypervisor */
163 num_subarch_entries = (. - subarch_entries) / 4
165 #endif /* CONFIG_PARAVIRT */
168 * Initialize page tables. This creates a PDE and a set of page
169 * tables, which are located immediately beyond _end. The variable
170 * init_pg_tables_end is set up to point to the first "safe" location.
171 * Mappings are created both at virtual address 0 (identity mapping)
172 * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
174 * Note that the stack is not yet set up!
176 #define PTE_ATTR 0x007 /* PRESENT+RW+USER */
177 #define PDE_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
178 #define PGD_ATTR 0x001 /* PRESENT (no other attributes) */
181 #ifdef CONFIG_X86_PAE
184 * In PAE mode swapper_pg_dir is statically defined to contain enough
185 * entries to cover the VMSPLIT option (that is the top 1, 2 or 3
186 * entries). The identity mapping is handled by pointing two PGD
187 * entries to the first kernel PMD.
189 * Note the upper half of each PMD or PTE are always zero at
193 #define KPMDS ((0x100000000-__PAGE_OFFSET) >> 30) /* Number of kernel PMDs */
195 xorl %ebx,%ebx /* %ebx is kept at zero */
198 movl $pa(swapper_pg_pmd), %edx
201 leal PDE_ATTR(%edi),%ecx /* Create PMD entry */
202 movl %ecx,(%edx) /* Store PMD entry */
203 /* Upper half already zero */
215 * End condition: we must map up to and including INIT_MAP_BEYOND_END
216 * bytes beyond the end of our own page tables.
218 leal (INIT_MAP_BEYOND_END+PTE_ATTR)(%edi),%ebp
222 movl %edi,pa(init_pg_tables_end)
224 /* Do early initialization of the fixmap area */
225 movl $pa(swapper_pg_fixmap)+PDE_ATTR,%eax
226 movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8)
229 page_pde_offset = (__PAGE_OFFSET >> 20);
232 movl $pa(swapper_pg_dir), %edx
235 leal PDE_ATTR(%edi),%ecx /* Create PDE entry */
236 movl %ecx,(%edx) /* Store identity PDE entry */
237 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
245 * End condition: we must map up to and including INIT_MAP_BEYOND_END
246 * bytes beyond the end of our own page tables; the +0x007 is
249 leal (INIT_MAP_BEYOND_END+PTE_ATTR)(%edi),%ebp
252 movl %edi,pa(init_pg_tables_end)
254 /* Do early initialization of the fixmap area */
255 movl $pa(swapper_pg_fixmap)+PDE_ATTR,%eax
256 movl %eax,pa(swapper_pg_dir+0xffc)
260 * Non-boot CPU entry point; entered from trampoline.S
261 * We can't lgdt here, because lgdt itself uses a data segment, but
262 * we know the trampoline has already loaded the boot_gdt for us.
264 * If cpu hotplug is not supported then this code can go in init section
265 * which will be freed later
268 #ifndef CONFIG_HOTPLUG_CPU
269 .section .init.text,"ax",@progbits
273 ENTRY(startup_32_smp)
275 movl $(__BOOT_DS),%eax
280 #endif /* CONFIG_SMP */
284 * New page tables may be in 4Mbyte page mode and may
285 * be using the global pages.
287 * NOTE! If we are on a 486 we may have no cr4 at all!
288 * So we do not try to touch it unless we really have
289 * some bits in it to set. This won't work if the BSP
290 * implements cr4 but this AP does not -- very unlikely
291 * but be warned! The same applies to the pse feature
292 * if not equally supported. --macro
294 * NOTE! We have to correct for the fact that we're
295 * not yet offset PAGE_OFFSET..
297 #define cr4_bits pa(mmu_cr4_features)
301 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
305 btl $5, %eax # check if PAE is enabled
308 /* Check if extended functions are implemented */
309 movl $0x80000000, %eax
311 cmpl $0x80000000, %eax
313 mov $0x80000001, %eax
315 /* Execute Disable bit supported? */
319 /* Setup EFER (Extended Feature Enable Register) */
320 movl $0xc0000080, %ecx
324 /* Make changes effective */
332 movl $pa(swapper_pg_dir),%eax
333 movl %eax,%cr3 /* set the page table pointer.. */
336 movl %eax,%cr0 /* ..and set paging (PG) bit */
337 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
339 /* Set up the stack pointer */
343 * Initialize eflags. Some BIOS's leave bits like NT set. This would
344 * confuse the debugger if this code is traced.
345 * XXX - best to initialize before switching to protected mode.
352 jz 1f /* Initial CPU cleans BSS */
355 #endif /* CONFIG_SMP */
358 * start system 32-bit setup. We need to re-do some of the things done
359 * in 16-bit mode for the "real" operations.
365 movl $-1,X86_CPUID # -1 for no CPUID initially
367 /* check if it is 486 or 386. */
369 * XXX - this does a lot of unnecessary setup. Alignment checks don't
370 * apply at our cpl of 0 and the stack ought to be aligned already, and
371 * we don't need to preserve eflags.
374 movb $3,X86 # at least 386
376 popl %eax # get EFLAGS
377 movl %eax,%ecx # save original EFLAGS
378 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
379 pushl %eax # copy to EFLAGS
381 pushfl # get new EFLAGS
382 popl %eax # put it in eax
383 xorl %ecx,%eax # change in flags
384 pushl %ecx # restore original EFLAGS
386 testl $0x40000,%eax # check if AC bit changed
389 movb $4,X86 # at least 486
390 testl $0x200000,%eax # check if ID bit changed
393 /* get vendor info */
394 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
396 movl %eax,X86_CPUID # save CPUID level
397 movl %ebx,X86_VENDOR_ID # lo 4 chars
398 movl %edx,X86_VENDOR_ID+4 # next 4 chars
399 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
401 orl %eax,%eax # do we have processor info as well?
404 movl $1,%eax # Use the CPUID instruction to get CPU type
406 movb %al,%cl # save reg for future use
407 andb $0x0f,%ah # mask processor family
409 andb $0xf0,%al # mask model
412 andb $0x0f,%cl # mask mask revision
414 movl %edx,X86_CAPABILITY
416 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
419 is386: movl $2,%ecx # set MP
421 andl $0x80000011,%eax # Save PG,PE,ET
428 ljmp $(__KERNEL_CS),$1f
429 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
430 movl %eax,%ss # after changing gdt.
431 movl %eax,%fs # gets reset once there's real percpu
433 movl $(__USER_DS),%eax # DS/ES contains default USER segment
437 xorl %eax,%eax # Clear GS and LDT
441 cld # gcc2 wants the direction flag cleared at all times
442 pushl $0 # fake return address for unwinder
446 cmpb $0,%cl # the first CPU calls start_kernel
448 movl $(__KERNEL_PERCPU), %eax
449 movl %eax,%fs # set this cpu's percpu
450 jmp initialize_secondary # all other CPUs call initialize_secondary
452 #endif /* CONFIG_SMP */
456 * We depend on ET to be correct. This checks for 287/387.
459 movb $0,X86_HARD_MATH
465 movl %cr0,%eax /* no coprocessor: have to set bits */
466 xorl $4,%eax /* set EM */
470 1: movb $1,X86_HARD_MATH
471 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
477 * sets up a idt with 256 entries pointing to
478 * ignore_int, interrupt gates. It doesn't actually load
479 * idt - that can be done only after paging has been enabled
480 * and the kernel moved to PAGE_OFFSET. Interrupts
481 * are enabled elsewhere, when we can be relatively
482 * sure everything is ok.
484 * Warning: %esi is live across this function.
488 movl $(__KERNEL_CS << 16),%eax
489 movw %dx,%ax /* selector = 0x0010 = cs */
490 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
501 .macro set_early_handler handler,trapno
503 movl $(__KERNEL_CS << 16),%eax
505 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
507 movl %eax,8*\trapno(%edi)
508 movl %edx,8*\trapno+4(%edi)
511 set_early_handler handler=early_divide_err,trapno=0
512 set_early_handler handler=early_illegal_opcode,trapno=6
513 set_early_handler handler=early_protection_fault,trapno=13
514 set_early_handler handler=early_page_fault,trapno=14
520 pushl $0 /* fake errcode */
523 early_illegal_opcode:
525 pushl $0 /* fake errcode */
528 early_protection_fault:
540 movl $(__KERNEL_DS),%eax
543 cmpl $2,early_recursion_flag
545 incl early_recursion_flag
548 pushl %edx /* trapno */
550 #ifdef CONFIG_EARLY_PRINTK
561 /* This is the default interrupt "handler" :-) */
571 movl $(__KERNEL_DS),%eax
574 cmpl $2,early_recursion_flag
576 incl early_recursion_flag
582 #ifdef CONFIG_EARLY_PRINTK
598 * Real beginning of normal "text" segment
606 .section ".bss.page_aligned","wa"
608 #ifdef CONFIG_X86_PAE
609 ENTRY(swapper_pg_pmd)
612 ENTRY(swapper_pg_dir)
617 ENTRY(empty_zero_page)
620 * This starts the data section.
622 #ifdef CONFIG_X86_PAE
623 .section ".data.page_aligned","wa"
624 /* Page-aligned for the benefit of paravirt? */
626 ENTRY(swapper_pg_dir)
627 .long pa(swapper_pg_pmd+PGD_ATTR),0 /* low identity map */
629 .long pa(swapper_pg_pmd+PGD_ATTR),0
630 .long pa(swapper_pg_pmd+PGD_ATTR+0x1000),0
631 .long pa(swapper_pg_pmd+PGD_ATTR+0x2000),0
634 .long pa(swapper_pg_pmd+PGD_ATTR),0
635 .long pa(swapper_pg_pmd+PGD_ATTR+0x1000),0
639 .long pa(swapper_pg_pmd+PGD_ATTR),0
641 # error "Kernel PMDs should be 1, 2 or 3"
643 .align PAGE_SIZE_asm /* needs to be page-sized too */
648 .long init_thread_union+THREAD_SIZE
653 early_recursion_flag:
657 .asciz "Unknown interrupt or fault at EIP %p %p %p\n"
661 /* fault info: */ "BUG: Int %d: CR2 %p\n" \
662 /* pusha regs: */ " EDI %p ESI %p EBP %p ESP %p\n" \
663 " EBX %p EDX %p ECX %p EAX %p\n" \
664 /* fault frame: */ " err %p EIP %p CS %p flg %p\n" \
666 "Stack: %p %p %p %p %p %p %p %p\n" \
667 " %p %p %p %p %p %p %p %p\n" \
668 " %p %p %p %p %p %p %p %p\n"
670 #include "../../x86/xen/xen-head.S"
673 * The IDT and GDT 'descriptors' are a strange 48-bit object
674 * only used by the lidt and lgdt instructions. They are not
675 * like usual segment descriptors - they consist of a 16-bit
676 * segment size, and 32-bit linear address value:
679 .globl boot_gdt_descr
683 # early boot GDT descriptor (must use 1:1 address mapping)
684 .word 0 # 32 bit align gdt_desc.address
687 .long boot_gdt - __PAGE_OFFSET
689 .word 0 # 32-bit align idt_desc.address
691 .word IDT_ENTRIES*8-1 # idt contains 256 entries
694 # boot GDT descriptor (later on used by CPU#0):
695 .word 0 # 32 bit align gdt_desc.address
696 ENTRY(early_gdt_descr)
697 .word GDT_ENTRIES*8-1
698 .long per_cpu__gdt_page /* Overwritten for secondary CPUs */
701 * The boot_gdt must mirror the equivalent in setup.S and is
702 * used only for booting.
704 .align L1_CACHE_BYTES
706 .fill GDT_ENTRY_BOOT_CS,8,0
707 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
708 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */