2 * asm-ia64/rwsem.h: R/W semaphores for ia64
4 * Copyright (C) 2003 Ken Chen <kenneth.w.chen@intel.com>
5 * Copyright (C) 2003 Asit Mallick <asit.k.mallick@intel.com>
6 * Copyright (C) 2005 Christoph Lameter <clameter@sgi.com>
8 * Based on asm-i386/rwsem.h and other architecture implementation.
10 * The MSW of the count is the negated number of active writers and
11 * waiting lockers, and the LSW is the total number of active locks.
13 * The lock count is initialized to 0 (no active and no waiting lockers).
15 * When a writer subtracts WRITE_BIAS, it'll get 0xffffffff00000001 for
16 * the case of an uncontended lock. Readers increment by 1 and see a positive
17 * value when uncontended, negative if there are writers (and maybe) readers
18 * waiting (in which case it goes to sleep).
21 #ifndef _ASM_IA64_RWSEM_H
22 #define _ASM_IA64_RWSEM_H
24 #include <linux/list.h>
25 #include <linux/spinlock.h>
27 #include <asm/intrinsics.h>
30 * the semaphore definition
35 struct list_head wait_list;
41 #define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000)
42 #define RWSEM_ACTIVE_BIAS __IA64_UL_CONST(0x0000000000000001)
43 #define RWSEM_ACTIVE_MASK __IA64_UL_CONST(0x00000000ffffffff)
44 #define RWSEM_WAITING_BIAS -__IA64_UL_CONST(0x0000000100000000)
45 #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
46 #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
52 #define __RWSEM_DEBUG_INIT , 0
54 #define __RWSEM_DEBUG_INIT /* */
57 #define __RWSEM_INITIALIZER(name) \
58 { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
59 LIST_HEAD_INIT((name).wait_list) \
62 #define DECLARE_RWSEM(name) \
63 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
65 extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
66 extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
67 extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
68 extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
71 init_rwsem (struct rw_semaphore *sem)
73 sem->count = RWSEM_UNLOCKED_VALUE;
74 spin_lock_init(&sem->wait_lock);
75 INIT_LIST_HEAD(&sem->wait_list);
85 __down_read (struct rw_semaphore *sem)
87 long result = ia64_fetchadd8_acq((unsigned long *)&sem->count, 1);
90 rwsem_down_read_failed(sem);
97 __down_write (struct rw_semaphore *sem)
103 new = old + RWSEM_ACTIVE_WRITE_BIAS;
104 } while (cmpxchg_acq(&sem->count, old, new) != old);
107 rwsem_down_write_failed(sem);
111 * unlock after reading
114 __up_read (struct rw_semaphore *sem)
116 long result = ia64_fetchadd8_rel((unsigned long *)&sem->count, -1);
118 if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0)
123 * unlock after writing
126 __up_write (struct rw_semaphore *sem)
132 new = old - RWSEM_ACTIVE_WRITE_BIAS;
133 } while (cmpxchg_rel(&sem->count, old, new) != old);
135 if (new < 0 && (new & RWSEM_ACTIVE_MASK) == 0)
140 * trylock for reading -- returns 1 if successful, 0 if contention
143 __down_read_trylock (struct rw_semaphore *sem)
146 while ((tmp = sem->count) >= 0) {
147 if (tmp == cmpxchg_acq(&sem->count, tmp, tmp+1)) {
155 * trylock for writing -- returns 1 if successful, 0 if contention
158 __down_write_trylock (struct rw_semaphore *sem)
160 long tmp = cmpxchg_acq(&sem->count, RWSEM_UNLOCKED_VALUE,
161 RWSEM_ACTIVE_WRITE_BIAS);
162 return tmp == RWSEM_UNLOCKED_VALUE;
166 * downgrade write lock to read lock
169 __downgrade_write (struct rw_semaphore *sem)
175 new = old - RWSEM_WAITING_BIAS;
176 } while (cmpxchg_rel(&sem->count, old, new) != old);
179 rwsem_downgrade_wake(sem);
183 * Implement atomic add functionality. These used to be "inline" functions, but GCC v3.1
184 * doesn't quite optimize this stuff right and ends up with bad calls to fetchandadd.
186 #define rwsem_atomic_add(delta, sem) atomic64_add(delta, (atomic64_t *)(&(sem)->count))
187 #define rwsem_atomic_update(delta, sem) atomic64_add_return(delta, (atomic64_t *)(&(sem)->count))
189 static inline int rwsem_is_locked(struct rw_semaphore *sem)
191 return (sem->count != 0);
194 #endif /* _ASM_IA64_RWSEM_H */