1 #ifndef __ASM_SH_BITOPS_OP32_H
2 #define __ASM_SH_BITOPS_OP32_H
5 * The bit modifying instructions on SH-2A are only capable of working
6 * with a 3-bit immediate, which signifies the shift position for the bit
9 #if defined(__BIG_ENDIAN)
10 #define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
11 #define BYTE_NUMBER(nr) ((nr ^ BITOP_LE_SWIZZLE) / BITS_PER_BYTE)
12 #define BYTE_OFFSET(nr) ((nr ^ BITOP_LE_SWIZZLE) % BITS_PER_BYTE)
14 #define BYTE_NUMBER(nr) ((nr) / BITS_PER_BYTE)
15 #define BYTE_OFFSET(nr) ((nr) % BITS_PER_BYTE)
18 #define IS_IMMEDIATE(nr) (__builtin_constant_p(nr))
20 static inline void __set_bit(int nr, volatile unsigned long *addr)
22 if (IS_IMMEDIATE(nr)) {
23 __asm__ __volatile__ (
24 "bset.b %1, @(%O2,%0) ! __set_bit\n\t"
26 : "i" (BYTE_OFFSET(nr)), "i" (BYTE_NUMBER(nr))
30 unsigned long mask = BIT_MASK(nr);
31 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
37 static inline void __clear_bit(int nr, volatile unsigned long *addr)
39 if (IS_IMMEDIATE(nr)) {
40 __asm__ __volatile__ (
41 "bclr.b %1, @(%O2,%0) ! __clear_bit\n\t"
43 : "i" (BYTE_OFFSET(nr)),
48 unsigned long mask = BIT_MASK(nr);
49 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
56 * __change_bit - Toggle a bit in memory
57 * @nr: the bit to change
58 * @addr: the address to start counting from
60 * Unlike change_bit(), this function is non-atomic and may be reordered.
61 * If it's called on the same region of memory simultaneously, the effect
62 * may be that only one operation succeeds.
64 static inline void __change_bit(int nr, volatile unsigned long *addr)
66 if (IS_IMMEDIATE(nr)) {
67 __asm__ __volatile__ (
68 "bxor.b %1, @(%O2,%0) ! __change_bit\n\t"
70 : "i" (BYTE_OFFSET(nr)),
75 unsigned long mask = BIT_MASK(nr);
76 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
83 * __test_and_set_bit - Set a bit and return its old value
85 * @addr: Address to count from
87 * This operation is non-atomic and can be reordered.
88 * If two examples of this operation race, one can appear to succeed
89 * but actually fail. You must protect multiple accesses with a lock.
91 static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
93 unsigned long mask = BIT_MASK(nr);
94 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
95 unsigned long old = *p;
98 return (old & mask) != 0;
102 * __test_and_clear_bit - Clear a bit and return its old value
104 * @addr: Address to count from
106 * This operation is non-atomic and can be reordered.
107 * If two examples of this operation race, one can appear to succeed
108 * but actually fail. You must protect multiple accesses with a lock.
110 static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
112 unsigned long mask = BIT_MASK(nr);
113 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
114 unsigned long old = *p;
117 return (old & mask) != 0;
120 /* WARNING: non atomic and it can be reordered! */
121 static inline int __test_and_change_bit(int nr,
122 volatile unsigned long *addr)
124 unsigned long mask = BIT_MASK(nr);
125 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
126 unsigned long old = *p;
129 return (old & mask) != 0;
133 * test_bit - Determine whether a bit is set
134 * @nr: bit number to test
135 * @addr: Address to start counting from
137 static inline int test_bit(int nr, const volatile unsigned long *addr)
139 return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
142 #endif /* __ASM_SH_BITOPS_OP32_H */