2 * This module supports the iSeries PCI bus interrupt handling
3 * Copyright (C) 20yy <Robert L Holtorf> <IBM Corp>
4 * Copyright (C) 2004-2005 IBM Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the:
18 * Free Software Foundation, Inc.,
19 * 59 Temple Place, Suite 330,
20 * Boston, MA 02111-1307 USA
23 * Created, December 13, 2000 by Wayne Holm
26 #include <linux/pci.h>
27 #include <linux/init.h>
28 #include <linux/threads.h>
29 #include <linux/smp.h>
30 #include <linux/param.h>
31 #include <linux/string.h>
32 #include <linux/bootmem.h>
33 #include <linux/ide.h>
34 #include <linux/irq.h>
35 #include <linux/spinlock.h>
38 #include <asm/iseries/hv_types.h>
39 #include <asm/iseries/hv_lp_event.h>
40 #include <asm/iseries/hv_call_xm.h>
41 #include <asm/iseries/it_lp_queue.h>
47 #if defined(CONFIG_SMP)
48 extern void iSeries_smp_message_recv(struct pt_regs *);
54 pe_bus_created = 0, /* PHB has been created */
55 pe_bus_error = 1, /* PHB has failed */
56 pe_bus_failed = 2, /* Msg to Secondary, Primary failed bus */
57 pe_node_failed = 4, /* Multi-adapter bridge has failed */
58 pe_node_recovered = 5, /* Multi-adapter bridge has recovered */
59 pe_bus_recovered = 12, /* PHB has been recovered */
60 pe_unquiese_bus = 18, /* Secondary bus unqiescing */
61 pe_bridge_error = 21, /* Bridge Error */
62 pe_slot_interrupt = 22 /* Slot interrupt */
66 struct HvLpEvent event;
68 u64 __align; /* Align on an 8-byte boundary */
71 HvBusNumber bus_number;
72 HvSubBusNumber sub_bus_number;
76 HvBusNumber bus_number;
77 HvSubBusNumber sub_bus_number;
80 HvBusNumber bus_number;
81 HvSubBusNumber sub_bus_number;
87 static DEFINE_SPINLOCK(pending_irqs_lock);
88 static int num_pending_irqs;
89 static int pending_irqs[NR_IRQS];
91 static void int_received(struct pci_event *event, struct pt_regs *regs)
95 switch (event->event.xSubtype) {
96 case pe_slot_interrupt:
97 irq = event->event.xCorrelationToken;
99 spin_lock(&pending_irqs_lock);
102 spin_unlock(&pending_irqs_lock);
104 printk(KERN_WARNING "int_received: bad irq number %d\n",
106 HvCallPci_eoi(event->data.slot.bus_number,
107 event->data.slot.sub_bus_number,
108 event->data.slot.dev_id);
111 /* Ignore error recovery events for now */
113 printk(KERN_INFO "int_received: system bus %d created\n",
114 event->data.bus.bus_number);
118 printk(KERN_INFO "int_received: system bus %d failed\n",
119 event->data.bus.bus_number);
121 case pe_bus_recovered:
122 case pe_unquiese_bus:
123 printk(KERN_INFO "int_received: system bus %d recovered\n",
124 event->data.bus.bus_number);
127 case pe_bridge_error:
129 "int_received: multi-adapter bridge %d/%d/%d failed\n",
130 event->data.node.bus_number,
131 event->data.node.sub_bus_number,
132 event->data.node.dev_id);
134 case pe_node_recovered:
136 "int_received: multi-adapter bridge %d/%d/%d recovered\n",
137 event->data.node.bus_number,
138 event->data.node.sub_bus_number,
139 event->data.node.dev_id);
143 "int_received: unrecognized event subtype 0x%x\n",
144 event->event.xSubtype);
149 static void pci_event_handler(struct HvLpEvent *event, struct pt_regs *regs)
151 if (event && (event->xType == HvLpEvent_Type_PciIo)) {
152 if (hvlpevent_is_int(event))
153 int_received((struct pci_event *)event, regs);
156 "pci_event_handler: unexpected ack received\n");
159 "pci_event_handler: Unrecognized PCI event type 0x%x\n",
162 printk(KERN_ERR "pci_event_handler: NULL event received\n");
165 #define REAL_IRQ_TO_SUBBUS(irq) (((irq) >> 14) & 0xff)
166 #define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1)
167 #define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1)
168 #define REAL_IRQ_TO_FUNC(irq) ((irq) & 7)
171 * This will be called by device drivers (via enable_IRQ)
172 * to enable INTA in the bridge interrupt status register.
174 static void iseries_enable_IRQ(unsigned int irq)
176 u32 bus, dev_id, function, mask;
177 const u32 sub_bus = 0;
178 unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
180 /* The IRQ has already been locked by the caller */
181 bus = REAL_IRQ_TO_BUS(rirq);
182 function = REAL_IRQ_TO_FUNC(rirq);
183 dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
185 /* Unmask secondary INTA */
187 HvCallPci_unmaskInterrupts(bus, sub_bus, dev_id, mask);
190 /* This is called by iseries_activate_IRQs */
191 static unsigned int iseries_startup_IRQ(unsigned int irq)
193 u32 bus, dev_id, function, mask;
194 const u32 sub_bus = 0;
195 unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
197 bus = REAL_IRQ_TO_BUS(rirq);
198 function = REAL_IRQ_TO_FUNC(rirq);
199 dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
201 /* Link the IRQ number to the bridge */
202 HvCallXm_connectBusUnit(bus, sub_bus, dev_id, irq);
204 /* Unmask bridge interrupts in the FISR */
205 mask = 0x01010000 << function;
206 HvCallPci_unmaskFisr(bus, sub_bus, dev_id, mask);
207 iseries_enable_IRQ(irq);
212 * This is called out of iSeries_fixup to activate interrupt
213 * generation for usable slots
215 void __init iSeries_activate_IRQs()
221 irq_desc_t *desc = get_irq_desc(irq);
223 if (desc && desc->chip && desc->chip->startup) {
224 spin_lock_irqsave(&desc->lock, flags);
225 desc->chip->startup(irq);
226 spin_unlock_irqrestore(&desc->lock, flags);
231 /* this is not called anywhere currently */
232 static void iseries_shutdown_IRQ(unsigned int irq)
234 u32 bus, dev_id, function, mask;
235 const u32 sub_bus = 0;
236 unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
238 /* irq should be locked by the caller */
239 bus = REAL_IRQ_TO_BUS(rirq);
240 function = REAL_IRQ_TO_FUNC(rirq);
241 dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
243 /* Invalidate the IRQ number in the bridge */
244 HvCallXm_connectBusUnit(bus, sub_bus, dev_id, 0);
246 /* Mask bridge interrupts in the FISR */
247 mask = 0x01010000 << function;
248 HvCallPci_maskFisr(bus, sub_bus, dev_id, mask);
252 * This will be called by device drivers (via disable_IRQ)
253 * to disable INTA in the bridge interrupt status register.
255 static void iseries_disable_IRQ(unsigned int irq)
257 u32 bus, dev_id, function, mask;
258 const u32 sub_bus = 0;
259 unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
261 /* The IRQ has already been locked by the caller */
262 bus = REAL_IRQ_TO_BUS(rirq);
263 function = REAL_IRQ_TO_FUNC(rirq);
264 dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
266 /* Mask secondary INTA */
268 HvCallPci_maskInterrupts(bus, sub_bus, dev_id, mask);
271 static void iseries_end_IRQ(unsigned int irq)
273 unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
275 HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq),
276 (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq));
279 static struct irq_chip iseries_pic = {
280 .typename = "iSeries irq controller",
281 .startup = iseries_startup_IRQ,
282 .shutdown = iseries_shutdown_IRQ,
283 .unmask = iseries_enable_IRQ,
284 .mask = iseries_disable_IRQ,
285 .eoi = iseries_end_IRQ
289 * This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot
290 * It calculates the irq value for the slot.
291 * Note that sub_bus is always 0 (at the moment at least).
293 int __init iSeries_allocate_IRQ(HvBusNumber bus,
294 HvSubBusNumber sub_bus, u32 bsubbus)
296 unsigned int realirq;
297 u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus);
298 u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus);
300 realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3)
303 return irq_create_mapping(NULL, realirq, IRQ_TYPE_NONE);
306 #endif /* CONFIG_PCI */
309 * Get the next pending IRQ.
311 unsigned int iSeries_get_irq(struct pt_regs *regs)
313 int irq = NO_IRQ_IGNORE;
316 if (get_lppaca()->int_dword.fields.ipi_cnt) {
317 get_lppaca()->int_dword.fields.ipi_cnt = 0;
318 iSeries_smp_message_recv(regs);
320 #endif /* CONFIG_SMP */
321 if (hvlpevent_is_pending())
322 process_hvlpevents(regs);
325 if (num_pending_irqs) {
326 spin_lock(&pending_irqs_lock);
327 for (irq = 0; irq < NR_IRQS; irq++) {
328 if (pending_irqs[irq]) {
334 spin_unlock(&pending_irqs_lock);
343 static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
344 irq_hw_number_t hw, unsigned int flags)
346 set_irq_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq);
351 static struct irq_host_ops iseries_irq_host_ops = {
352 .map = iseries_irq_host_map,
356 * This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c
357 * It must be called before the bus walk.
359 void __init iSeries_init_IRQ(void)
361 /* Register PCI event handler and open an event path */
362 struct irq_host *host;
366 * The Hypervisor only allows us up to 256 interrupt
367 * sources (the irq number is passed in a u8).
369 irq_set_virq_count(256);
371 /* Create irq host. No need for a revmap since HV will give us
372 * back our virtual irq number
374 host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, 0, &iseries_irq_host_ops, 0);
375 BUG_ON(host == NULL);
376 irq_set_default_host(host);
378 ret = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo,
381 ret = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0);
383 printk(KERN_ERR "iseries_init_IRQ: open event path "
384 "failed with rc 0x%x\n", ret);
386 printk(KERN_ERR "iseries_init_IRQ: register handler "
387 "failed with rc 0x%x\n", ret);