git.oblomov.eu Git - linux-2.6/blob - drivers/media/dvb/frontends/or51132.c

   1 /*
   2  *    Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
   5  *
   6  *    Based on code from Jack Kelliher (kelliher@xmission.com)
   7  *                           Copyright (C) 2002 & pcHDTV, inc.
   8  *
   9  *    This program is free software; you can redistribute it and/or modify
  10  *    it under the terms of the GNU General Public License as published by
  11  *    the Free Software Foundation; either version 2 of the License, or
  12  *    (at your option) any later version.
  13  *
  14  *    This program is distributed in the hope that it will be useful,
  15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *    GNU General Public License for more details.
  18  *
  19  *    You should have received a copy of the GNU General Public License
  20  *    along with this program; if not, write to the Free Software
  21  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23 */
  24
  25 /*
  26  * This driver needs two external firmware files. Please copy
  27  * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
  28  * /usr/lib/hotplug/firmware/ or /lib/firmware/
  29  * (depending on configuration of firmware hotplug).
  30  */
  31 #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
  32 #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
  33
  34 #include <linux/kernel.h>
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/init.h>
  38 #include <linux/delay.h>
  39 #include <asm/byteorder.h>
  40
  41 #include "dvb_frontend.h"
  42 #include "dvb-pll.h"
  43 #include "or51132.h"
  44
  45 static int debug;
  46 #define dprintk(args...) \
  47         do { \
  48                 if (debug) printk(KERN_DEBUG "or51132: " args); \
  49         } while (0)
  50
  51
  52 struct or51132_state
  53 {
  54         struct i2c_adapter* i2c;
  55         struct dvb_frontend_ops ops;
  56
  57         /* Configuration settings */
  58         const struct or51132_config* config;
  59
  60         struct dvb_frontend frontend;
  61
  62         /* Demodulator private data */
  63         fe_modulation_t current_modulation;
  64
  65         /* Tuner private data */
  66         u32 current_frequency;
  67 };
  68
  69 static int i2c_writebytes (struct or51132_state* state, u8 reg, u8 *buf, int len)
  70 {
  71         int err;
  72         struct i2c_msg msg;
  73         msg.addr  = reg;
  74         msg.flags = 0;
  75         msg.len   = len;
  76         msg.buf   = buf;
  77
  78         if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  79                 printk(KERN_WARNING "or51132: i2c_writebytes error (addr %02x, err == %i)\n", reg, err);
  80                 return -EREMOTEIO;
  81         }
  82
  83         return 0;
  84 }
  85
  86 static u8 i2c_readbytes (struct or51132_state* state, u8 reg, u8* buf, int len)
  87 {
  88         int err;
  89         struct i2c_msg msg;
  90         msg.addr   = reg;
  91         msg.flags = I2C_M_RD;
  92         msg.len = len;
  93         msg.buf = buf;
  94
  95         if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  96                 printk(KERN_WARNING "or51132: i2c_readbytes error (addr %02x, err == %i)\n", reg, err);
  97                 return -EREMOTEIO;
  98         }
  99
 100         return 0;
 101 }
 102
 103 static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 104 {
 105         struct or51132_state* state = fe->demodulator_priv;
 106         static u8 run_buf[] = {0x7F,0x01};
 107         static u8 get_ver_buf[] = {0x04,0x00,0x30,0x00,0x00};
 108         u8 rec_buf[14];
 109         u8 cmd_buf[14];
 110         u32 firmwareAsize, firmwareBsize;
 111         int i,ret;
 112
 113         dprintk("Firmware is %Zd bytes\n",fw->size);
 114
 115         /* Get size of firmware A and B */
 116         firmwareAsize = le32_to_cpu(*((u32*)fw->data));
 117         dprintk("FirmwareA is %i bytes\n",firmwareAsize);
 118         firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
 119         dprintk("FirmwareB is %i bytes\n",firmwareBsize);
 120
 121         /* Upload firmware */
 122         if ((ret = i2c_writebytes(state,state->config->demod_address,
 123                                  &fw->data[8],firmwareAsize))) {
 124                 printk(KERN_WARNING "or51132: load_firmware error 1\n");
 125                 return ret;
 126         }
 127         msleep(1); /* 1ms */
 128         if ((ret = i2c_writebytes(state,state->config->demod_address,
 129                                  &fw->data[8+firmwareAsize],firmwareBsize))) {
 130                 printk(KERN_WARNING "or51132: load_firmware error 2\n");
 131                 return ret;
 132         }
 133         msleep(1); /* 1ms */
 134
 135         if ((ret = i2c_writebytes(state,state->config->demod_address,
 136                                  run_buf,2))) {
 137                 printk(KERN_WARNING "or51132: load_firmware error 3\n");
 138                 return ret;
 139         }
 140
 141         /* Wait at least 5 msec */
 142         msleep(20); /* 10ms */
 143
 144         if ((ret = i2c_writebytes(state,state->config->demod_address,
 145                                  run_buf,2))) {
 146                 printk(KERN_WARNING "or51132: load_firmware error 4\n");
 147                 return ret;
 148         }
 149
 150         /* 50ms for operation to begin */
 151         msleep(50);
 152
 153         /* Read back ucode version to besure we loaded correctly and are really up and running */
 154         /* Get uCode version */
 155         cmd_buf[0] = 0x10;
 156         cmd_buf[1] = 0x10;
 157         cmd_buf[2] = 0x00;
 158         cmd_buf[3] = 0x00;
 159         msleep(20); /* 20ms */
 160         if ((ret = i2c_writebytes(state,state->config->demod_address,
 161                                  cmd_buf,3))) {
 162                 printk(KERN_WARNING "or51132: load_firmware error a\n");
 163                 return ret;
 164         }
 165
 166         cmd_buf[0] = 0x04;
 167         cmd_buf[1] = 0x17;
 168         cmd_buf[2] = 0x00;
 169         cmd_buf[3] = 0x00;
 170         msleep(20); /* 20ms */
 171         if ((ret = i2c_writebytes(state,state->config->demod_address,
 172                                  cmd_buf,2))) {
 173                 printk(KERN_WARNING "or51132: load_firmware error b\n");
 174                 return ret;
 175         }
 176
 177         cmd_buf[0] = 0x00;
 178         cmd_buf[1] = 0x00;
 179         cmd_buf[2] = 0x00;
 180         cmd_buf[3] = 0x00;
 181         msleep(20); /* 20ms */
 182         if ((ret = i2c_writebytes(state,state->config->demod_address,
 183                                  cmd_buf,2))) {
 184                 printk(KERN_WARNING "or51132: load_firmware error c\n");
 185                 return ret;
 186         }
 187
 188         for(i=0;i<4;i++) {
 189                 msleep(20); /* 20ms */
 190                 get_ver_buf[4] = i+1;
 191                 if ((ret = i2c_readbytes(state,state->config->demod_address,
 192                                         &rec_buf[i*2],2))) {
 193                         printk(KERN_WARNING
 194                                "or51132: load_firmware error d - %d\n",i);
 195                         return ret;
 196                 }
 197         }
 198
 199         printk(KERN_WARNING
 200                "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
 201                rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
 202                rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
 203                rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
 204                rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
 205
 206         cmd_buf[0] = 0x10;
 207         cmd_buf[1] = 0x00;
 208         cmd_buf[2] = 0x00;
 209         cmd_buf[3] = 0x00;
 210         msleep(20); /* 20ms */
 211         if ((ret = i2c_writebytes(state,state->config->demod_address,
 212                                  cmd_buf,3))) {
 213                 printk(KERN_WARNING "or51132: load_firmware error e\n");
 214                 return ret;
 215         }
 216         return 0;
 217 };
 218
 219 static int or51132_init(struct dvb_frontend* fe)
 220 {
 221         return 0;
 222 }
 223
 224 static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
 225 {
 226         *ber = 0;
 227         return 0;
 228 }
 229
 230 static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 231 {
 232         *ucblocks = 0;
 233         return 0;
 234 }
 235
 236 static int or51132_sleep(struct dvb_frontend* fe)
 237 {
 238         return 0;
 239 }
 240
 241 static int or51132_setmode(struct dvb_frontend* fe)
 242 {
 243         struct or51132_state* state = fe->demodulator_priv;
 244         unsigned char cmd_buf[4];
 245
 246         dprintk("setmode %d\n",(int)state->current_modulation);
 247         /* set operation mode in Receiver 1 register; */
 248         cmd_buf[0] = 0x04;
 249         cmd_buf[1] = 0x01;
 250         switch (state->current_modulation) {
 251         case QAM_256:
 252         case QAM_64:
 253         case QAM_AUTO:
 254                 /* Auto-deinterleave; MPEG ser, MPEG2tr, phase noise-high*/
 255                 cmd_buf[2] = 0x5F;
 256                 break;
 257         case VSB_8:
 258                 /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high*/
 259                 cmd_buf[2] = 0x50;
 260                 break;
 261         default:
 262                 printk("setmode:Modulation set to unsupported value\n");
 263         };
 264         cmd_buf[3] = 0x00;
 265         if (i2c_writebytes(state,state->config->demod_address,
 266                            cmd_buf,3)) {
 267                 printk(KERN_WARNING "or51132: set_mode error 1\n");
 268                 return -1;
 269         }
 270         dprintk("or51132: set #1 to %02x\n", cmd_buf[2]);
 271
 272         /* Set operation mode in Receiver 6 register */
 273         cmd_buf[0] = 0x1C;
 274         switch (state->current_modulation) {
 275         case QAM_AUTO:
 276                 /* REC MODE Normal Carrier Lock */
 277                 cmd_buf[1] = 0x00;
 278                 /* Channel MODE Auto QAM64/256 */
 279                 cmd_buf[2] = 0x4f;
 280                 break;
 281         case QAM_256:
 282                 /* REC MODE Normal Carrier Lock */
 283                 cmd_buf[1] = 0x00;
 284                 /* Channel MODE QAM256 */
 285                 cmd_buf[2] = 0x45;
 286                 break;
 287         case QAM_64:
 288                 /* REC MODE Normal Carrier Lock */
 289                 cmd_buf[1] = 0x00;
 290                 /* Channel MODE QAM64 */
 291                 cmd_buf[2] = 0x43;
 292                 break;
 293         case VSB_8:
 294                  /* REC MODE inv IF spectrum, Normal */
 295                 cmd_buf[1] = 0x03;
 296                 /* Channel MODE ATSC/VSB8 */
 297                 cmd_buf[2] = 0x06;
 298                 break;
 299         default:
 300                 printk("setmode: Modulation set to unsupported value\n");
 301         };
 302         cmd_buf[3] = 0x00;
 303         msleep(20); /* 20ms */
 304         if (i2c_writebytes(state,state->config->demod_address,
 305                            cmd_buf,3)) {
 306                 printk(KERN_WARNING "or51132: set_mode error 2\n");
 307                 return -1;
 308         }
 309         dprintk("or51132: set #6 to 0x%02x%02x\n", cmd_buf[1], cmd_buf[2]);
 310
 311         return 0;
 312 }
 313
 314 static int or51132_set_parameters(struct dvb_frontend* fe,
 315                                   struct dvb_frontend_parameters *param)
 316 {
 317         int ret;
 318         u8 buf[4];
 319         struct or51132_state* state = fe->demodulator_priv;
 320         const struct firmware *fw;
 321
 322         /* Change only if we are actually changing the modulation */
 323         if (state->current_modulation != param->u.vsb.modulation) {
 324                 switch(param->u.vsb.modulation) {
 325                 case VSB_8:
 326                         dprintk("set_parameters VSB MODE\n");
 327                         printk("or51132: Waiting for firmware upload(%s)...\n",
 328                                OR51132_VSB_FIRMWARE);
 329                         ret = request_firmware(&fw, OR51132_VSB_FIRMWARE,
 330                                                &state->i2c->dev);
 331                         if (ret){
 332                                 printk(KERN_WARNING "or51132: No firmware up"
 333                                        "loaded(timeout or file not found?)\n");
 334                                 return ret;
 335                         }
 336                         /* Set non-punctured clock for VSB */
 337                         state->config->set_ts_params(fe, 0);
 338                         break;
 339                 case QAM_AUTO:
 340                 case QAM_64:
 341                 case QAM_256:
 342                         dprintk("set_parameters QAM MODE\n");
 343                         printk("or51132: Waiting for firmware upload(%s)...\n",
 344                                OR51132_QAM_FIRMWARE);
 345                         ret = request_firmware(&fw, OR51132_QAM_FIRMWARE,
 346                                                &state->i2c->dev);
 347                         if (ret){
 348                                 printk(KERN_WARNING "or51132: No firmware up"
 349                                        "loaded(timeout or file not found?)\n");
 350                                 return ret;
 351                         }
 352                         /* Set punctured clock for QAM */
 353                         state->config->set_ts_params(fe, 1);
 354                         break;
 355                 default:
 356                         printk("or51132:Modulation type(%d) UNSUPPORTED\n",
 357                                param->u.vsb.modulation);
 358                         return -1;
 359                 };
 360                 ret = or51132_load_firmware(fe, fw);
 361                 release_firmware(fw);
 362                 if (ret) {
 363                         printk(KERN_WARNING "or51132: Writing firmware to "
 364                                "device failed!\n");
 365                         return ret;
 366                 }
 367                 printk("or51132: Firmware upload complete.\n");
 368
 369                 state->current_modulation = param->u.vsb.modulation;
 370                 or51132_setmode(fe);
 371         }
 372
 373         /* Change only if we are actually changing the channel */
 374         if (state->current_frequency != param->frequency) {
 375                 dvb_pll_configure(state->config->pll_desc, buf,
 376                                   param->frequency, 0);
 377                 dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
 378                         "0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
 379                 if (i2c_writebytes(state, state->config->pll_address ,buf, 4))
 380                         printk(KERN_WARNING "or51132: set_parameters error "
 381                                "writing to tuner\n");
 382
 383                 /* Set to current mode */
 384                 or51132_setmode(fe);
 385
 386                 /* Update current frequency */
 387                 state->current_frequency = param->frequency;
 388         }
 389         return 0;
 390 }
 391
 392 static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
 393 {
 394         struct or51132_state* state = fe->demodulator_priv;
 395         unsigned char rec_buf[2];
 396         unsigned char snd_buf[2];
 397         *status = 0;
 398
 399         /* Receiver Status */
 400         snd_buf[0]=0x04;
 401         snd_buf[1]=0x00;
 402         msleep(30); /* 30ms */
 403         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 404                 printk(KERN_WARNING "or51132: read_status write error\n");
 405                 return -1;
 406         }
 407         msleep(30); /* 30ms */
 408         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 409                 printk(KERN_WARNING "or51132: read_status read error\n");
 410                 return -1;
 411         }
 412         dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
 413
 414         if (rec_buf[1] & 0x01) { /* Receiver Lock */
 415                 *status |= FE_HAS_SIGNAL;
 416                 *status |= FE_HAS_CARRIER;
 417                 *status |= FE_HAS_VITERBI;
 418                 *status |= FE_HAS_SYNC;
 419                 *status |= FE_HAS_LOCK;
 420         }
 421         return 0;
 422 }
 423
 424 /* log10-1 table at .5 increments from 1 to 100.5 */
 425 static unsigned int i100x20log10[] = {
 426      0,  352,  602,  795,  954, 1088, 1204, 1306, 1397, 1480,
 427   1556, 1625, 1690, 1750, 1806, 1858, 1908, 1955, 2000, 2042,
 428   2082, 2121, 2158, 2193, 2227, 2260, 2292, 2322, 2352, 2380,
 429   2408, 2434, 2460, 2486, 2510, 2534, 2557, 2580, 2602, 2623,
 430   2644, 2664, 2684, 2704, 2723, 2742, 2760, 2778, 2795, 2813,
 431   2829, 2846, 2862, 2878, 2894, 2909, 2924, 2939, 2954, 2968,
 432   2982, 2996, 3010, 3023, 3037, 3050, 3062, 3075, 3088, 3100,
 433   3112, 3124, 3136, 3148, 3159, 3170, 3182, 3193, 3204, 3214,
 434   3225, 3236, 3246, 3256, 3266, 3276, 3286, 3296, 3306, 3316,
 435   3325, 3334, 3344, 3353, 3362, 3371, 3380, 3389, 3397, 3406,
 436   3415, 3423, 3432, 3440, 3448, 3456, 3464, 3472, 3480, 3488,
 437   3496, 3504, 3511, 3519, 3526, 3534, 3541, 3549, 3556, 3563,
 438   3570, 3577, 3584, 3591, 3598, 3605, 3612, 3619, 3625, 3632,
 439   3639, 3645, 3652, 3658, 3665, 3671, 3677, 3683, 3690, 3696,
 440   3702, 3708, 3714, 3720, 3726, 3732, 3738, 3744, 3750, 3755,
 441   3761, 3767, 3772, 3778, 3784, 3789, 3795, 3800, 3806, 3811,
 442   3816, 3822, 3827, 3832, 3838, 3843, 3848, 3853, 3858, 3863,
 443   3868, 3874, 3879, 3884, 3888, 3893, 3898, 3903, 3908, 3913,
 444   3918, 3922, 3927, 3932, 3936, 3941, 3946, 3950, 3955, 3960,
 445   3964, 3969, 3973, 3978, 3982, 3986, 3991, 3995, 4000, 4004,
 446 };
 447
 448 static unsigned int denom[] = {1,1,100,1000,10000,100000,1000000,10000000,100000000};
 449
 450 static unsigned int i20Log10(unsigned short val)
 451 {
 452         unsigned int rntval = 100;
 453         unsigned int tmp = val;
 454         unsigned int exp = 1;
 455
 456         while(tmp > 100) {tmp /= 100; exp++;}
 457
 458         val = (2 * val)/denom[exp];
 459         if (exp > 1) rntval = 2000*exp;
 460
 461         rntval += i100x20log10[val];
 462         return rntval;
 463 }
 464
 465 static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 466 {
 467         struct or51132_state* state = fe->demodulator_priv;
 468         unsigned char rec_buf[2];
 469         unsigned char snd_buf[2];
 470         u8 rcvr_stat;
 471         u16 snr_equ;
 472         int usK;
 473
 474         snd_buf[0]=0x04;
 475         snd_buf[1]=0x02; /* SNR after Equalizer */
 476         msleep(30); /* 30ms */
 477         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 478                 printk(KERN_WARNING "or51132: read_status write error\n");
 479                 return -1;
 480         }
 481         msleep(30); /* 30ms */
 482         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 483                 printk(KERN_WARNING "or51132: read_status read error\n");
 484                 return -1;
 485         }
 486         snr_equ = rec_buf[0] | (rec_buf[1] << 8);
 487         dprintk("read_signal_strength snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
 488
 489         /* Receiver Status */
 490         snd_buf[0]=0x04;
 491         snd_buf[1]=0x00;
 492         msleep(30); /* 30ms */
 493         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 494                 printk(KERN_WARNING "or51132: read_signal_strength read_status write error\n");
 495                 return -1;
 496         }
 497         msleep(30); /* 30ms */
 498         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 499                 printk(KERN_WARNING "or51132: read_signal_strength read_status read error\n");
 500                 return -1;
 501         }
 502         dprintk("read_signal_strength read_status %x %x\n",rec_buf[0],rec_buf[1]);
 503         rcvr_stat = rec_buf[1];
 504         usK = (rcvr_stat & 0x10) ? 3 : 0;
 505
 506         /* The value reported back from the frontend will be FFFF=100% 0000=0% */
 507         *strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000;
 508         dprintk("read_signal_strength %i\n",*strength);
 509
 510         return 0;
 511 }
 512
 513 static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
 514 {
 515         struct or51132_state* state = fe->demodulator_priv;
 516         unsigned char rec_buf[2];
 517         unsigned char snd_buf[2];
 518         u16 snr_equ;
 519
 520         snd_buf[0]=0x04;
 521         snd_buf[1]=0x02; /* SNR after Equalizer */
 522         msleep(30); /* 30ms */
 523         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 524                 printk(KERN_WARNING "or51132: read_snr write error\n");
 525                 return -1;
 526         }
 527         msleep(30); /* 30ms */
 528         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 529                 printk(KERN_WARNING "or51132: read_snr dvr read error\n");
 530                 return -1;
 531         }
 532         snr_equ = rec_buf[0] | (rec_buf[1] << 8);
 533         dprintk("read_snr snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
 534
 535         *snr = 0xFFFF - snr_equ;
 536         dprintk("read_snr %i\n",*snr);
 537
 538         return 0;
 539 }
 540
 541 static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
 542 {
 543         fe_tune_settings->min_delay_ms = 500;
 544         fe_tune_settings->step_size = 0;
 545         fe_tune_settings->max_drift = 0;
 546
 547         return 0;
 548 }
 549
 550 static void or51132_release(struct dvb_frontend* fe)
 551 {
 552         struct or51132_state* state = fe->demodulator_priv;
 553         kfree(state);
 554 }
 555
 556 static struct dvb_frontend_ops or51132_ops;
 557
 558 struct dvb_frontend* or51132_attach(const struct or51132_config* config,
 559                                     struct i2c_adapter* i2c)
 560 {
 561         struct or51132_state* state = NULL;
 562
 563         /* Allocate memory for the internal state */
 564         state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
 565         if (state == NULL)
 566                 goto error;
 567
 568         /* Setup the state */
 569         state->config = config;
 570         state->i2c = i2c;
 571         memcpy(&state->ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
 572         state->current_frequency = -1;
 573         state->current_modulation = -1;
 574
 575         /* Create dvb_frontend */
 576         state->frontend.ops = &state->ops;
 577         state->frontend.demodulator_priv = state;
 578         return &state->frontend;
 579
 580 error:
 581         if (state)
 582                 kfree(state);
 583         return NULL;
 584 }
 585
 586 static struct dvb_frontend_ops or51132_ops = {
 587
 588         .info = {
 589                 .name                   = "Oren OR51132 VSB/QAM Frontend",
 590                 .type                   = FE_ATSC,
 591                 .frequency_min          = 44000000,
 592                 .frequency_max          = 958000000,
 593                 .frequency_stepsize     = 166666,
 594                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 595                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 596                         FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
 597                         FE_CAN_8VSB
 598         },
 599
 600         .release = or51132_release,
 601
 602         .init = or51132_init,
 603         .sleep = or51132_sleep,
 604
 605         .set_frontend = or51132_set_parameters,
 606         .get_tune_settings = or51132_get_tune_settings,
 607
 608         .read_status = or51132_read_status,
 609         .read_ber = or51132_read_ber,
 610         .read_signal_strength = or51132_read_signal_strength,
 611         .read_snr = or51132_read_snr,
 612         .read_ucblocks = or51132_read_ucblocks,
 613 };
 614
 615 module_param(debug, int, 0644);
 616 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 617
 618 MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
 619 MODULE_AUTHOR("Kirk Lapray");
 620 MODULE_LICENSE("GPL");
 621
 622 EXPORT_SYMBOL(or51132_attach);
 623
 624 /*
 625  * Local variables:
 626  * c-basic-offset: 8
 627  * End:
 628  */