2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
9 #include <linux/config.h>
10 #include <linux/module.h>
11 #include <asm/sn/nodepda.h>
12 #include <asm/sn/addrs.h>
13 #include <asm/sn/arch.h>
14 #include <asm/sn/sn_cpuid.h>
15 #include <asm/sn/pda.h>
16 #include <asm/sn/shubio.h>
17 #include <asm/nodedata.h>
18 #include <asm/delay.h>
20 #include <linux/bootmem.h>
21 #include <linux/string.h>
22 #include <linux/sched.h>
24 #include <asm/sn/bte.h>
27 #define L1_CACHE_MASK (L1_CACHE_BYTES - 1)
30 /* two interfaces on two btes */
31 #define MAX_INTERFACES_TO_TRY 4
32 #define MAX_NODES_TO_TRY 2
34 static struct bteinfo_s *bte_if_on_node(nasid_t nasid, int interface)
36 nodepda_t *tmp_nodepda;
38 if (nasid_to_cnodeid(nasid) == -1)
39 return (struct bteinfo_s *)NULL;;
41 tmp_nodepda = NODEPDA(nasid_to_cnodeid(nasid));
42 return &tmp_nodepda->bte_if[interface];
46 static inline void bte_start_transfer(struct bteinfo_s *bte, u64 len, u64 mode)
49 BTE_CTRL_STORE(bte, (IBLS_BUSY | ((len) | (mode) << 24)));
51 BTE_LNSTAT_STORE(bte, len);
52 BTE_CTRL_STORE(bte, mode);
56 /************************************************************************
57 * Block Transfer Engine copy related functions.
59 ***********************************************************************/
62 * bte_copy(src, dest, len, mode, notification)
64 * Use the block transfer engine to move kernel memory from src to dest
65 * using the assigned mode.
68 * src - physical address of the transfer source.
69 * dest - physical address of the transfer destination.
70 * len - number of bytes to transfer from source to dest.
71 * mode - hardware defined. See reference information
72 * for IBCT0/1 in the SHUB Programmers Reference
73 * notification - kernel virtual address of the notification cache
74 * line. If NULL, the default is used and
75 * the bte_copy is synchronous.
77 * NOTE: This function requires src, dest, and len to
78 * be cacheline aligned.
80 bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
85 struct bteinfo_s *bte;
86 bte_result_t bte_status;
87 unsigned long irq_flags;
88 unsigned long itc_end = 0;
89 int nasid_to_try[MAX_NODES_TO_TRY];
90 int my_nasid = cpuid_to_nasid(raw_smp_processor_id());
91 int bte_if_index, nasid_index;
92 int bte_first, btes_per_node = BTES_PER_NODE;
94 BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n",
95 src, dest, len, mode, notification));
101 BUG_ON((len & L1_CACHE_MASK) ||
102 (src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK));
103 BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT)));
106 * Start with interface corresponding to cpu number
108 bte_first = raw_smp_processor_id() % btes_per_node;
110 if (mode & BTE_USE_DEST) {
111 /* try remote then local */
112 nasid_to_try[0] = NASID_GET(dest);
113 if (mode & BTE_USE_ANY) {
114 nasid_to_try[1] = my_nasid;
116 nasid_to_try[1] = (int)NULL;
119 /* try local then remote */
120 nasid_to_try[0] = my_nasid;
121 if (mode & BTE_USE_ANY) {
122 nasid_to_try[1] = NASID_GET(dest);
124 nasid_to_try[1] = (int)NULL;
130 local_irq_save(irq_flags);
132 bte_if_index = bte_first;
135 /* Attempt to lock one of the BTE interfaces. */
136 while (nasid_index < MAX_NODES_TO_TRY) {
137 bte = bte_if_on_node(nasid_to_try[nasid_index],bte_if_index);
144 if (spin_trylock(&bte->spinlock)) {
145 if (!(*bte->most_rcnt_na & BTE_WORD_AVAILABLE) ||
146 (BTE_LNSTAT_LOAD(bte) & BTE_ACTIVE)) {
147 /* Got the lock but BTE still busy */
148 spin_unlock(&bte->spinlock);
150 /* we got the lock and it's not busy */
155 bte_if_index = (bte_if_index + 1) % btes_per_node; /* Next interface */
156 if (bte_if_index == bte_first) {
158 * We've tried all interfaces on this node
170 local_irq_restore(irq_flags);
172 if (!(mode & BTE_WACQUIRE)) {
173 return BTEFAIL_NOTAVAIL;
177 if (notification == NULL) {
178 /* User does not want to be notified. */
179 bte->most_rcnt_na = &bte->notify;
181 bte->most_rcnt_na = notification;
184 /* Calculate the number of cache lines to transfer. */
185 transfer_size = ((len >> L1_CACHE_SHIFT) & BTE_LEN_MASK);
187 /* Initialize the notification to a known value. */
188 *bte->most_rcnt_na = BTE_WORD_BUSY;
189 notif_phys_addr = TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na));
192 src = SH2_TIO_PHYS_TO_DMA(src);
193 dest = SH2_TIO_PHYS_TO_DMA(dest);
194 notif_phys_addr = SH2_TIO_PHYS_TO_DMA(notif_phys_addr);
196 /* Set the source and destination registers */
197 BTE_PRINTKV(("IBSA = 0x%lx)\n", (TO_PHYS(src))));
198 BTE_SRC_STORE(bte, TO_PHYS(src));
199 BTE_PRINTKV(("IBDA = 0x%lx)\n", (TO_PHYS(dest))));
200 BTE_DEST_STORE(bte, TO_PHYS(dest));
202 /* Set the notification register */
203 BTE_PRINTKV(("IBNA = 0x%lx)\n", notif_phys_addr));
204 BTE_NOTIF_STORE(bte, notif_phys_addr);
206 /* Initiate the transfer */
207 BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode)));
208 bte_start_transfer(bte, transfer_size, BTE_VALID_MODE(mode));
210 itc_end = ia64_get_itc() + (40000000 * local_cpu_data->cyc_per_usec);
212 spin_unlock_irqrestore(&bte->spinlock, irq_flags);
214 if (notification != NULL) {
218 while ((transfer_stat = *bte->most_rcnt_na) == BTE_WORD_BUSY) {
220 if (ia64_get_itc() > itc_end) {
221 BTE_PRINTK(("BTE timeout nasid 0x%x bte%d IBLS = 0x%lx na 0x%lx\n",
222 NASID_GET(bte->bte_base_addr), bte->bte_num,
223 BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na) );
224 bte->bte_error_count++;
225 bte->bh_error = IBLS_ERROR;
226 bte_error_handler((unsigned long)NODEPDA(bte->bte_cnode));
227 *bte->most_rcnt_na = BTE_WORD_AVAILABLE;
232 BTE_PRINTKV((" Delay Done. IBLS = 0x%lx, most_rcnt_na = 0x%lx\n",
233 BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na));
235 if (transfer_stat & IBLS_ERROR) {
236 bte_status = transfer_stat & ~IBLS_ERROR;
238 bte_status = BTE_SUCCESS;
240 *bte->most_rcnt_na = BTE_WORD_AVAILABLE;
242 BTE_PRINTK(("Returning status is 0x%lx and most_rcnt_na is 0x%lx\n",
243 BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na));
248 EXPORT_SYMBOL(bte_copy);
251 * bte_unaligned_copy(src, dest, len, mode)
253 * use the block transfer engine to move kernel
254 * memory from src to dest using the assigned mode.
257 * src - physical address of the transfer source.
258 * dest - physical address of the transfer destination.
259 * len - number of bytes to transfer from source to dest.
260 * mode - hardware defined. See reference information
261 * for IBCT0/1 in the SGI documentation.
263 * NOTE: If the source, dest, and len are all cache line aligned,
264 * then it would be _FAR_ preferrable to use bte_copy instead.
266 bte_result_t bte_unaligned_copy(u64 src, u64 dest, u64 len, u64 mode)
268 int destFirstCacheOffset;
271 u64 headBcopySrcOffset;
279 char *bteBlock, *bteBlock_unaligned;
285 /* temporary buffer used during unaligned transfers */
286 bteBlock_unaligned = kmalloc(len + 3 * L1_CACHE_BYTES,
287 GFP_KERNEL | GFP_DMA);
288 if (bteBlock_unaligned == NULL) {
289 return BTEFAIL_NOTAVAIL;
291 bteBlock = (char *)L1_CACHE_ALIGN((u64) bteBlock_unaligned);
293 headBcopySrcOffset = src & L1_CACHE_MASK;
294 destFirstCacheOffset = dest & L1_CACHE_MASK;
297 * At this point, the transfer is broken into
298 * (up to) three sections. The first section is
299 * from the start address to the first physical
300 * cache line, the second is from the first physical
301 * cache line to the last complete cache line,
302 * and the third is from the last cache line to the
303 * end of the buffer. The first and third sections
304 * are handled by bte copying into a temporary buffer
305 * and then bcopy'ing the necessary section into the
306 * final location. The middle section is handled with
307 * a standard bte copy.
309 * One nasty exception to the above rule is when the
310 * source and destination are not symetrically
311 * mis-aligned. If the source offset from the first
312 * cache line is different from the destination offset,
313 * we make the first section be the entire transfer
314 * and the bcopy the entire block into place.
316 if (headBcopySrcOffset == destFirstCacheOffset) {
319 * Both the source and destination are the same
320 * distance from a cache line boundary so we can
321 * use the bte to transfer the bulk of the
324 headBteSource = src & ~L1_CACHE_MASK;
325 headBcopyDest = dest;
326 if (headBcopySrcOffset) {
330 headBcopySrcOffset) ? L1_CACHE_BYTES
331 - headBcopySrcOffset : len);
332 headBteLen = L1_CACHE_BYTES;
338 if (len > headBcopyLen) {
339 footBcopyLen = (len - headBcopyLen) & L1_CACHE_MASK;
340 footBteLen = L1_CACHE_BYTES;
342 footBteSource = src + len - footBcopyLen;
343 footBcopyDest = dest + len - footBcopyLen;
345 if (footBcopyDest == (headBcopyDest + headBcopyLen)) {
347 * We have two contigous bcopy
348 * blocks. Merge them.
350 headBcopyLen += footBcopyLen;
351 headBteLen += footBteLen;
352 } else if (footBcopyLen > 0) {
353 rv = bte_copy(footBteSource,
354 ia64_tpa((unsigned long)bteBlock),
355 footBteLen, mode, NULL);
356 if (rv != BTE_SUCCESS) {
357 kfree(bteBlock_unaligned);
361 memcpy(__va(footBcopyDest),
362 (char *)bteBlock, footBcopyLen);
369 if (len > (headBcopyLen + footBcopyLen)) {
370 /* now transfer the middle. */
371 rv = bte_copy((src + headBcopyLen),
374 (len - headBcopyLen -
375 footBcopyLen), mode, NULL);
376 if (rv != BTE_SUCCESS) {
377 kfree(bteBlock_unaligned);
385 * The transfer is not symetric, we will
386 * allocate a buffer large enough for all the
387 * data, bte_copy into that buffer and then
388 * bcopy to the destination.
391 /* Add the leader from source */
392 headBteLen = len + (src & L1_CACHE_MASK);
393 /* Add the trailing bytes from footer. */
394 headBteLen += L1_CACHE_BYTES - (headBteLen & L1_CACHE_MASK);
395 headBteSource = src & ~L1_CACHE_MASK;
396 headBcopySrcOffset = src & L1_CACHE_MASK;
397 headBcopyDest = dest;
401 if (headBcopyLen > 0) {
402 rv = bte_copy(headBteSource,
403 ia64_tpa((unsigned long)bteBlock), headBteLen,
405 if (rv != BTE_SUCCESS) {
406 kfree(bteBlock_unaligned);
410 memcpy(__va(headBcopyDest), ((char *)bteBlock +
411 headBcopySrcOffset), headBcopyLen);
413 kfree(bteBlock_unaligned);
417 EXPORT_SYMBOL(bte_unaligned_copy);
419 /************************************************************************
420 * Block Transfer Engine initialization functions.
422 ***********************************************************************/
425 * bte_init_node(nodepda, cnode)
427 * Initialize the nodepda structure with BTE base addresses and
430 void bte_init_node(nodepda_t * mynodepda, cnodeid_t cnode)
435 * Indicate that all the block transfer engines on this node
440 * Allocate one bte_recover_t structure per node. It holds
441 * the recovery lock for node. All the bte interface structures
442 * will point at this one bte_recover structure to get the lock.
444 spin_lock_init(&mynodepda->bte_recovery_lock);
445 init_timer(&mynodepda->bte_recovery_timer);
446 mynodepda->bte_recovery_timer.function = bte_error_handler;
447 mynodepda->bte_recovery_timer.data = (unsigned long)mynodepda;
449 for (i = 0; i < BTES_PER_NODE; i++) {
452 /* Which link status register should we use? */
454 REMOTE_HUB_ADDR(cnodeid_to_nasid(cnode), BTE_BASE_ADDR(i));
455 mynodepda->bte_if[i].bte_base_addr = base_addr;
456 mynodepda->bte_if[i].bte_source_addr = BTE_SOURCE_ADDR(base_addr);
457 mynodepda->bte_if[i].bte_destination_addr = BTE_DEST_ADDR(base_addr);
458 mynodepda->bte_if[i].bte_control_addr = BTE_CTRL_ADDR(base_addr);
459 mynodepda->bte_if[i].bte_notify_addr = BTE_NOTIF_ADDR(base_addr);
462 * Initialize the notification and spinlock
463 * so the first transfer can occur.
465 mynodepda->bte_if[i].most_rcnt_na =
466 &(mynodepda->bte_if[i].notify);
467 mynodepda->bte_if[i].notify = BTE_WORD_AVAILABLE;
468 spin_lock_init(&mynodepda->bte_if[i].spinlock);
470 mynodepda->bte_if[i].bte_cnode = cnode;
471 mynodepda->bte_if[i].bte_error_count = 0;
472 mynodepda->bte_if[i].bte_num = i;
473 mynodepda->bte_if[i].cleanup_active = 0;
474 mynodepda->bte_if[i].bh_error = 0;