2 * Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
5 * Copyright (C) 2007 Trent Piepho <xyzzy@speakeasy.org>
7 * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
9 * Based on code from Jack Kelliher (kelliher@xmission.com)
10 * Copyright (C) 2002 & pcHDTV, inc.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 * This driver needs two external firmware files. Please copy
30 * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
31 * /usr/lib/hotplug/firmware/ or /lib/firmware/
32 * (depending on configuration of firmware hotplug).
34 #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
35 #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
41 #include <linux/string.h>
42 #include <linux/slab.h>
43 #include <asm/byteorder.h>
46 #include "dvb_frontend.h"
50 #define dprintk(args...) \
52 if (debug) printk(KERN_DEBUG "or51132: " args); \
58 struct i2c_adapter* i2c;
60 /* Configuration settings */
61 const struct or51132_config* config;
63 struct dvb_frontend frontend;
65 /* Demodulator private data */
66 fe_modulation_t current_modulation;
67 u32 snr; /* Result of last SNR calculation */
69 /* Tuner private data */
70 u32 current_frequency;
74 /* Write buffer to demod */
75 static int or51132_writebuf(struct or51132_state *state, const u8 *buf, int len)
78 struct i2c_msg msg = { .addr = state->config->demod_address,
79 .flags = 0, .buf = (u8*)buf, .len = len };
81 /* msleep(20); */ /* doesn't appear to be necessary */
82 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
83 printk(KERN_WARNING "or51132: I2C write (addr 0x%02x len %d) error: %d\n",
84 msg.addr, msg.len, err);
90 /* Write constant bytes, e.g. or51132_writebytes(state, 0x04, 0x42, 0x00);
91 Less code and more efficient that loading a buffer on the stack with
92 the bytes to send and then calling or51132_writebuf() on that. */
93 #define or51132_writebytes(state, data...) \
94 ({ static const u8 _data[] = {data}; \
95 or51132_writebuf(state, _data, sizeof(_data)); })
97 /* Read data from demod into buffer. Returns 0 on success. */
98 static int or51132_readbuf(struct or51132_state *state, u8 *buf, int len)
101 struct i2c_msg msg = { .addr = state->config->demod_address,
102 .flags = I2C_M_RD, .buf = buf, .len = len };
104 /* msleep(20); */ /* doesn't appear to be necessary */
105 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
106 printk(KERN_WARNING "or51132: I2C read (addr 0x%02x len %d) error: %d\n",
107 msg.addr, msg.len, err);
113 /* Reads a 16-bit demod register. Returns <0 on error. */
114 static int or51132_readreg(struct or51132_state *state, u8 reg)
116 u8 buf[2] = { 0x04, reg };
117 struct i2c_msg msg[2] = {
118 {.addr = state->config->demod_address, .flags = 0,
119 .buf = buf, .len = 2 },
120 {.addr = state->config->demod_address, .flags = I2C_M_RD,
121 .buf = buf, .len = 2 }};
124 if ((err = i2c_transfer(state->i2c, msg, 2)) != 2) {
125 printk(KERN_WARNING "or51132: I2C error reading register %d: %d\n",
129 return buf[0] | (buf[1] << 8);
132 static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
134 struct or51132_state* state = fe->demodulator_priv;
135 static const u8 run_buf[] = {0x7F,0x01};
137 u32 firmwareAsize, firmwareBsize;
140 dprintk("Firmware is %Zd bytes\n",fw->size);
142 /* Get size of firmware A and B */
143 firmwareAsize = le32_to_cpu(*((__le32*)fw->data));
144 dprintk("FirmwareA is %i bytes\n",firmwareAsize);
145 firmwareBsize = le32_to_cpu(*((__le32*)(fw->data+4)));
146 dprintk("FirmwareB is %i bytes\n",firmwareBsize);
148 /* Upload firmware */
149 if ((ret = or51132_writebuf(state, &fw->data[8], firmwareAsize))) {
150 printk(KERN_WARNING "or51132: load_firmware error 1\n");
153 if ((ret = or51132_writebuf(state, &fw->data[8+firmwareAsize],
155 printk(KERN_WARNING "or51132: load_firmware error 2\n");
159 if ((ret = or51132_writebuf(state, run_buf, 2))) {
160 printk(KERN_WARNING "or51132: load_firmware error 3\n");
163 if ((ret = or51132_writebuf(state, run_buf, 2))) {
164 printk(KERN_WARNING "or51132: load_firmware error 4\n");
168 /* 50ms for operation to begin */
171 /* Read back ucode version to besure we loaded correctly and are really up and running */
172 /* Get uCode version */
173 if ((ret = or51132_writebytes(state, 0x10, 0x10, 0x00))) {
174 printk(KERN_WARNING "or51132: load_firmware error a\n");
177 if ((ret = or51132_writebytes(state, 0x04, 0x17))) {
178 printk(KERN_WARNING "or51132: load_firmware error b\n");
181 if ((ret = or51132_writebytes(state, 0x00, 0x00))) {
182 printk(KERN_WARNING "or51132: load_firmware error c\n");
186 /* Once upon a time, this command might have had something
187 to do with getting the firmware version, but it's
189 {0x04,0x00,0x30,0x00,i+1} */
190 /* Read 8 bytes, two bytes at a time */
191 if ((ret = or51132_readbuf(state, &rec_buf[i*2], 2))) {
193 "or51132: load_firmware error d - %d\n",i);
199 "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
200 rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
201 rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
202 rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
203 rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
205 if ((ret = or51132_writebytes(state, 0x10, 0x00, 0x00))) {
206 printk(KERN_WARNING "or51132: load_firmware error e\n");
212 static int or51132_init(struct dvb_frontend* fe)
217 static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
223 static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
229 static int or51132_sleep(struct dvb_frontend* fe)
234 static int or51132_setmode(struct dvb_frontend* fe)
236 struct or51132_state* state = fe->demodulator_priv;
237 u8 cmd_buf1[3] = {0x04, 0x01, 0x5f};
238 u8 cmd_buf2[3] = {0x1c, 0x00, 0 };
240 dprintk("setmode %d\n",(int)state->current_modulation);
242 switch (state->current_modulation) {
244 /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high */
246 /* REC MODE inv IF spectrum, Normal */
248 /* Channel MODE ATSC/VSB8 */
251 /* All QAM modes are:
252 Auto-deinterleave; MPEGser, MPEG2tr, phase noise-high
253 REC MODE Normal Carrier Lock */
255 /* Channel MODE Auto QAM64/256 */
259 /* Channel MODE QAM256 */
263 /* Channel MODE QAM64 */
268 "or51132: setmode: Modulation set to unsupported value (%d)\n",
269 state->current_modulation);
273 /* Set Receiver 1 register */
274 if (or51132_writebuf(state, cmd_buf1, 3)) {
275 printk(KERN_WARNING "or51132: set_mode error 1\n");
278 dprintk("set #1 to %02x\n", cmd_buf1[2]);
280 /* Set operation mode in Receiver 6 register */
281 if (or51132_writebuf(state, cmd_buf2, 3)) {
282 printk(KERN_WARNING "or51132: set_mode error 2\n");
285 dprintk("set #6 to 0x%02x%02x\n", cmd_buf2[1], cmd_buf2[2]);
290 /* Some modulations use the same firmware. This classifies modulations
291 by the firmware they use. */
292 #define MOD_FWCLASS_UNKNOWN 0
293 #define MOD_FWCLASS_VSB 1
294 #define MOD_FWCLASS_QAM 2
295 static int modulation_fw_class(fe_modulation_t modulation)
299 return MOD_FWCLASS_VSB;
303 return MOD_FWCLASS_QAM;
305 return MOD_FWCLASS_UNKNOWN;
309 static int or51132_set_parameters(struct dvb_frontend* fe,
310 struct dvb_frontend_parameters *param)
313 struct or51132_state* state = fe->demodulator_priv;
314 const struct firmware *fw;
318 /* Upload new firmware only if we need a different one */
319 if (modulation_fw_class(state->current_modulation) !=
320 modulation_fw_class(param->u.vsb.modulation)) {
321 switch(modulation_fw_class(param->u.vsb.modulation)) {
322 case MOD_FWCLASS_VSB:
323 dprintk("set_parameters VSB MODE\n");
324 fwname = OR51132_VSB_FIRMWARE;
326 /* Set non-punctured clock for VSB */
329 case MOD_FWCLASS_QAM:
330 dprintk("set_parameters QAM MODE\n");
331 fwname = OR51132_QAM_FIRMWARE;
333 /* Set punctured clock for QAM */
337 printk("or51132: Modulation type(%d) UNSUPPORTED\n",
338 param->u.vsb.modulation);
341 printk("or51132: Waiting for firmware upload(%s)...\n",
343 ret = request_firmware(&fw, fwname, &state->i2c->dev);
345 printk(KERN_WARNING "or51132: No firmware up"
346 "loaded(timeout or file not found?)\n");
349 ret = or51132_load_firmware(fe, fw);
350 release_firmware(fw);
352 printk(KERN_WARNING "or51132: Writing firmware to "
356 printk("or51132: Firmware upload complete.\n");
357 state->config->set_ts_params(fe, clock_mode);
359 /* Change only if we are actually changing the modulation */
360 if (state->current_modulation != param->u.vsb.modulation) {
361 state->current_modulation = param->u.vsb.modulation;
365 if (fe->ops.tuner_ops.set_params) {
366 fe->ops.tuner_ops.set_params(fe, param);
367 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
370 /* Set to current mode */
373 /* Update current frequency */
374 state->current_frequency = param->frequency;
378 static int or51132_get_parameters(struct dvb_frontend* fe,
379 struct dvb_frontend_parameters *param)
381 struct or51132_state* state = fe->demodulator_priv;
386 /* Receiver Status */
387 if ((status = or51132_readreg(state, 0x00)) < 0) {
388 printk(KERN_WARNING "or51132: get_parameters: error reading receiver status\n");
391 switch(status&0xff) {
392 case 0x06: param->u.vsb.modulation = VSB_8; break;
393 case 0x43: param->u.vsb.modulation = QAM_64; break;
394 case 0x45: param->u.vsb.modulation = QAM_256; break;
396 if (retry--) goto start;
397 printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
402 /* FIXME: Read frequency from frontend, take AFC into account */
403 param->frequency = state->current_frequency;
405 /* FIXME: How to read inversion setting? Receiver 6 register? */
406 param->inversion = INVERSION_AUTO;
411 static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
413 struct or51132_state* state = fe->demodulator_priv;
416 /* Receiver Status */
417 if ((reg = or51132_readreg(state, 0x00)) < 0) {
418 printk(KERN_WARNING "or51132: read_status: error reading receiver status: %d\n", reg);
422 dprintk("%s: read_status %04x\n", __func__, reg);
424 if (reg & 0x0100) /* Receiver Lock */
425 *status = FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI|
426 FE_HAS_SYNC|FE_HAS_LOCK;
432 /* Calculate SNR estimation (scaled by 2^24)
434 8-VSB SNR and QAM equations from Oren datasheets
437 SNR[dB] = 10 * log10(897152044.8282 / MSE^2 ) - K
439 Where K = 0 if NTSC rejection filter is OFF; and
440 K = 3 if NTSC rejection filter is ON
443 SNR[dB] = 10 * log10(897152044.8282 / MSE^2 )
446 SNR[dB] = 10 * log10(907832426.314266 / MSE^2 )
448 We re-write the snr equation as:
449 SNR * 2^24 = 10*(c - 2*intlog10(MSE))
450 Where for QAM256, c = log10(907832426.314266) * 2^24
451 and for 8-VSB and QAM64, c = log10(897152044.8282) * 2^24 */
453 static u32 calculate_snr(u32 mse, u32 c)
455 if (mse == 0) /* No signal */
458 mse = 2*intlog10(mse);
460 /* Negative SNR, which is possible, but realisticly the
461 demod will lose lock before the signal gets this bad. The
462 API only allows for unsigned values, so just return 0 */
468 static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
470 struct or51132_state* state = fe->demodulator_priv;
476 /* SNR after Equalizer */
477 noise = or51132_readreg(state, 0x02);
479 printk(KERN_WARNING "or51132: read_snr: error reading equalizer\n");
482 dprintk("read_snr noise (%d)\n", noise);
484 /* Read status, contains modulation type for QAM_AUTO and
485 NTSC filter for VSB */
486 reg = or51132_readreg(state, 0x00);
488 printk(KERN_WARNING "or51132: read_snr: error reading receiver status\n");
494 if (reg & 0x1000) usK = 3 << 24;
495 /* Fall through to QAM64 case */
503 printk(KERN_WARNING "or51132: unknown status 0x%02x\n", reg&0xff);
504 if (retry--) goto start;
507 dprintk("%s: modulation %02x, NTSC rej O%s\n", __func__,
508 reg&0xff, reg&0x1000?"n":"ff");
510 /* Calculate SNR using noise, c, and NTSC rejection correction */
511 state->snr = calculate_snr(noise, c) - usK;
512 *snr = (state->snr) >> 16;
514 dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise,
515 state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
520 static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
522 /* Calculate Strength from SNR up to 35dB */
523 /* Even though the SNR can go higher than 35dB, there is some comfort */
524 /* factor in having a range of strong signals that can show at 100% */
525 struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
529 ret = fe->ops.read_snr(fe, &snr);
532 /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
533 /* scale the range 0 - 35*2^24 into 0 - 65535 */
534 if (state->snr >= 8960 * 0x10000)
537 *strength = state->snr / 8960;
542 static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
544 fe_tune_settings->min_delay_ms = 500;
545 fe_tune_settings->step_size = 0;
546 fe_tune_settings->max_drift = 0;
551 static void or51132_release(struct dvb_frontend* fe)
553 struct or51132_state* state = fe->demodulator_priv;
557 static struct dvb_frontend_ops or51132_ops;
559 struct dvb_frontend* or51132_attach(const struct or51132_config* config,
560 struct i2c_adapter* i2c)
562 struct or51132_state* state = NULL;
564 /* Allocate memory for the internal state */
565 state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
569 /* Setup the state */
570 state->config = config;
572 state->current_frequency = -1;
573 state->current_modulation = -1;
575 /* Create dvb_frontend */
576 memcpy(&state->frontend.ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
577 state->frontend.demodulator_priv = state;
578 return &state->frontend;
581 static struct dvb_frontend_ops or51132_ops = {
584 .name = "Oren OR51132 VSB/QAM Frontend",
586 .frequency_min = 44000000,
587 .frequency_max = 958000000,
588 .frequency_stepsize = 166666,
589 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
590 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
591 FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
595 .release = or51132_release,
597 .init = or51132_init,
598 .sleep = or51132_sleep,
600 .set_frontend = or51132_set_parameters,
601 .get_frontend = or51132_get_parameters,
602 .get_tune_settings = or51132_get_tune_settings,
604 .read_status = or51132_read_status,
605 .read_ber = or51132_read_ber,
606 .read_signal_strength = or51132_read_signal_strength,
607 .read_snr = or51132_read_snr,
608 .read_ucblocks = or51132_read_ucblocks,
611 module_param(debug, int, 0644);
612 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
614 MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
615 MODULE_AUTHOR("Kirk Lapray");
616 MODULE_AUTHOR("Trent Piepho");
617 MODULE_LICENSE("GPL");
619 EXPORT_SYMBOL(or51132_attach);