2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
7 * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
9 #ifndef _ASM_PGTABLE_64_H
10 #define _ASM_PGTABLE_64_H
12 #include <linux/linkage.h>
14 #include <asm/addrspace.h>
16 #include <asm/cachectl.h>
18 #include <asm-generic/pgtable-nopud.h>
21 * Each address space has 2 4K pages as its page directory, giving 1024
22 * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
23 * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
24 * tables. Each page table is also a single 4K page, giving 512 (==
25 * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
26 * invalid_pmd_table, each pmd entry is initialized to point to
27 * invalid_pte_table, each pte is initialized to 0. When memory is low,
28 * and a pmd table or a page table allocation fails, empty_bad_pmd_table
29 * and empty_bad_page_table is returned back to higher layer code, so
30 * that the failure is recognized later on. Linux does not seem to
31 * handle these failures very well though. The empty_bad_page_table has
32 * invalid pte entries in it, to force page faults.
34 * Kernel mappings: kernel mappings are held in the swapper_pg_table.
35 * The layout is identical to userspace except it's indexed with the
36 * fault address - VMALLOC_START.
39 /* PMD_SHIFT determines the size of the area a second-level page table can map */
40 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
41 #define PMD_SIZE (1UL << PMD_SHIFT)
42 #define PMD_MASK (~(PMD_SIZE-1))
44 /* PGDIR_SHIFT determines what a third-level page table entry can map */
45 #define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
46 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
47 #define PGDIR_MASK (~(PGDIR_SIZE-1))
50 * For 4kB page size we use a 3 level page tree and an 8kB pud, which
51 * permits us mapping 40 bits of virtual address space.
53 * We used to implement 41 bits by having an order 1 pmd level but that seemed
56 * For 8kB page size we use a 3 level page tree which permits a total of
57 * 8TB of address space. Alternatively a 33-bit / 8GB organization using
58 * two levels would be easy to implement.
60 * For 16kB page size we use a 2 level page tree which permits a total of
61 * 36 bits of virtual address space. We could add a third level but it seems
62 * like at the moment there's no need for this.
64 * For 64kB page size we use a 2 level page table tree for a total of 42 bits
65 * of virtual address space.
67 #ifdef CONFIG_PAGE_SIZE_4KB
69 #define PUD_ORDER aieeee_attempt_to_allocate_pud
73 #ifdef CONFIG_PAGE_SIZE_8KB
75 #define PUD_ORDER aieeee_attempt_to_allocate_pud
79 #ifdef CONFIG_PAGE_SIZE_16KB
81 #define PUD_ORDER aieeee_attempt_to_allocate_pud
85 #ifdef CONFIG_PAGE_SIZE_64KB
87 #define PUD_ORDER aieeee_attempt_to_allocate_pud
92 #define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
93 #define PTRS_PER_PMD ((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t))
94 #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
96 #if PGDIR_SIZE >= TASK_SIZE
97 #define USER_PTRS_PER_PGD (1)
99 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
101 #define FIRST_USER_ADDRESS 0UL
103 #define VMALLOC_START MAP_BASE
104 #define VMALLOC_END \
105 (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE)
107 #define pte_ERROR(e) \
108 printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
109 #define pmd_ERROR(e) \
110 printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
111 #define pgd_ERROR(e) \
112 printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
114 extern pte_t invalid_pte_table[PTRS_PER_PTE];
115 extern pte_t empty_bad_page_table[PTRS_PER_PTE];
116 extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
117 extern pmd_t empty_bad_pmd_table[PTRS_PER_PMD];
120 * Empty pgd/pmd entries point to the invalid_pte_table.
122 static inline int pmd_none(pmd_t pmd)
124 return pmd_val(pmd) == (unsigned long) invalid_pte_table;
127 #define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK)
129 static inline int pmd_present(pmd_t pmd)
131 return pmd_val(pmd) != (unsigned long) invalid_pte_table;
134 static inline void pmd_clear(pmd_t *pmdp)
136 pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
140 * Empty pud entries point to the invalid_pmd_table.
142 static inline int pud_none(pud_t pud)
144 return pud_val(pud) == (unsigned long) invalid_pmd_table;
147 static inline int pud_bad(pud_t pud)
149 return pud_val(pud) & ~PAGE_MASK;
152 static inline int pud_present(pud_t pud)
154 return pud_val(pud) != (unsigned long) invalid_pmd_table;
157 static inline void pud_clear(pud_t *pudp)
159 pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
162 #define pte_page(x) pfn_to_page(pte_pfn(x))
164 #ifdef CONFIG_CPU_VR41XX
165 #define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
166 #define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
168 #define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
169 #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
172 #define __pgd_offset(address) pgd_index(address)
173 #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
174 #define __pmd_offset(address) pmd_index(address)
176 /* to find an entry in a kernel page-table-directory */
177 #define pgd_offset_k(address) pgd_offset(&init_mm, 0UL)
179 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
180 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
182 /* to find an entry in a page-table-directory */
183 #define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
185 static inline unsigned long pud_page_vaddr(pud_t pud)
189 #define pud_phys(pud) (pud_val(pud) - PAGE_OFFSET)
190 #define pud_page(pud) (pfn_to_page(pud_phys(pud) >> PAGE_SHIFT))
192 /* Find an entry in the second-level page table.. */
193 static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
195 return (pmd_t *) pud_page_vaddr(*pud) + pmd_index(address);
198 /* Find an entry in the third-level page table.. */
199 #define __pte_offset(address) \
200 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
201 #define pte_offset(dir, address) \
202 ((pte_t *) (pmd_page_vaddr(*dir)) + __pte_offset(address))
203 #define pte_offset_kernel(dir, address) \
204 ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
205 #define pte_offset_map(dir, address) \
206 ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
207 #define pte_offset_map_nested(dir, address) \
208 ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
209 #define pte_unmap(pte) ((void)(pte))
210 #define pte_unmap_nested(pte) ((void)(pte))
213 * Initialize a new pgd / pmd table with invalid pointers.
215 extern void pgd_init(unsigned long page);
216 extern void pmd_init(unsigned long page, unsigned long pagetable);
219 * Non-present pages: high 24 bits are offset, next 8 bits type,
222 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
223 { pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; }
225 #define __swp_type(x) (((x).val >> 32) & 0xff)
226 #define __swp_offset(x) ((x).val >> 40)
227 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
228 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
229 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
232 * Bits 0, 4, 6, and 7 are taken. Let's leave bits 1, 2, 3, and 5 alone to
233 * make things easier, and only use the upper 56 bits for the page offset...
235 #define PTE_FILE_MAX_BITS 56
237 #define pte_to_pgoff(_pte) ((_pte).pte >> 8)
238 #define pgoff_to_pte(off) ((pte_t) { ((off) << 8) | _PAGE_FILE })
240 #endif /* _ASM_PGTABLE_64_H */