git.oblomov.eu Git - linux-2.6/blob - arch/x86/kernel/tsc_64.c

   1 #include <linux/kernel.h>
   2 #include <linux/sched.h>
   3 #include <linux/interrupt.h>
   4 #include <linux/init.h>
   5 #include <linux/clocksource.h>
   6 #include <linux/time.h>
   7 #include <linux/acpi.h>
   8 #include <linux/cpufreq.h>
   9 #include <linux/acpi_pmtmr.h>
  10
  11 #include <asm/hpet.h>
  12 #include <asm/timex.h>
  13 #include <asm/timer.h>
  14
  15 static int notsc __initdata = 0;
  16
  17 unsigned int cpu_khz;           /* TSC clocks / usec, not used here */
  18 EXPORT_SYMBOL(cpu_khz);
  19 unsigned int tsc_khz;
  20 EXPORT_SYMBOL(tsc_khz);
  21
  22 /* Accelerators for sched_clock()
  23  * convert from cycles(64bits) => nanoseconds (64bits)
  24  *  basic equation:
  25  *              ns = cycles / (freq / ns_per_sec)
  26  *              ns = cycles * (ns_per_sec / freq)
  27  *              ns = cycles * (10^9 / (cpu_khz * 10^3))
  28  *              ns = cycles * (10^6 / cpu_khz)
  29  *
  30  *      Then we use scaling math (suggested by george@mvista.com) to get:
  31  *              ns = cycles * (10^6 * SC / cpu_khz) / SC
  32  *              ns = cycles * cyc2ns_scale / SC
  33  *
  34  *      And since SC is a constant power of two, we can convert the div
  35  *  into a shift.
  36  *
  37  *  We can use khz divisor instead of mhz to keep a better precision, since
  38  *  cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
  39  *  (mathieu.desnoyers@polymtl.ca)
  40  *
  41  *                      -johnstul@us.ibm.com "math is hard, lets go shopping!"
  42  */
  43 DEFINE_PER_CPU(unsigned long, cyc2ns);
  44
  45 static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
  46 {
  47         unsigned long flags, prev_scale, *scale;
  48         unsigned long long tsc_now, ns_now;
  49
  50         local_irq_save(flags);
  51         sched_clock_idle_sleep_event();
  52
  53         scale = &per_cpu(cyc2ns, cpu);
  54
  55         rdtscll(tsc_now);
  56         ns_now = __cycles_2_ns(tsc_now);
  57
  58         prev_scale = *scale;
  59         if (cpu_khz)
  60                 *scale = (NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR)/cpu_khz;
  61
  62         sched_clock_idle_wakeup_event(0);
  63         local_irq_restore(flags);
  64 }
  65
  66 unsigned long long sched_clock(void)
  67 {
  68         unsigned long a = 0;
  69
  70         /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
  71          * which means it is not completely exact and may not be monotonous
  72          * between CPUs. But the errors should be too small to matter for
  73          * scheduling purposes.
  74          */
  75
  76         rdtscll(a);
  77         return cycles_2_ns(a);
  78 }
  79
  80 static int tsc_unstable;
  81
  82 inline int check_tsc_unstable(void)
  83 {
  84         return tsc_unstable;
  85 }
  86 #ifdef CONFIG_CPU_FREQ
  87
  88 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
  89  * changes.
  90  *
  91  * RED-PEN: On SMP we assume all CPUs run with the same frequency.  It's
  92  * not that important because current Opteron setups do not support
  93  * scaling on SMP anyroads.
  94  *
  95  * Should fix up last_tsc too. Currently gettimeofday in the
  96  * first tick after the change will be slightly wrong.
  97  */
  98
  99 static unsigned int  ref_freq;
 100 static unsigned long loops_per_jiffy_ref;
 101 static unsigned long tsc_khz_ref;
 102
 103 static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
 104                                  void *data)
 105 {
 106         struct cpufreq_freqs *freq = data;
 107         unsigned long *lpj, dummy;
 108
 109         if (cpu_has(&cpu_data(freq->cpu), X86_FEATURE_CONSTANT_TSC))
 110                 return 0;
 111
 112         lpj = &dummy;
 113         if (!(freq->flags & CPUFREQ_CONST_LOOPS))
 114 #ifdef CONFIG_SMP
 115                 lpj = &cpu_data(freq->cpu).loops_per_jiffy;
 116 #else
 117                 lpj = &boot_cpu_data.loops_per_jiffy;
 118 #endif
 119
 120         if (!ref_freq) {
 121                 ref_freq = freq->old;
 122                 loops_per_jiffy_ref = *lpj;
 123                 tsc_khz_ref = tsc_khz;
 124         }
 125         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
 126                 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
 127                 (val == CPUFREQ_RESUMECHANGE)) {
 128                 *lpj =
 129                 cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
 130
 131                 tsc_khz = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
 132                 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
 133                         mark_tsc_unstable("cpufreq changes");
 134         }
 135
 136         preempt_disable();
 137         set_cyc2ns_scale(tsc_khz_ref, smp_processor_id());
 138         preempt_enable();
 139
 140         return 0;
 141 }
 142
 143 static struct notifier_block time_cpufreq_notifier_block = {
 144         .notifier_call  = time_cpufreq_notifier
 145 };
 146
 147 static int __init cpufreq_tsc(void)
 148 {
 149         cpufreq_register_notifier(&time_cpufreq_notifier_block,
 150                                   CPUFREQ_TRANSITION_NOTIFIER);
 151         return 0;
 152 }
 153
 154 core_initcall(cpufreq_tsc);
 155
 156 #endif
 157
 158 #define MAX_RETRIES     5
 159 #define SMI_TRESHOLD    50000
 160
 161 /*
 162  * Read TSC and the reference counters. Take care of SMI disturbance
 163  */
 164 static unsigned long __init tsc_read_refs(unsigned long *pm,
 165                                           unsigned long *hpet)
 166 {
 167         unsigned long t1, t2;
 168         int i;
 169
 170         for (i = 0; i < MAX_RETRIES; i++) {
 171                 t1 = get_cycles_sync();
 172                 if (hpet)
 173                         *hpet = hpet_readl(HPET_COUNTER) & 0xFFFFFFFF;
 174                 else
 175                         *pm = acpi_pm_read_early();
 176                 t2 = get_cycles_sync();
 177                 if ((t2 - t1) < SMI_TRESHOLD)
 178                         return t2;
 179         }
 180         return ULONG_MAX;
 181 }
 182
 183 /**
 184  * tsc_calibrate - calibrate the tsc on boot
 185  */
 186 void __init tsc_calibrate(void)
 187 {
 188         unsigned long flags, tsc1, tsc2, tr1, tr2, pm1, pm2, hpet1, hpet2;
 189         int hpet = is_hpet_enabled(), cpu;
 190
 191         local_irq_save(flags);
 192
 193         tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL);
 194
 195         outb((inb(0x61) & ~0x02) | 0x01, 0x61);
 196
 197         outb(0xb0, 0x43);
 198         outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
 199         outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42);
 200         tr1 = get_cycles_sync();
 201         while ((inb(0x61) & 0x20) == 0);
 202         tr2 = get_cycles_sync();
 203
 204         tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL);
 205
 206         local_irq_restore(flags);
 207
 208         /*
 209          * Preset the result with the raw and inaccurate PIT
 210          * calibration value
 211          */
 212         tsc_khz = (tr2 - tr1) / 50;
 213
 214         /* hpet or pmtimer available ? */
 215         if (!hpet && !pm1 && !pm2) {
 216                 printk(KERN_INFO "TSC calibrated against PIT\n");
 217                 return;
 218         }
 219
 220         /* Check, whether the sampling was disturbed by an SMI */
 221         if (tsc1 == ULONG_MAX || tsc2 == ULONG_MAX) {
 222                 printk(KERN_WARNING "TSC calibration disturbed by SMI, "
 223                        "using PIT calibration result\n");
 224                 return;
 225         }
 226
 227         tsc2 = (tsc2 - tsc1) * 1000000L;
 228
 229         if (hpet) {
 230                 printk(KERN_INFO "TSC calibrated against HPET\n");
 231                 if (hpet2 < hpet1)
 232                         hpet2 += 0x100000000;
 233                 hpet2 -= hpet1;
 234                 tsc1 = (hpet2 * hpet_readl(HPET_PERIOD)) / 1000000;
 235         } else {
 236                 printk(KERN_INFO "TSC calibrated against PM_TIMER\n");
 237                 if (pm2 < pm1)
 238                         pm2 += ACPI_PM_OVRRUN;
 239                 pm2 -= pm1;
 240                 tsc1 = (pm2 * 1000000000) / PMTMR_TICKS_PER_SEC;
 241         }
 242
 243         tsc_khz = tsc2 / tsc1;
 244
 245         for_each_possible_cpu(cpu)
 246                 set_cyc2ns_scale(tsc_khz, cpu);
 247 }
 248
 249 /*
 250  * Make an educated guess if the TSC is trustworthy and synchronized
 251  * over all CPUs.
 252  */
 253 __cpuinit int unsynchronized_tsc(void)
 254 {
 255         if (tsc_unstable)
 256                 return 1;
 257
 258 #ifdef CONFIG_SMP
 259         if (apic_is_clustered_box())
 260                 return 1;
 261 #endif
 262         /* Most intel systems have synchronized TSCs except for
 263            multi node systems */
 264         if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
 265 #ifdef CONFIG_ACPI
 266                 /* But TSC doesn't tick in C3 so don't use it there */
 267                 if (acpi_gbl_FADT.header.length > 0 &&
 268                     acpi_gbl_FADT.C3latency < 1000)
 269                         return 1;
 270 #endif
 271                 return 0;
 272         }
 273
 274         /* Assume multi socket systems are not synchronized */
 275         return num_present_cpus() > 1;
 276 }
 277
 278 int __init notsc_setup(char *s)
 279 {
 280         notsc = 1;
 281         return 1;
 282 }
 283
 284 __setup("notsc", notsc_setup);
 285
 286
 287 /* clock source code: */
 288 static cycle_t read_tsc(void)
 289 {
 290         cycle_t ret = (cycle_t)get_cycles_sync();
 291         return ret;
 292 }
 293
 294 static cycle_t __vsyscall_fn vread_tsc(void)
 295 {
 296         cycle_t ret = (cycle_t)get_cycles_sync();
 297         return ret;
 298 }
 299
 300 static struct clocksource clocksource_tsc = {
 301         .name                   = "tsc",
 302         .rating                 = 300,
 303         .read                   = read_tsc,
 304         .mask                   = CLOCKSOURCE_MASK(64),
 305         .shift                  = 22,
 306         .flags                  = CLOCK_SOURCE_IS_CONTINUOUS |
 307                                   CLOCK_SOURCE_MUST_VERIFY,
 308         .vread                  = vread_tsc,
 309 };
 310
 311 void mark_tsc_unstable(char *reason)
 312 {
 313         if (!tsc_unstable) {
 314                 tsc_unstable = 1;
 315                 printk("Marking TSC unstable due to %s\n", reason);
 316                 /* Change only the rating, when not registered */
 317                 if (clocksource_tsc.mult)
 318                         clocksource_change_rating(&clocksource_tsc, 0);
 319                 else
 320                         clocksource_tsc.rating = 0;
 321         }
 322 }
 323 EXPORT_SYMBOL_GPL(mark_tsc_unstable);
 324
 325 void __init init_tsc_clocksource(void)
 326 {
 327         if (!notsc) {
 328                 clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
 329                                                         clocksource_tsc.shift);
 330                 if (check_tsc_unstable())
 331                         clocksource_tsc.rating = 0;
 332
 333                 clocksource_register(&clocksource_tsc);
 334         }
 335 }