1 /* lance.c: An AMD LANCE/PCnet ethernet driver for Linux. */
3 Written/copyright 1993-1998 by Donald Becker.
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU General Public License, incorporated herein by reference.
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100/NE2500) ethercards.
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
19 - alignment problem with 1.3.* kernel and some minor changes.
20 Thomas Bogendoerfer (tsbogend@bigbug.franken.de):
21 - added support for Linux/Alpha, but removed most of it, because
22 it worked only for the PCI chip.
23 - added hook for the 32bit lance driver
24 - added PCnetPCI II (79C970A) to chip table
25 Paul Gortmaker (gpg109@rsphy1.anu.edu.au):
26 - hopefully fix above so Linux/Alpha can use ISA cards too.
27 8/20/96 Fixed 7990 autoIRQ failure and reversed unneeded alignment -djb
28 v1.12 10/27/97 Module support -djb
29 v1.14 2/3/98 Module support modified, made PCI support optional -djb
30 v1.15 5/27/99 Fixed bug in the cleanup_module(). dev->priv was freed
31 before unregister_netdev() which caused NULL pointer
32 reference later in the chain (in rtnetlink_fill_ifinfo())
33 -- Mika Kuoppala <miku@iki.fi>
35 Forward ported v1.14 to 2.1.129, merged the PCI and misc changes from
36 the 2.1 version of the old driver - Alan Cox
38 Get rid of check_region, check kmalloc return in lance_probe1
39 Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 11/01/2001
41 Reworked detection, added support for Racal InterLan EtherBlaster cards
42 Vesselin Kostadinov <vesok at yahoo dot com > - 22/4/2004
45 static const char version[] = "lance.c:v1.15ac 1999/11/13 dplatt@3do.com, becker@cesdis.gsfc.nasa.gov\n";
47 #include <linux/module.h>
48 #include <linux/kernel.h>
49 #include <linux/string.h>
50 #include <linux/delay.h>
51 #include <linux/errno.h>
52 #include <linux/ioport.h>
53 #include <linux/slab.h>
54 #include <linux/interrupt.h>
55 #include <linux/pci.h>
56 #include <linux/init.h>
57 #include <linux/netdevice.h>
58 #include <linux/etherdevice.h>
59 #include <linux/skbuff.h>
60 #include <linux/bitops.h>
65 static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0};
66 static int lance_probe1(struct net_device *dev, int ioaddr, int irq, int options);
67 static int __init do_lance_probe(struct net_device *dev);
82 { //Racal InterLan EtherBlaster
90 static int lance_debug = LANCE_DEBUG;
92 static int lance_debug = 1;
98 I. Board Compatibility
100 This device driver is designed for the AMD 79C960, the "PCnet-ISA
101 single-chip ethernet controller for ISA". This chip is used in a wide
102 variety of boards from vendors such as Allied Telesis, HP, Kingston,
103 and Boca. This driver is also intended to work with older AMD 7990
104 designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
105 I use the name LANCE to refer to all of the AMD chips, even though it properly
106 refers only to the original 7990.
108 II. Board-specific settings
110 The driver is designed to work the boards that use the faster
111 bus-master mode, rather than in shared memory mode. (Only older designs
112 have on-board buffer memory needed to support the slower shared memory mode.)
114 Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
115 channel. This driver probes the likely base addresses:
116 {0x300, 0x320, 0x340, 0x360}.
117 After the board is found it generates a DMA-timeout interrupt and uses
118 autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
119 of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
120 probed for by enabling each free DMA channel in turn and checking if
121 initialization succeeds.
123 The HP-J2405A board is an exception: with this board it is easy to read the
124 EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
125 _know_ the base address -- that field is for writing the EEPROM.)
127 III. Driver operation
130 The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
131 the base and length of the data buffer, along with status bits. The length
132 of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
133 the buffer length (rather than being directly the buffer length) for
134 implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
135 ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
136 needlessly uses extra space and reduces the chance that an upper layer will
137 be able to reorder queued Tx packets based on priority. Decreasing the number
138 of entries makes it more difficult to achieve back-to-back packet transmission
139 and increases the chance that Rx ring will overflow. (Consider the worst case
140 of receiving back-to-back minimum-sized packets.)
142 The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
143 statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
144 avoid the administrative overhead. For the Rx side this avoids dynamically
145 allocating full-sized buffers "just in case", at the expense of a
146 memory-to-memory data copy for each packet received. For most systems this
147 is a good tradeoff: the Rx buffer will always be in low memory, the copy
148 is inexpensive, and it primes the cache for later packet processing. For Tx
149 the buffers are only used when needed as low-memory bounce buffers.
151 IIIB. 16M memory limitations.
152 For the ISA bus master mode all structures used directly by the LANCE,
153 the initialization block, Rx and Tx rings, and data buffers, must be
154 accessible from the ISA bus, i.e. in the lower 16M of real memory.
155 This is a problem for current Linux kernels on >16M machines. The network
156 devices are initialized after memory initialization, and the kernel doles out
157 memory from the top of memory downward. The current solution is to have a
158 special network initialization routine that's called before memory
159 initialization; this will eventually be generalized for all network devices.
160 As mentioned before, low-memory "bounce-buffers" are used when needed.
162 IIIC. Synchronization
163 The driver runs as two independent, single-threaded flows of control. One
164 is the send-packet routine, which enforces single-threaded use by the
165 dev->tbusy flag. The other thread is the interrupt handler, which is single
166 threaded by the hardware and other software.
168 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
169 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
170 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
171 the 'lp->tx_full' flag.
173 The interrupt handler has exclusive control over the Rx ring and records stats
174 from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
175 we can't avoid the interrupt overhead by having the Tx routine reap the Tx
176 stats.) After reaping the stats, it marks the queue entry as empty by setting
177 the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
178 tx_full and tbusy flags.
182 /* Set the number of Tx and Rx buffers, using Log_2(# buffers).
183 Reasonable default values are 16 Tx buffers, and 16 Rx buffers.
184 That translates to 4 and 4 (16 == 2^^4).
185 This is a compile-time option for efficiency.
187 #ifndef LANCE_LOG_TX_BUFFERS
188 #define LANCE_LOG_TX_BUFFERS 4
189 #define LANCE_LOG_RX_BUFFERS 4
192 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
193 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
194 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
196 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
197 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
198 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
200 #define PKT_BUF_SZ 1544
202 /* Offsets from base I/O address. */
203 #define LANCE_DATA 0x10
204 #define LANCE_ADDR 0x12
205 #define LANCE_RESET 0x14
206 #define LANCE_BUS_IF 0x16
207 #define LANCE_TOTAL_SIZE 0x18
209 #define TX_TIMEOUT 20
211 /* The LANCE Rx and Tx ring descriptors. */
212 struct lance_rx_head {
214 s16 buf_length; /* This length is 2s complement (negative)! */
215 s16 msg_length; /* This length is "normal". */
218 struct lance_tx_head {
220 s16 length; /* Length is 2s complement (negative)! */
224 /* The LANCE initialization block, described in databook. */
225 struct lance_init_block {
226 u16 mode; /* Pre-set mode (reg. 15) */
227 u8 phys_addr[6]; /* Physical ethernet address */
228 u32 filter[2]; /* Multicast filter (unused). */
229 /* Receive and transmit ring base, along with extra bits. */
230 u32 rx_ring; /* Tx and Rx ring base pointers */
234 struct lance_private {
235 /* The Tx and Rx ring entries must be aligned on 8-byte boundaries. */
236 struct lance_rx_head rx_ring[RX_RING_SIZE];
237 struct lance_tx_head tx_ring[TX_RING_SIZE];
238 struct lance_init_block init_block;
240 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
241 struct sk_buff* tx_skbuff[TX_RING_SIZE];
242 /* The addresses of receive-in-place skbuffs. */
243 struct sk_buff* rx_skbuff[RX_RING_SIZE];
244 unsigned long rx_buffs; /* Address of Rx and Tx buffers. */
245 /* Tx low-memory "bounce buffer" address. */
246 char (*tx_bounce_buffs)[PKT_BUF_SZ];
247 int cur_rx, cur_tx; /* The next free ring entry */
248 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
250 struct net_device_stats stats;
251 unsigned char chip_version; /* See lance_chip_type. */
255 #define LANCE_MUST_PAD 0x00000001
256 #define LANCE_ENABLE_AUTOSELECT 0x00000002
257 #define LANCE_MUST_REINIT_RING 0x00000004
258 #define LANCE_MUST_UNRESET 0x00000008
259 #define LANCE_HAS_MISSED_FRAME 0x00000010
261 /* A mapping from the chip ID number to the part number and features.
262 These are from the datasheets -- in real life the '970 version
263 reportedly has the same ID as the '965. */
264 static struct lance_chip_type {
269 {0x0000, "LANCE 7990", /* Ancient lance chip. */
270 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
271 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
272 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
273 LANCE_HAS_MISSED_FRAME},
274 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
275 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
276 LANCE_HAS_MISSED_FRAME},
277 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
278 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
279 LANCE_HAS_MISSED_FRAME},
280 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
282 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
283 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
284 LANCE_HAS_MISSED_FRAME},
285 {0x2621, "PCnet/PCI-II 79C970A", /* 79C970A PCInetPCI II. */
286 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
287 LANCE_HAS_MISSED_FRAME},
288 {0x0, "PCnet (unknown)",
289 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
290 LANCE_HAS_MISSED_FRAME},
293 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, PCNET_PCI_II=5, LANCE_UNKNOWN=6};
296 /* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers.
297 Assume yes until we know the memory size. */
298 static unsigned char lance_need_isa_bounce_buffers = 1;
300 static int lance_open(struct net_device *dev);
301 static void lance_init_ring(struct net_device *dev, int mode);
302 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev);
303 static int lance_rx(struct net_device *dev);
304 static irqreturn_t lance_interrupt(int irq, void *dev_id, struct pt_regs *regs);
305 static int lance_close(struct net_device *dev);
306 static struct net_device_stats *lance_get_stats(struct net_device *dev);
307 static void set_multicast_list(struct net_device *dev);
308 static void lance_tx_timeout (struct net_device *dev);
312 static void cleanup_card(struct net_device *dev)
314 struct lance_private *lp = dev->priv;
317 release_region(dev->base_addr, LANCE_TOTAL_SIZE);
318 kfree(lp->tx_bounce_buffs);
319 kfree((void*)lp->rx_buffs);
324 #define MAX_CARDS 8 /* Max number of interfaces (cards) per module */
326 static struct net_device *dev_lance[MAX_CARDS];
327 static int io[MAX_CARDS];
328 static int dma[MAX_CARDS];
329 static int irq[MAX_CARDS];
331 module_param_array(io, int, NULL, 0);
332 module_param_array(dma, int, NULL, 0);
333 module_param_array(irq, int, NULL, 0);
334 module_param(lance_debug, int, 0);
335 MODULE_PARM_DESC(io, "LANCE/PCnet I/O base address(es),required");
336 MODULE_PARM_DESC(dma, "LANCE/PCnet ISA DMA channel (ignored for some devices)");
337 MODULE_PARM_DESC(irq, "LANCE/PCnet IRQ number (ignored for some devices)");
338 MODULE_PARM_DESC(lance_debug, "LANCE/PCnet debug level (0-7)");
340 int init_module(void)
342 struct net_device *dev;
343 int this_dev, found = 0;
345 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
346 if (io[this_dev] == 0) {
347 if (this_dev != 0) /* only complain once */
349 printk(KERN_NOTICE "lance.c: Module autoprobing not allowed. Append \"io=0xNNN\" value(s).\n");
352 dev = alloc_etherdev(0);
355 dev->irq = irq[this_dev];
356 dev->base_addr = io[this_dev];
357 dev->dma = dma[this_dev];
358 if (do_lance_probe(dev) == 0) {
359 if (register_netdev(dev) == 0) {
360 dev_lance[found++] = dev;
373 void cleanup_module(void)
377 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
378 struct net_device *dev = dev_lance[this_dev];
380 unregister_netdev(dev);
387 MODULE_LICENSE("GPL");
390 /* Starting in v2.1.*, the LANCE/PCnet probe is now similar to the other
391 board probes now that kmalloc() can allocate ISA DMA-able regions.
392 This also allows the LANCE driver to be used as a module.
394 static int __init do_lance_probe(struct net_device *dev)
398 if (high_memory <= phys_to_virt(16*1024*1024))
399 lance_need_isa_bounce_buffers = 0;
401 for (port = lance_portlist; *port; port++) {
403 struct resource *r = request_region(ioaddr, LANCE_TOTAL_SIZE,
407 /* Detect the card with minimal I/O reads */
408 char offset14 = inb(ioaddr + 14);
410 for (card = 0; card < NUM_CARDS; ++card)
411 if (cards[card].id_offset14 == offset14)
413 if (card < NUM_CARDS) {/*yes, the first byte matches*/
414 char offset15 = inb(ioaddr + 15);
415 for (card = 0; card < NUM_CARDS; ++card)
416 if ((cards[card].id_offset14 == offset14) &&
417 (cards[card].id_offset15 == offset15))
420 if (card < NUM_CARDS) { /*Signature OK*/
421 result = lance_probe1(dev, ioaddr, 0, 0);
423 struct lance_private *lp = dev->priv;
424 int ver = lp->chip_version;
426 r->name = chip_table[ver].name;
430 release_region(ioaddr, LANCE_TOTAL_SIZE);
437 struct net_device * __init lance_probe(int unit)
439 struct net_device *dev = alloc_etherdev(0);
443 return ERR_PTR(-ENODEV);
445 sprintf(dev->name, "eth%d", unit);
446 netdev_boot_setup_check(dev);
448 err = do_lance_probe(dev);
451 err = register_netdev(dev);
463 static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int options)
465 struct lance_private *lp;
466 long dma_channels; /* Mark spuriously-busy DMA channels */
467 int i, reset_val, lance_version;
468 const char *chipname;
469 /* Flags for specific chips or boards. */
470 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
471 int hp_builtin = 0; /* HP on-board ethernet. */
472 static int did_version; /* Already printed version info. */
476 /* First we look for special cases.
477 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
478 There are two HP versions, check the BIOS for the configuration port.
479 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
481 if (isa_readw(0x000f0102) == 0x5048) {
482 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
483 int hp_port = (isa_readl(0x000f00f1) & 1) ? 0x499 : 0x99;
484 /* We can have boards other than the built-in! Verify this is on-board. */
485 if ((inb(hp_port) & 0xc0) == 0x80
486 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
487 hp_builtin = hp_port;
489 /* We also recognize the HP Vectra on-board here, but check below. */
490 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
491 && inb(ioaddr+2) == 0x09);
493 /* Reset the LANCE. */
494 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
496 /* The Un-Reset needed is only needed for the real NE2100, and will
497 confuse the HP board. */
499 outw(reset_val, ioaddr+LANCE_RESET);
501 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
502 if (inw(ioaddr+LANCE_DATA) != 0x0004)
505 /* Get the version of the chip. */
506 outw(88, ioaddr+LANCE_ADDR);
507 if (inw(ioaddr+LANCE_ADDR) != 88) {
509 } else { /* Good, it's a newer chip. */
510 int chip_version = inw(ioaddr+LANCE_DATA);
511 outw(89, ioaddr+LANCE_ADDR);
512 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
514 printk(" LANCE chip version is %#x.\n", chip_version);
515 if ((chip_version & 0xfff) != 0x003)
517 chip_version = (chip_version >> 12) & 0xffff;
518 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
519 if (chip_table[lance_version].id_number == chip_version)
524 /* We can't allocate dev->priv from alloc_etherdev() because it must
525 a ISA DMA-able region. */
526 SET_MODULE_OWNER(dev);
527 chipname = chip_table[lance_version].name;
528 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
530 /* There is a 16 byte station address PROM at the base address.
531 The first six bytes are the station address. */
532 for (i = 0; i < 6; i++)
533 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
535 dev->base_addr = ioaddr;
536 /* Make certain the data structures used by the LANCE are aligned and DMAble. */
538 lp = kmalloc(sizeof(*lp), GFP_DMA | GFP_KERNEL);
541 if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp);
542 memset(lp, 0, sizeof(*lp));
545 lp->rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE,
546 GFP_DMA | GFP_KERNEL);
549 if (lance_need_isa_bounce_buffers) {
550 lp->tx_bounce_buffs = kmalloc(PKT_BUF_SZ*TX_RING_SIZE,
551 GFP_DMA | GFP_KERNEL);
552 if (!lp->tx_bounce_buffs)
555 lp->tx_bounce_buffs = NULL;
557 lp->chip_version = lance_version;
558 spin_lock_init(&lp->devlock);
560 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
561 for (i = 0; i < 6; i++)
562 lp->init_block.phys_addr[i] = dev->dev_addr[i];
563 lp->init_block.filter[0] = 0x00000000;
564 lp->init_block.filter[1] = 0x00000000;
565 lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
566 lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
568 outw(0x0001, ioaddr+LANCE_ADDR);
569 inw(ioaddr+LANCE_ADDR);
570 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
571 outw(0x0002, ioaddr+LANCE_ADDR);
572 inw(ioaddr+LANCE_ADDR);
573 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
574 outw(0x0000, ioaddr+LANCE_ADDR);
575 inw(ioaddr+LANCE_ADDR);
577 if (irq) { /* Set iff PCI card. */
578 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
580 } else if (hp_builtin) {
581 static const char dma_tbl[4] = {3, 5, 6, 0};
582 static const char irq_tbl[4] = {3, 4, 5, 9};
583 unsigned char port_val = inb(hp_builtin);
584 dev->dma = dma_tbl[(port_val >> 4) & 3];
585 dev->irq = irq_tbl[(port_val >> 2) & 3];
586 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
587 } else if (hpJ2405A) {
588 static const char dma_tbl[4] = {3, 5, 6, 7};
589 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
590 short reset_val = inw(ioaddr+LANCE_RESET);
591 dev->dma = dma_tbl[(reset_val >> 2) & 3];
592 dev->irq = irq_tbl[(reset_val >> 4) & 7];
593 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
594 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
596 outw(8, ioaddr+LANCE_ADDR);
597 bus_info = inw(ioaddr+LANCE_BUS_IF);
598 dev->dma = bus_info & 0x07;
599 dev->irq = (bus_info >> 4) & 0x0F;
601 /* The DMA channel may be passed in PARAM1. */
602 if (dev->mem_start & 0x07)
603 dev->dma = dev->mem_start & 0x07;
607 /* Read the DMA channel status register, so that we can avoid
608 stuck DMA channels in the DMA detection below. */
609 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
610 (inb(DMA2_STAT_REG) & 0xf0);
614 printk(" assigned IRQ %d", dev->irq);
615 else if (lance_version != 0) { /* 7990 boards need DMA detection first. */
616 unsigned long irq_mask;
618 /* To auto-IRQ we enable the initialization-done and DMA error
619 interrupts. For ISA boards we get a DMA error, but VLB and PCI
621 irq_mask = probe_irq_on();
623 /* Trigger an initialization just for the interrupt. */
624 outw(0x0041, ioaddr+LANCE_DATA);
627 dev->irq = probe_irq_off(irq_mask);
629 printk(", probed IRQ %d", dev->irq);
631 printk(", failed to detect IRQ line.\n");
635 /* Check for the initialization done bit, 0x0100, which means
636 that we don't need a DMA channel. */
637 if (inw(ioaddr+LANCE_DATA) & 0x0100)
642 printk(", no DMA needed.\n");
643 } else if (dev->dma) {
644 if (request_dma(dev->dma, chipname)) {
645 printk("DMA %d allocation failed.\n", dev->dma);
648 printk(", assigned DMA %d.\n", dev->dma);
649 } else { /* OK, we have to auto-DMA. */
650 for (i = 0; i < 4; i++) {
651 static const char dmas[] = { 5, 6, 7, 3 };
655 /* Don't enable a permanently busy DMA channel, or the machine
657 if (test_bit(dma, &dma_channels))
659 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
660 if (request_dma(dma, chipname))
663 flags=claim_dma_lock();
664 set_dma_mode(dma, DMA_MODE_CASCADE);
666 release_dma_lock(flags);
668 /* Trigger an initialization. */
669 outw(0x0001, ioaddr+LANCE_DATA);
670 for (boguscnt = 100; boguscnt > 0; --boguscnt)
671 if (inw(ioaddr+LANCE_DATA) & 0x0900)
673 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
675 printk(", DMA %d.\n", dev->dma);
678 flags=claim_dma_lock();
680 release_dma_lock(flags);
684 if (i == 4) { /* Failure: bail. */
685 printk("DMA detection failed.\n");
690 if (lance_version == 0 && dev->irq == 0) {
691 /* We may auto-IRQ now that we have a DMA channel. */
692 /* Trigger an initialization just for the interrupt. */
693 unsigned long irq_mask;
695 irq_mask = probe_irq_on();
696 outw(0x0041, ioaddr+LANCE_DATA);
699 dev->irq = probe_irq_off(irq_mask);
701 printk(" Failed to detect the 7990 IRQ line.\n");
704 printk(" Auto-IRQ detected IRQ%d.\n", dev->irq);
707 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
708 /* Turn on auto-select of media (10baseT or BNC) so that the user
709 can watch the LEDs even if the board isn't opened. */
710 outw(0x0002, ioaddr+LANCE_ADDR);
711 /* Don't touch 10base2 power bit. */
712 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
715 if (lance_debug > 0 && did_version++ == 0)
718 /* The LANCE-specific entries in the device structure. */
719 dev->open = lance_open;
720 dev->hard_start_xmit = lance_start_xmit;
721 dev->stop = lance_close;
722 dev->get_stats = lance_get_stats;
723 dev->set_multicast_list = set_multicast_list;
724 dev->tx_timeout = lance_tx_timeout;
725 dev->watchdog_timeo = TX_TIMEOUT;
732 kfree(lp->tx_bounce_buffs);
734 kfree((void*)lp->rx_buffs);
742 lance_open(struct net_device *dev)
744 struct lance_private *lp = dev->priv;
745 int ioaddr = dev->base_addr;
749 request_irq(dev->irq, &lance_interrupt, 0, lp->name, dev)) {
753 /* We used to allocate DMA here, but that was silly.
754 DMA lines can't be shared! We now permanently allocate them. */
756 /* Reset the LANCE */
757 inw(ioaddr+LANCE_RESET);
759 /* The DMA controller is used as a no-operation slave, "cascade mode". */
761 unsigned long flags=claim_dma_lock();
762 enable_dma(dev->dma);
763 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
764 release_dma_lock(flags);
767 /* Un-Reset the LANCE, needed only for the NE2100. */
768 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
769 outw(0, ioaddr+LANCE_RESET);
771 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
772 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
773 outw(0x0002, ioaddr+LANCE_ADDR);
774 /* Only touch autoselect bit. */
775 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
779 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
780 dev->name, dev->irq, dev->dma,
781 (u32) isa_virt_to_bus(lp->tx_ring),
782 (u32) isa_virt_to_bus(lp->rx_ring),
783 (u32) isa_virt_to_bus(&lp->init_block));
785 lance_init_ring(dev, GFP_KERNEL);
786 /* Re-initialize the LANCE, and start it when done. */
787 outw(0x0001, ioaddr+LANCE_ADDR);
788 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
789 outw(0x0002, ioaddr+LANCE_ADDR);
790 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
792 outw(0x0004, ioaddr+LANCE_ADDR);
793 outw(0x0915, ioaddr+LANCE_DATA);
795 outw(0x0000, ioaddr+LANCE_ADDR);
796 outw(0x0001, ioaddr+LANCE_DATA);
798 netif_start_queue (dev);
802 if (inw(ioaddr+LANCE_DATA) & 0x0100)
805 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
806 * reports that doing so triggers a bug in the '974.
808 outw(0x0042, ioaddr+LANCE_DATA);
811 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
812 dev->name, i, (u32) isa_virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA));
814 return 0; /* Always succeed */
817 /* The LANCE has been halted for one reason or another (busmaster memory
818 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
819 etc.). Modern LANCE variants always reload their ring-buffer
820 configuration when restarted, so we must reinitialize our ring
821 context before restarting. As part of this reinitialization,
822 find all packets still on the Tx ring and pretend that they had been
823 sent (in effect, drop the packets on the floor) - the higher-level
824 protocols will time out and retransmit. It'd be better to shuffle
825 these skbs to a temp list and then actually re-Tx them after
826 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
830 lance_purge_ring(struct net_device *dev)
832 struct lance_private *lp = dev->priv;
835 /* Free all the skbuffs in the Rx and Tx queues. */
836 for (i = 0; i < RX_RING_SIZE; i++) {
837 struct sk_buff *skb = lp->rx_skbuff[i];
838 lp->rx_skbuff[i] = NULL;
839 lp->rx_ring[i].base = 0; /* Not owned by LANCE chip. */
841 dev_kfree_skb_any(skb);
843 for (i = 0; i < TX_RING_SIZE; i++) {
844 if (lp->tx_skbuff[i]) {
845 dev_kfree_skb_any(lp->tx_skbuff[i]);
846 lp->tx_skbuff[i] = NULL;
852 /* Initialize the LANCE Rx and Tx rings. */
854 lance_init_ring(struct net_device *dev, int gfp)
856 struct lance_private *lp = dev->priv;
859 lp->cur_rx = lp->cur_tx = 0;
860 lp->dirty_rx = lp->dirty_tx = 0;
862 for (i = 0; i < RX_RING_SIZE; i++) {
866 skb = alloc_skb(PKT_BUF_SZ, GFP_DMA | gfp);
867 lp->rx_skbuff[i] = skb;
872 rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp);
874 lp->rx_ring[i].base = 0;
876 lp->rx_ring[i].base = (u32)isa_virt_to_bus(rx_buff) | 0x80000000;
877 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
879 /* The Tx buffer address is filled in as needed, but we do need to clear
880 the upper ownership bit. */
881 for (i = 0; i < TX_RING_SIZE; i++) {
882 lp->tx_skbuff[i] = NULL;
883 lp->tx_ring[i].base = 0;
886 lp->init_block.mode = 0x0000;
887 for (i = 0; i < 6; i++)
888 lp->init_block.phys_addr[i] = dev->dev_addr[i];
889 lp->init_block.filter[0] = 0x00000000;
890 lp->init_block.filter[1] = 0x00000000;
891 lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
892 lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
896 lance_restart(struct net_device *dev, unsigned int csr0_bits, int must_reinit)
898 struct lance_private *lp = dev->priv;
901 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
902 lance_purge_ring(dev);
903 lance_init_ring(dev, GFP_ATOMIC);
905 outw(0x0000, dev->base_addr + LANCE_ADDR);
906 outw(csr0_bits, dev->base_addr + LANCE_DATA);
910 static void lance_tx_timeout (struct net_device *dev)
912 struct lance_private *lp = (struct lance_private *) dev->priv;
913 int ioaddr = dev->base_addr;
915 outw (0, ioaddr + LANCE_ADDR);
916 printk ("%s: transmit timed out, status %4.4x, resetting.\n",
917 dev->name, inw (ioaddr + LANCE_DATA));
918 outw (0x0004, ioaddr + LANCE_DATA);
919 lp->stats.tx_errors++;
920 #ifndef final_version
921 if (lance_debug > 3) {
923 printk (" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
924 lp->dirty_tx, lp->cur_tx, netif_queue_stopped(dev) ? " (full)" : "",
926 for (i = 0; i < RX_RING_SIZE; i++)
927 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
928 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
929 lp->rx_ring[i].msg_length);
930 for (i = 0; i < TX_RING_SIZE; i++)
931 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
932 lp->tx_ring[i].base, -lp->tx_ring[i].length,
933 lp->tx_ring[i].misc);
937 lance_restart (dev, 0x0043, 1);
939 dev->trans_start = jiffies;
940 netif_wake_queue (dev);
944 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
946 struct lance_private *lp = dev->priv;
947 int ioaddr = dev->base_addr;
951 spin_lock_irqsave(&lp->devlock, flags);
953 if (lance_debug > 3) {
954 outw(0x0000, ioaddr+LANCE_ADDR);
955 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
956 inw(ioaddr+LANCE_DATA));
957 outw(0x0000, ioaddr+LANCE_DATA);
960 /* Fill in a Tx ring entry */
962 /* Mask to ring buffer boundary. */
963 entry = lp->cur_tx & TX_RING_MOD_MASK;
965 /* Caution: the write order is important here, set the base address
966 with the "ownership" bits last. */
968 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
969 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
970 if (skb->len < ETH_ZLEN) {
971 skb = skb_padto(skb, ETH_ZLEN);
974 lp->tx_ring[entry].length = -ETH_ZLEN;
977 lp->tx_ring[entry].length = -skb->len;
979 lp->tx_ring[entry].length = -skb->len;
981 lp->tx_ring[entry].misc = 0x0000;
983 lp->stats.tx_bytes += skb->len;
985 /* If any part of this buffer is >16M we must copy it to a low-memory
987 if ((u32)isa_virt_to_bus(skb->data) + skb->len > 0x01000000) {
989 printk("%s: bouncing a high-memory packet (%#x).\n",
990 dev->name, (u32)isa_virt_to_bus(skb->data));
991 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
992 lp->tx_ring[entry].base =
993 ((u32)isa_virt_to_bus((lp->tx_bounce_buffs + entry)) & 0xffffff) | 0x83000000;
996 lp->tx_skbuff[entry] = skb;
997 lp->tx_ring[entry].base = ((u32)isa_virt_to_bus(skb->data) & 0xffffff) | 0x83000000;
1001 /* Trigger an immediate send poll. */
1002 outw(0x0000, ioaddr+LANCE_ADDR);
1003 outw(0x0048, ioaddr+LANCE_DATA);
1005 dev->trans_start = jiffies;
1007 if ((lp->cur_tx - lp->dirty_tx) >= TX_RING_SIZE)
1008 netif_stop_queue(dev);
1011 spin_unlock_irqrestore(&lp->devlock, flags);
1015 /* The LANCE interrupt handler. */
1017 lance_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1019 struct net_device *dev = dev_id;
1020 struct lance_private *lp;
1021 int csr0, ioaddr, boguscnt=10;
1025 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
1029 ioaddr = dev->base_addr;
1032 spin_lock (&lp->devlock);
1034 outw(0x00, dev->base_addr + LANCE_ADDR);
1035 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
1036 && --boguscnt >= 0) {
1037 /* Acknowledge all of the current interrupt sources ASAP. */
1038 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
1042 if (lance_debug > 5)
1043 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
1044 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
1046 if (csr0 & 0x0400) /* Rx interrupt */
1049 if (csr0 & 0x0200) { /* Tx-done interrupt */
1050 int dirty_tx = lp->dirty_tx;
1052 while (dirty_tx < lp->cur_tx) {
1053 int entry = dirty_tx & TX_RING_MOD_MASK;
1054 int status = lp->tx_ring[entry].base;
1057 break; /* It still hasn't been Txed */
1059 lp->tx_ring[entry].base = 0;
1061 if (status & 0x40000000) {
1062 /* There was an major error, log it. */
1063 int err_status = lp->tx_ring[entry].misc;
1064 lp->stats.tx_errors++;
1065 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
1066 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
1067 if (err_status & 0x1000) lp->stats.tx_window_errors++;
1068 if (err_status & 0x4000) {
1069 /* Ackk! On FIFO errors the Tx unit is turned off! */
1070 lp->stats.tx_fifo_errors++;
1071 /* Remove this verbosity later! */
1072 printk("%s: Tx FIFO error! Status %4.4x.\n",
1074 /* Restart the chip. */
1078 if (status & 0x18000000)
1079 lp->stats.collisions++;
1080 lp->stats.tx_packets++;
1083 /* We must free the original skb if it's not a data-only copy
1084 in the bounce buffer. */
1085 if (lp->tx_skbuff[entry]) {
1086 dev_kfree_skb_irq(lp->tx_skbuff[entry]);
1087 lp->tx_skbuff[entry] = NULL;
1092 #ifndef final_version
1093 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
1094 printk("out-of-sync dirty pointer, %d vs. %d, full=%s.\n",
1095 dirty_tx, lp->cur_tx,
1096 netif_queue_stopped(dev) ? "yes" : "no");
1097 dirty_tx += TX_RING_SIZE;
1101 /* if the ring is no longer full, accept more packets */
1102 if (netif_queue_stopped(dev) &&
1103 dirty_tx > lp->cur_tx - TX_RING_SIZE + 2)
1104 netif_wake_queue (dev);
1106 lp->dirty_tx = dirty_tx;
1109 /* Log misc errors. */
1110 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
1111 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
1112 if (csr0 & 0x0800) {
1113 printk("%s: Bus master arbitration failure, status %4.4x.\n",
1115 /* Restart the chip. */
1120 /* stop the chip to clear the error condition, then restart */
1121 outw(0x0000, dev->base_addr + LANCE_ADDR);
1122 outw(0x0004, dev->base_addr + LANCE_DATA);
1123 lance_restart(dev, 0x0002, 0);
1127 /* Clear any other interrupt, and set interrupt enable. */
1128 outw(0x0000, dev->base_addr + LANCE_ADDR);
1129 outw(0x7940, dev->base_addr + LANCE_DATA);
1131 if (lance_debug > 4)
1132 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
1133 dev->name, inw(ioaddr + LANCE_ADDR),
1134 inw(dev->base_addr + LANCE_DATA));
1136 spin_unlock (&lp->devlock);
1141 lance_rx(struct net_device *dev)
1143 struct lance_private *lp = dev->priv;
1144 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1147 /* If we own the next entry, it's a new packet. Send it up. */
1148 while (lp->rx_ring[entry].base >= 0) {
1149 int status = lp->rx_ring[entry].base >> 24;
1151 if (status != 0x03) { /* There was an error. */
1152 /* There is a tricky error noted by John Murphy,
1153 <murf@perftech.com> to Russ Nelson: Even with full-sized
1154 buffers it's possible for a jabber packet to use two
1155 buffers, with only the last correctly noting the error. */
1156 if (status & 0x01) /* Only count a general error at the */
1157 lp->stats.rx_errors++; /* end of a packet.*/
1158 if (status & 0x20) lp->stats.rx_frame_errors++;
1159 if (status & 0x10) lp->stats.rx_over_errors++;
1160 if (status & 0x08) lp->stats.rx_crc_errors++;
1161 if (status & 0x04) lp->stats.rx_fifo_errors++;
1162 lp->rx_ring[entry].base &= 0x03ffffff;
1166 /* Malloc up new buffer, compatible with net3. */
1167 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
1168 struct sk_buff *skb;
1172 printk("%s: Runt packet!\n",dev->name);
1173 lp->stats.rx_errors++;
1177 skb = dev_alloc_skb(pkt_len+2);
1180 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1181 for (i=0; i < RX_RING_SIZE; i++)
1182 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
1185 if (i > RX_RING_SIZE -2)
1187 lp->stats.rx_dropped++;
1188 lp->rx_ring[entry].base |= 0x80000000;
1194 skb_reserve(skb,2); /* 16 byte align */
1195 skb_put(skb,pkt_len); /* Make room */
1196 eth_copy_and_sum(skb,
1197 (unsigned char *)isa_bus_to_virt((lp->rx_ring[entry].base & 0x00ffffff)),
1199 skb->protocol=eth_type_trans(skb,dev);
1201 dev->last_rx = jiffies;
1202 lp->stats.rx_packets++;
1203 lp->stats.rx_bytes+=pkt_len;
1206 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1207 of QNX reports that some revs of the 79C965 clear it. */
1208 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1209 lp->rx_ring[entry].base |= 0x80000000;
1210 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1213 /* We should check that at least two ring entries are free. If not,
1214 we should free one and mark stats->rx_dropped++. */
1220 lance_close(struct net_device *dev)
1222 int ioaddr = dev->base_addr;
1223 struct lance_private *lp = dev->priv;
1225 netif_stop_queue (dev);
1227 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1228 outw(112, ioaddr+LANCE_ADDR);
1229 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1231 outw(0, ioaddr+LANCE_ADDR);
1233 if (lance_debug > 1)
1234 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1235 dev->name, inw(ioaddr+LANCE_DATA));
1237 /* We stop the LANCE here -- it occasionally polls
1238 memory if we don't. */
1239 outw(0x0004, ioaddr+LANCE_DATA);
1243 unsigned long flags=claim_dma_lock();
1244 disable_dma(dev->dma);
1245 release_dma_lock(flags);
1247 free_irq(dev->irq, dev);
1249 lance_purge_ring(dev);
1254 static struct net_device_stats *lance_get_stats(struct net_device *dev)
1256 struct lance_private *lp = dev->priv;
1258 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1259 short ioaddr = dev->base_addr;
1261 unsigned long flags;
1263 spin_lock_irqsave(&lp->devlock, flags);
1264 saved_addr = inw(ioaddr+LANCE_ADDR);
1265 outw(112, ioaddr+LANCE_ADDR);
1266 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1267 outw(saved_addr, ioaddr+LANCE_ADDR);
1268 spin_unlock_irqrestore(&lp->devlock, flags);
1274 /* Set or clear the multicast filter for this adaptor.
1277 static void set_multicast_list(struct net_device *dev)
1279 short ioaddr = dev->base_addr;
1281 outw(0, ioaddr+LANCE_ADDR);
1282 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1284 if (dev->flags&IFF_PROMISC) {
1285 /* Log any net taps. */
1286 printk("%s: Promiscuous mode enabled.\n", dev->name);
1287 outw(15, ioaddr+LANCE_ADDR);
1288 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1290 short multicast_table[4];
1292 int num_addrs=dev->mc_count;
1293 if(dev->flags&IFF_ALLMULTI)
1295 /* FIXIT: We don't use the multicast table, but rely on upper-layer filtering. */
1296 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1297 for (i = 0; i < 4; i++) {
1298 outw(8 + i, ioaddr+LANCE_ADDR);
1299 outw(multicast_table[i], ioaddr+LANCE_DATA);
1301 outw(15, ioaddr+LANCE_ADDR);
1302 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1305 lance_restart(dev, 0x0142, 0); /* Resume normal operation */