2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
9 * Special Thanks to Mark for his Six years of work.
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
32 * Use "hdparm -i" to view modes supported by a given drive.
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
73 * ATA-66/100 and recovery functions, I forgot the rest......
77 #include <linux/module.h>
78 #include <linux/types.h>
79 #include <linux/kernel.h>
80 #include <linux/timer.h>
82 #include <linux/interrupt.h>
83 #include <linux/pci.h>
84 #include <linux/init.h>
85 #include <linux/ide.h>
86 #include <linux/delay.h>
87 #include <linux/scatterlist.h>
92 static const struct drive_list_entry drive_whitelist [] = {
94 { "Micropolis 2112A" , "ALL" },
95 { "CONNER CTMA 4000" , "ALL" },
96 { "CONNER CTT8000-A" , "ALL" },
97 { "ST34342A" , "ALL" },
101 static const struct drive_list_entry drive_blacklist [] = {
103 { "WDC AC11000H" , "ALL" },
104 { "WDC AC22100H" , "ALL" },
105 { "WDC AC32500H" , "ALL" },
106 { "WDC AC33100H" , "ALL" },
107 { "WDC AC31600H" , "ALL" },
108 { "WDC AC32100H" , "24.09P07" },
109 { "WDC AC23200L" , "21.10N21" },
110 { "Compaq CRD-8241B" , "ALL" },
111 { "CRD-8400B" , "ALL" },
112 { "CRD-8480B", "ALL" },
113 { "CRD-8482B", "ALL" },
114 { "CRD-84" , "ALL" },
115 { "SanDisk SDP3B" , "ALL" },
116 { "SanDisk SDP3B-64" , "ALL" },
117 { "SANYO CD-ROM CRD" , "ALL" },
118 { "HITACHI CDR-8" , "ALL" },
119 { "HITACHI CDR-8335" , "ALL" },
120 { "HITACHI CDR-8435" , "ALL" },
121 { "Toshiba CD-ROM XM-6202B" , "ALL" },
122 { "CD-532E-A" , "ALL" },
123 { "E-IDE CD-ROM CR-840", "ALL" },
124 { "CD-ROM Drive/F5A", "ALL" },
125 { "WPI CDD-820", "ALL" },
126 { "SAMSUNG CD-ROM SC-148C", "ALL" },
127 { "SAMSUNG CD-ROM SC", "ALL" },
128 { "SanDisk SDP3B-64" , "ALL" },
129 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", "ALL" },
130 { "_NEC DV5800A", "ALL" },
136 * ide_in_drive_list - look for drive in black/white list
137 * @id: drive identifier
138 * @drive_table: list to inspect
140 * Look for a drive in the blacklist and the whitelist tables
141 * Returns 1 if the drive is found in the table.
144 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
146 for ( ; drive_table->id_model ; drive_table++)
147 if ((!strcmp(drive_table->id_model, id->model)) &&
148 ((strstr(id->fw_rev, drive_table->id_firmware)) ||
149 (!strcmp(drive_table->id_firmware, "ALL"))))
155 * ide_dma_intr - IDE DMA interrupt handler
156 * @drive: the drive the interrupt is for
158 * Handle an interrupt completing a read/write DMA transfer on an
162 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
164 u8 stat = 0, dma_stat = 0;
166 dma_stat = HWIF(drive)->ide_dma_end(drive);
167 stat = HWIF(drive)->INB(IDE_STATUS_REG); /* get drive status */
168 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
170 struct request *rq = HWGROUP(drive)->rq;
175 drv = *(ide_driver_t **)rq->rq_disk->private_data;
176 drv->end_request(drive, 1, rq->nr_sectors);
178 ide_end_request(drive, 1, rq->nr_sectors);
181 printk(KERN_ERR "%s: dma_intr: bad DMA status (dma_stat=%x)\n",
182 drive->name, dma_stat);
184 return ide_error(drive, "dma_intr", stat);
187 EXPORT_SYMBOL_GPL(ide_dma_intr);
189 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
191 * ide_build_sglist - map IDE scatter gather for DMA I/O
192 * @drive: the drive to build the DMA table for
193 * @rq: the request holding the sg list
195 * Perform the PCI mapping magic necessary to access the source or
196 * target buffers of a request via PCI DMA. The lower layers of the
197 * kernel provide the necessary cache management so that we can
198 * operate in a portable fashion
201 int ide_build_sglist(ide_drive_t *drive, struct request *rq)
203 ide_hwif_t *hwif = HWIF(drive);
204 struct scatterlist *sg = hwif->sg_table;
206 BUG_ON((rq->cmd_type == REQ_TYPE_ATA_TASKFILE) && rq->nr_sectors > 256);
208 ide_map_sg(drive, rq);
210 if (rq_data_dir(rq) == READ)
211 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
213 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
215 return pci_map_sg(hwif->pci_dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
218 EXPORT_SYMBOL_GPL(ide_build_sglist);
221 * ide_build_dmatable - build IDE DMA table
223 * ide_build_dmatable() prepares a dma request. We map the command
224 * to get the pci bus addresses of the buffers and then build up
225 * the PRD table that the IDE layer wants to be fed. The code
226 * knows about the 64K wrap bug in the CS5530.
228 * Returns the number of built PRD entries if all went okay,
229 * returns 0 otherwise.
231 * May also be invoked from trm290.c
234 int ide_build_dmatable (ide_drive_t *drive, struct request *rq)
236 ide_hwif_t *hwif = HWIF(drive);
237 unsigned int *table = hwif->dmatable_cpu;
238 unsigned int is_trm290 = (hwif->chipset == ide_trm290) ? 1 : 0;
239 unsigned int count = 0;
241 struct scatterlist *sg;
243 hwif->sg_nents = i = ide_build_sglist(drive, rq);
253 cur_addr = sg_dma_address(sg);
254 cur_len = sg_dma_len(sg);
257 * Fill in the dma table, without crossing any 64kB boundaries.
258 * Most hardware requires 16-bit alignment of all blocks,
259 * but the trm290 requires 32-bit alignment.
263 if (count++ >= PRD_ENTRIES) {
264 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
265 goto use_pio_instead;
267 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
269 if (bcount > cur_len)
271 *table++ = cpu_to_le32(cur_addr);
272 xcount = bcount & 0xffff;
274 xcount = ((xcount >> 2) - 1) << 16;
275 if (xcount == 0x0000) {
277 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
278 * but at least one (e.g. CS5530) misinterprets it as zero (!).
279 * So here we break the 64KB entry into two 32KB entries instead.
281 if (count++ >= PRD_ENTRIES) {
282 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
283 goto use_pio_instead;
285 *table++ = cpu_to_le32(0x8000);
286 *table++ = cpu_to_le32(cur_addr + 0x8000);
289 *table++ = cpu_to_le32(xcount);
301 *--table |= cpu_to_le32(0x80000000);
304 printk(KERN_ERR "%s: empty DMA table?\n", drive->name);
306 pci_unmap_sg(hwif->pci_dev,
309 hwif->sg_dma_direction);
310 return 0; /* revert to PIO for this request */
313 EXPORT_SYMBOL_GPL(ide_build_dmatable);
316 * ide_destroy_dmatable - clean up DMA mapping
317 * @drive: The drive to unmap
319 * Teardown mappings after DMA has completed. This must be called
320 * after the completion of each use of ide_build_dmatable and before
321 * the next use of ide_build_dmatable. Failure to do so will cause
322 * an oops as only one mapping can be live for each target at a given
326 void ide_destroy_dmatable (ide_drive_t *drive)
328 struct pci_dev *dev = HWIF(drive)->pci_dev;
329 struct scatterlist *sg = HWIF(drive)->sg_table;
330 int nents = HWIF(drive)->sg_nents;
332 pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
335 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
338 * config_drive_for_dma - attempt to activate IDE DMA
339 * @drive: the drive to place in DMA mode
341 * If the drive supports at least mode 2 DMA or UDMA of any kind
342 * then attempt to place it into DMA mode. Drives that are known to
343 * support DMA but predate the DMA properties or that are known
344 * to have DMA handling bugs are also set up appropriately based
345 * on the good/bad drive lists.
348 static int config_drive_for_dma (ide_drive_t *drive)
350 struct hd_driveid *id = drive->id;
352 if ((id->capability & 1) && drive->hwif->autodma) {
354 * Enable DMA on any drive that has
355 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
357 if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
360 * Enable DMA on any drive that has mode2 DMA
361 * (multi or single) enabled
363 if (id->field_valid & 2) /* regular DMA */
364 if ((id->dma_mword & 0x404) == 0x404 ||
365 (id->dma_1word & 0x404) == 0x404)
368 /* Consult the list of known "good" drives */
369 if (__ide_dma_good_drive(drive))
377 * dma_timer_expiry - handle a DMA timeout
378 * @drive: Drive that timed out
380 * An IDE DMA transfer timed out. In the event of an error we ask
381 * the driver to resolve the problem, if a DMA transfer is still
382 * in progress we continue to wait (arguably we need to add a
383 * secondary 'I don't care what the drive thinks' timeout here)
384 * Finally if we have an interrupt we let it complete the I/O.
385 * But only one time - we clear expiry and if it's still not
386 * completed after WAIT_CMD, we error and retry in PIO.
387 * This can occur if an interrupt is lost or due to hang or bugs.
390 static int dma_timer_expiry (ide_drive_t *drive)
392 ide_hwif_t *hwif = HWIF(drive);
393 u8 dma_stat = hwif->INB(hwif->dma_status);
395 printk(KERN_WARNING "%s: dma_timer_expiry: dma status == 0x%02x\n",
396 drive->name, dma_stat);
398 if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
401 HWGROUP(drive)->expiry = NULL; /* one free ride for now */
403 /* 1 dmaing, 2 error, 4 intr */
404 if (dma_stat & 2) /* ERROR */
407 if (dma_stat & 1) /* DMAing */
410 if (dma_stat & 4) /* Got an Interrupt */
413 return 0; /* Status is unknown -- reset the bus */
417 * ide_dma_host_off - Generic DMA kill
418 * @drive: drive to control
420 * Perform the generic IDE controller DMA off operation. This
421 * works for most IDE bus mastering controllers
424 void ide_dma_host_off(ide_drive_t *drive)
426 ide_hwif_t *hwif = HWIF(drive);
427 u8 unit = (drive->select.b.unit & 0x01);
428 u8 dma_stat = hwif->INB(hwif->dma_status);
430 hwif->OUTB((dma_stat & ~(1<<(5+unit))), hwif->dma_status);
433 EXPORT_SYMBOL(ide_dma_host_off);
436 * ide_dma_off_quietly - Generic DMA kill
437 * @drive: drive to control
439 * Turn off the current DMA on this IDE controller.
442 void ide_dma_off_quietly(ide_drive_t *drive)
444 drive->using_dma = 0;
445 ide_toggle_bounce(drive, 0);
447 drive->hwif->dma_host_off(drive);
450 EXPORT_SYMBOL(ide_dma_off_quietly);
451 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
454 * ide_dma_off - disable DMA on a device
455 * @drive: drive to disable DMA on
457 * Disable IDE DMA for a device on this IDE controller.
458 * Inform the user that DMA has been disabled.
461 void ide_dma_off(ide_drive_t *drive)
463 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
464 drive->hwif->dma_off_quietly(drive);
467 EXPORT_SYMBOL(ide_dma_off);
469 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
471 * ide_dma_host_on - Enable DMA on a host
472 * @drive: drive to enable for DMA
474 * Enable DMA on an IDE controller following generic bus mastering
475 * IDE controller behaviour
478 void ide_dma_host_on(ide_drive_t *drive)
480 if (drive->using_dma) {
481 ide_hwif_t *hwif = HWIF(drive);
482 u8 unit = (drive->select.b.unit & 0x01);
483 u8 dma_stat = hwif->INB(hwif->dma_status);
485 hwif->OUTB((dma_stat|(1<<(5+unit))), hwif->dma_status);
489 EXPORT_SYMBOL(ide_dma_host_on);
492 * __ide_dma_on - Enable DMA on a device
493 * @drive: drive to enable DMA on
495 * Enable IDE DMA for a device on this IDE controller.
498 int __ide_dma_on (ide_drive_t *drive)
500 /* consult the list of known "bad" drives */
501 if (__ide_dma_bad_drive(drive))
504 drive->using_dma = 1;
505 ide_toggle_bounce(drive, 1);
507 drive->hwif->dma_host_on(drive);
512 EXPORT_SYMBOL(__ide_dma_on);
515 * __ide_dma_check - check DMA setup
516 * @drive: drive to check
518 * Don't use - due for extermination
521 int __ide_dma_check (ide_drive_t *drive)
523 return config_drive_for_dma(drive);
526 EXPORT_SYMBOL(__ide_dma_check);
529 * ide_dma_setup - begin a DMA phase
530 * @drive: target device
532 * Build an IDE DMA PRD (IDE speak for scatter gather table)
533 * and then set up the DMA transfer registers for a device
534 * that follows generic IDE PCI DMA behaviour. Controllers can
535 * override this function if they need to
537 * Returns 0 on success. If a PIO fallback is required then 1
541 int ide_dma_setup(ide_drive_t *drive)
543 ide_hwif_t *hwif = drive->hwif;
544 struct request *rq = HWGROUP(drive)->rq;
545 unsigned int reading;
553 /* fall back to pio! */
554 if (!ide_build_dmatable(drive, rq)) {
555 ide_map_sg(drive, rq);
561 writel(hwif->dmatable_dma, (void __iomem *)hwif->dma_prdtable);
563 outl(hwif->dmatable_dma, hwif->dma_prdtable);
566 hwif->OUTB(reading, hwif->dma_command);
568 /* read dma_status for INTR & ERROR flags */
569 dma_stat = hwif->INB(hwif->dma_status);
571 /* clear INTR & ERROR flags */
572 hwif->OUTB(dma_stat|6, hwif->dma_status);
573 drive->waiting_for_dma = 1;
577 EXPORT_SYMBOL_GPL(ide_dma_setup);
579 static void ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
581 /* issue cmd to drive */
582 ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, dma_timer_expiry);
585 void ide_dma_start(ide_drive_t *drive)
587 ide_hwif_t *hwif = HWIF(drive);
588 u8 dma_cmd = hwif->INB(hwif->dma_command);
590 /* Note that this is done *after* the cmd has
591 * been issued to the drive, as per the BM-IDE spec.
592 * The Promise Ultra33 doesn't work correctly when
593 * we do this part before issuing the drive cmd.
596 hwif->OUTB(dma_cmd|1, hwif->dma_command);
601 EXPORT_SYMBOL_GPL(ide_dma_start);
603 /* returns 1 on error, 0 otherwise */
604 int __ide_dma_end (ide_drive_t *drive)
606 ide_hwif_t *hwif = HWIF(drive);
607 u8 dma_stat = 0, dma_cmd = 0;
609 drive->waiting_for_dma = 0;
610 /* get dma_command mode */
611 dma_cmd = hwif->INB(hwif->dma_command);
613 hwif->OUTB(dma_cmd&~1, hwif->dma_command);
615 dma_stat = hwif->INB(hwif->dma_status);
616 /* clear the INTR & ERROR bits */
617 hwif->OUTB(dma_stat|6, hwif->dma_status);
618 /* purge DMA mappings */
619 ide_destroy_dmatable(drive);
620 /* verify good DMA status */
623 return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0;
626 EXPORT_SYMBOL(__ide_dma_end);
628 /* returns 1 if dma irq issued, 0 otherwise */
629 static int __ide_dma_test_irq(ide_drive_t *drive)
631 ide_hwif_t *hwif = HWIF(drive);
632 u8 dma_stat = hwif->INB(hwif->dma_status);
634 #if 0 /* do not set unless you know what you are doing */
636 u8 stat = hwif->INB(IDE_STATUS_REG);
637 hwif->OUTB(hwif->dma_status, dma_stat & 0xE4);
640 /* return 1 if INTR asserted */
641 if ((dma_stat & 4) == 4)
643 if (!drive->waiting_for_dma)
644 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
645 drive->name, __FUNCTION__);
648 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
650 int __ide_dma_bad_drive (ide_drive_t *drive)
652 struct hd_driveid *id = drive->id;
654 int blacklist = ide_in_drive_list(id, drive_blacklist);
656 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
657 drive->name, id->model);
663 EXPORT_SYMBOL(__ide_dma_bad_drive);
665 int __ide_dma_good_drive (ide_drive_t *drive)
667 struct hd_driveid *id = drive->id;
668 return ide_in_drive_list(id, drive_whitelist);
671 EXPORT_SYMBOL(__ide_dma_good_drive);
673 int ide_use_dma(ide_drive_t *drive)
675 struct hd_driveid *id = drive->id;
676 ide_hwif_t *hwif = drive->hwif;
678 if ((id->capability & 1) == 0 || drive->autodma == 0)
681 /* consult the list of known "bad" drives */
682 if (__ide_dma_bad_drive(drive))
685 /* capable of UltraDMA modes */
686 if (id->field_valid & 4) {
687 if (hwif->ultra_mask & id->dma_ultra)
691 /* capable of regular DMA modes */
692 if (id->field_valid & 2) {
693 if (hwif->mwdma_mask & id->dma_mword)
695 if (hwif->swdma_mask & id->dma_1word)
699 /* consult the list of known "good" drives */
700 if (__ide_dma_good_drive(drive) && id->eide_dma_time < 150)
706 EXPORT_SYMBOL_GPL(ide_use_dma);
708 void ide_dma_verbose(ide_drive_t *drive)
710 struct hd_driveid *id = drive->id;
711 ide_hwif_t *hwif = HWIF(drive);
713 if (id->field_valid & 4) {
714 if ((id->dma_ultra >> 8) && (id->dma_mword >> 8))
716 if (id->dma_ultra & ((id->dma_ultra >> 8) & hwif->ultra_mask)) {
717 if (((id->dma_ultra >> 11) & 0x1F) &&
718 eighty_ninty_three(drive)) {
719 if ((id->dma_ultra >> 15) & 1) {
720 printk(", UDMA(mode 7)");
721 } else if ((id->dma_ultra >> 14) & 1) {
722 printk(", UDMA(133)");
723 } else if ((id->dma_ultra >> 13) & 1) {
724 printk(", UDMA(100)");
725 } else if ((id->dma_ultra >> 12) & 1) {
726 printk(", UDMA(66)");
727 } else if ((id->dma_ultra >> 11) & 1) {
728 printk(", UDMA(44)");
733 if ((id->dma_ultra >> 10) & 1) {
734 printk(", UDMA(33)");
735 } else if ((id->dma_ultra >> 9) & 1) {
736 printk(", UDMA(25)");
737 } else if ((id->dma_ultra >> 8) & 1) {
738 printk(", UDMA(16)");
742 printk(", (U)DMA"); /* Can be BIOS-enabled! */
744 } else if (id->field_valid & 2) {
745 if ((id->dma_mword >> 8) && (id->dma_1word >> 8))
748 } else if (id->field_valid & 1) {
753 printk(", BUG DMA OFF");
754 hwif->dma_off_quietly(drive);
758 EXPORT_SYMBOL(ide_dma_verbose);
760 int ide_set_dma(ide_drive_t *drive)
762 ide_hwif_t *hwif = drive->hwif;
765 rc = hwif->ide_dma_check(drive);
768 case -1: /* DMA needs to be disabled */
769 hwif->dma_off_quietly(drive);
771 case 0: /* DMA needs to be enabled */
772 return hwif->ide_dma_on(drive);
773 case 1: /* DMA setting cannot be changed */
783 EXPORT_SYMBOL_GPL(ide_set_dma);
785 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
786 int __ide_dma_lostirq (ide_drive_t *drive)
788 printk("%s: DMA interrupt recovery\n", drive->name);
792 EXPORT_SYMBOL(__ide_dma_lostirq);
794 int __ide_dma_timeout (ide_drive_t *drive)
796 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
797 if (HWIF(drive)->ide_dma_test_irq(drive))
800 return HWIF(drive)->ide_dma_end(drive);
803 EXPORT_SYMBOL(__ide_dma_timeout);
806 * Needed for allowing full modular support of ide-driver
808 static int ide_release_dma_engine(ide_hwif_t *hwif)
810 if (hwif->dmatable_cpu) {
811 pci_free_consistent(hwif->pci_dev,
812 PRD_ENTRIES * PRD_BYTES,
815 hwif->dmatable_cpu = NULL;
820 static int ide_release_iomio_dma(ide_hwif_t *hwif)
822 release_region(hwif->dma_base, 8);
823 if (hwif->extra_ports)
824 release_region(hwif->extra_base, hwif->extra_ports);
829 * Needed for allowing full modular support of ide-driver
831 int ide_release_dma(ide_hwif_t *hwif)
833 ide_release_dma_engine(hwif);
838 return ide_release_iomio_dma(hwif);
841 static int ide_allocate_dma_engine(ide_hwif_t *hwif)
843 hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
844 PRD_ENTRIES * PRD_BYTES,
845 &hwif->dmatable_dma);
847 if (hwif->dmatable_cpu)
850 printk(KERN_ERR "%s: -- Error, unable to allocate DMA table.\n",
856 static int ide_mapped_mmio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
858 printk(KERN_INFO " %s: MMIO-DMA ", hwif->name);
860 hwif->dma_base = base;
863 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
865 hwif->dma_master = base;
869 static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
871 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx",
872 hwif->name, base, base + ports - 1);
874 if (!request_region(base, ports, hwif->name)) {
875 printk(" -- Error, ports in use.\n");
879 hwif->dma_base = base;
881 if (hwif->cds->extra) {
882 hwif->extra_base = base + (hwif->channel ? 8 : 16);
884 if (!hwif->mate || !hwif->mate->extra_ports) {
885 if (!request_region(hwif->extra_base,
886 hwif->cds->extra, hwif->cds->name)) {
887 printk(" -- Error, extra ports in use.\n");
888 release_region(base, ports);
891 hwif->extra_ports = hwif->cds->extra;
896 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base:base;
898 hwif->dma_master = base;
902 static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
905 return ide_mapped_mmio_dma(hwif, base,ports);
907 return ide_iomio_dma(hwif, base, ports);
911 * This can be called for a dynamically installed interface. Don't __init it
913 void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_ports)
915 if (ide_dma_iobase(hwif, dma_base, num_ports))
918 if (ide_allocate_dma_engine(hwif)) {
919 ide_release_dma(hwif);
923 if (!(hwif->dma_command))
924 hwif->dma_command = hwif->dma_base;
925 if (!(hwif->dma_vendor1))
926 hwif->dma_vendor1 = (hwif->dma_base + 1);
927 if (!(hwif->dma_status))
928 hwif->dma_status = (hwif->dma_base + 2);
929 if (!(hwif->dma_vendor3))
930 hwif->dma_vendor3 = (hwif->dma_base + 3);
931 if (!(hwif->dma_prdtable))
932 hwif->dma_prdtable = (hwif->dma_base + 4);
934 if (!hwif->dma_off_quietly)
935 hwif->dma_off_quietly = &ide_dma_off_quietly;
936 if (!hwif->dma_host_off)
937 hwif->dma_host_off = &ide_dma_host_off;
938 if (!hwif->ide_dma_on)
939 hwif->ide_dma_on = &__ide_dma_on;
940 if (!hwif->dma_host_on)
941 hwif->dma_host_on = &ide_dma_host_on;
942 if (!hwif->ide_dma_check)
943 hwif->ide_dma_check = &__ide_dma_check;
944 if (!hwif->dma_setup)
945 hwif->dma_setup = &ide_dma_setup;
946 if (!hwif->dma_exec_cmd)
947 hwif->dma_exec_cmd = &ide_dma_exec_cmd;
948 if (!hwif->dma_start)
949 hwif->dma_start = &ide_dma_start;
950 if (!hwif->ide_dma_end)
951 hwif->ide_dma_end = &__ide_dma_end;
952 if (!hwif->ide_dma_test_irq)
953 hwif->ide_dma_test_irq = &__ide_dma_test_irq;
954 if (!hwif->ide_dma_timeout)
955 hwif->ide_dma_timeout = &__ide_dma_timeout;
956 if (!hwif->ide_dma_lostirq)
957 hwif->ide_dma_lostirq = &__ide_dma_lostirq;
959 if (hwif->chipset != ide_trm290) {
960 u8 dma_stat = hwif->INB(hwif->dma_status);
961 printk(", BIOS settings: %s:%s, %s:%s",
962 hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
963 hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
967 BUG_ON(!hwif->dma_master);
970 EXPORT_SYMBOL_GPL(ide_setup_dma);
971 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */