2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19
4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (c) 1995-1998 Mark Lord
7 * May be copied or modified under the terms of the GNU General Public License
11 * This module provides support for automatic detection and
12 * configuration of all PCI IDE interfaces present in a system.
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/pci.h>
19 #include <linux/init.h>
20 #include <linux/timer.h>
22 #include <linux/interrupt.h>
23 #include <linux/ide.h>
24 #include <linux/dma-mapping.h>
31 * ide_match_hwif - match a PCI IDE against an ide_hwif
32 * @io_base: I/O base of device
33 * @bootable: set if its bootable
34 * @name: name of device
36 * Match a PCI IDE port against an entry in ide_hwifs[],
37 * based on io_base port if possible. Return the matching hwif,
38 * or a new hwif. If we find an error (clashing, out of devices, etc)
41 * FIXME: we need to handle mmio matches here too
44 static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
50 * Look for a hwif with matching io_base specified using
51 * parameters to ide_setup().
53 for (h = 0; h < MAX_HWIFS; ++h) {
55 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
56 if (hwif->chipset == ide_forced)
57 return hwif; /* a perfect match */
61 * Look for a hwif with matching io_base default value.
62 * If chipset is "ide_unknown", then claim that hwif slot.
63 * Otherwise, some other chipset has already claimed it.. :(
65 for (h = 0; h < MAX_HWIFS; ++h) {
67 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
68 if (hwif->chipset == ide_unknown)
69 return hwif; /* match */
70 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
71 name, io_base, hwif->name);
72 return NULL; /* already claimed */
76 * Okay, there is no hwif matching our io_base,
77 * so we'll just claim an unassigned slot.
78 * Give preference to claiming other slots before claiming ide0/ide1,
79 * just in case there's another interface yet-to-be-scanned
80 * which uses ports 1f0/170 (the ide0/ide1 defaults).
82 * Unless there is a bootable card that does not use the standard
83 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
86 for (h = 0; h < MAX_HWIFS; ++h) {
88 if (hwif->chipset == ide_unknown)
89 return hwif; /* pick an unused entry */
92 for (h = 2; h < MAX_HWIFS; ++h) {
94 if (hwif->chipset == ide_unknown)
95 return hwif; /* pick an unused entry */
98 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) {
100 if (hwif->chipset == ide_unknown)
101 return hwif; /* pick an unused entry */
103 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
108 * ide_setup_pci_baseregs - place a PCI IDE controller native
109 * @dev: PCI device of interface to switch native
110 * @name: Name of interface
112 * We attempt to place the PCI interface into PCI native mode. If
113 * we succeed the BARs are ok and the controller is in PCI mode.
114 * Returns 0 on success or an errno code.
116 * FIXME: if we program the interface and then fail to set the BARS
117 * we don't switch it back to legacy mode. Do we actually care ??
120 static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
125 * Place both IDE interfaces into PCI "native" mode:
127 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
129 if ((progif & 0xa) != 0xa) {
130 printk(KERN_INFO "%s: device not capable of full "
131 "native PCI mode\n", name);
134 printk("%s: placing both ports into native PCI mode\n", name);
135 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
136 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
138 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
139 "0x%04x, got 0x%04x\n",
140 name, progif|5, progif);
147 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
149 * ide_get_or_set_dma_base - setup BMIBA
150 * @d: IDE pci device data
153 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
154 * Where a device has a partner that is already in DMA mode we check
155 * and enforce IDE simplex rules.
158 static unsigned long ide_get_or_set_dma_base(ide_pci_device_t *d, ide_hwif_t *hwif)
160 unsigned long dma_base = 0;
161 struct pci_dev *dev = hwif->pci_dev;
164 return hwif->dma_base;
166 if (hwif->mate && hwif->mate->dma_base) {
167 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
169 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
171 dma_base = pci_resource_start(dev, baridx);
174 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
177 if ((d->host_flags & IDE_HFLAG_CS5520) == 0 && dma_base) {
179 dma_base += hwif->channel ? 8 : 0;
181 switch(dev->device) {
182 case PCI_DEVICE_ID_AL_M5219:
183 case PCI_DEVICE_ID_AL_M5229:
184 case PCI_DEVICE_ID_AMD_VIPER_7409:
185 case PCI_DEVICE_ID_CMD_643:
186 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
187 case PCI_DEVICE_ID_REVOLUTION:
188 simplex_stat = hwif->INB(dma_base + 2);
189 hwif->OUTB((simplex_stat&0x60),(dma_base + 2));
190 simplex_stat = hwif->INB(dma_base + 2);
191 if (simplex_stat & 0x80) {
192 printk(KERN_INFO "%s: simplex device: "
199 * If the device claims "simplex" DMA,
200 * this means only one of the two interfaces
201 * can be trusted with DMA at any point in time.
202 * So we should enable DMA only on one of the
205 simplex_stat = hwif->INB(dma_base + 2);
206 if (simplex_stat & 0x80) {
207 /* simplex device? */
209 * At this point we haven't probed the drives so we can't make the
210 * appropriate decision. Really we should defer this problem
211 * until we tune the drive then try to grab DMA ownership if we want
212 * to be the DMA end. This has to be become dynamic to handle hot
215 if (hwif->mate && hwif->mate->dma_base) {
216 printk(KERN_INFO "%s: simplex device: "
226 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
228 void ide_setup_pci_noise (struct pci_dev *dev, ide_pci_device_t *d)
230 printk(KERN_INFO "%s: IDE controller at PCI slot %s\n",
231 d->name, pci_name(dev));
234 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
238 * ide_pci_enable - do PCI enables
240 * @d: IDE pci device data
242 * Enable the IDE PCI device. We attempt to enable the device in full
243 * but if that fails then we only need BAR4 so we will enable that.
245 * Returns zero on success or an error code
248 static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d)
252 if (pci_enable_device(dev)) {
253 ret = pci_enable_device_bars(dev, 1 << 4);
255 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
256 "Could not enable device.\n", d->name);
259 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
263 * assume all devices can do 32-bit dma for now. we can add a
264 * dma mask field to the ide_pci_device_t if we need it (or let
265 * lower level driver set the dma mask)
267 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
269 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
273 /* FIXME: Temporary - until we put in the hotplug interface logic
274 Check that the bits we want are not in use by someone else. */
275 ret = pci_request_region(dev, 4, "ide_tmp");
279 pci_release_region(dev, 4);
285 * ide_pci_configure - configure an unconfigured device
287 * @d: IDE pci device data
289 * Enable and configure the PCI device we have been passed.
290 * Returns zero on success or an error code.
293 static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d)
297 * PnP BIOS was *supposed* to have setup this device, but we
298 * can do it ourselves, so long as the BIOS has assigned an IRQ
299 * (or possibly the device is using a "legacy header" for IRQs).
300 * Maybe the user deliberately *disabled* the device,
301 * but we'll eventually ignore it again if no drives respond.
303 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
305 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
308 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
309 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
312 if (!(pcicmd & PCI_COMMAND_IO)) {
313 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
320 * ide_pci_check_iomem - check a register is I/O
325 * Checks if a BAR is configured and points to MMIO space. If so
326 * print an error and return an error code. Otherwise return 0
329 static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar)
331 ulong flags = pci_resource_flags(dev, bar);
334 if (!flags || pci_resource_len(dev, bar) == 0)
338 if(flags & PCI_BASE_ADDRESS_IO_MASK)
342 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
344 "<andre@linux-ide.org>.\n", d->name);
349 * ide_hwif_configure - configure an IDE interface
350 * @dev: PCI device holding interface
352 * @mate: Paired interface if any
354 * Perform the initial set up for the hardware interface structure. This
355 * is done per interface port rather than per PCI device. There may be
356 * more than one port per device.
358 * Returns the new hardware interface structure, or NULL on a failure
361 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *mate, int port, int irq)
363 unsigned long ctl = 0, base = 0;
365 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0;
367 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
368 /* Possibly we should fail if these checks report true */
369 ide_pci_check_iomem(dev, d, 2*port);
370 ide_pci_check_iomem(dev, d, 2*port+1);
372 ctl = pci_resource_start(dev, 2*port+1);
373 base = pci_resource_start(dev, 2*port);
374 if ((ctl && !base) || (base && !ctl)) {
375 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
376 "for port %d, skipping\n", d->name, port);
382 /* Use default values */
383 ctl = port ? 0x374 : 0x3f4;
384 base = port ? 0x170 : 0x1f0;
386 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL)
387 return NULL; /* no room in ide_hwifs[] */
388 if (hwif->io_ports[IDE_DATA_OFFSET] != base ||
389 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) {
390 memset(&hwif->hw, 0, sizeof(hwif->hw));
391 #ifndef IDE_ARCH_OBSOLETE_INIT
392 ide_std_init_ports(&hwif->hw, base, (ctl | 2));
393 hwif->hw.io_ports[IDE_IRQ_OFFSET] = 0;
395 ide_init_hwif_ports(&hwif->hw, base, (ctl | 2), NULL);
397 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
398 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
400 hwif->chipset = ide_pci;
402 hwif->cds = (struct ide_pci_device_s *) d;
403 hwif->channel = port;
415 * ide_hwif_setup_dma - configure DMA interface
418 * @hwif: Hardware interface we are configuring
420 * Set up the DMA base for the interface. Enable the master bits as
421 * necessary and attempt to bring the device DMA into a ready to use
425 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
426 static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
430 static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
434 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
436 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
437 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
438 (dev->class & 0x80))) {
439 unsigned long dma_base = ide_get_or_set_dma_base(d, hwif);
440 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
442 * Set up BM-DMA capability
443 * (PnP BIOS should have done this)
446 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
447 printk(KERN_ERR "%s: %s error updating PCICMD\n",
448 hwif->name, d->name);
454 d->init_dma(hwif, dma_base);
456 ide_setup_dma(hwif, dma_base, 8);
459 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
460 "(BIOS)\n", hwif->name, d->name);
464 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
467 * ide_setup_pci_controller - set up IDE PCI
470 * @noisy: verbose flag
471 * @config: returned as 1 if we configured the hardware
473 * Set up the PCI and controller side of the IDE interface. This brings
474 * up the PCI side of the device, checks that the device is enabled
475 * and enables it if need be
478 static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config)
485 ide_setup_pci_noise(dev, d);
487 ret = ide_pci_enable(dev, d);
491 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
493 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
496 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
497 ret = ide_pci_configure(dev, d);
501 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
504 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
507 printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev);
513 * ide_pci_setup_ports - configure ports/devices on PCI IDE
515 * @d: IDE pci device info
517 * @index: ata index to update
519 * Scan the interfaces attached to this device and do any
520 * necessary per port setup. Attach the devices and ask the
521 * generic DMA layer to do its work for us.
523 * Normally called automaticall from do_ide_pci_setup_device,
524 * but is also used directly as a helper function by some controllers
525 * where the chipset setup is not the default PCI IDE one.
528 void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, ata_index_t *index)
530 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
531 int at_least_one_hwif_enabled = 0;
532 ide_hwif_t *hwif, *mate = NULL;
538 * Set up the IDE ports
541 for (port = 0; port < channels; ++port) {
542 ide_pci_enablebit_t *e = &(d->enablebits[port]);
544 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
545 (tmp & e->mask) != e->val))
546 continue; /* port not enabled */
548 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
551 /* setup proper ancestral information */
552 hwif->gendev.parent = &dev->dev;
555 index->b.high = hwif->index;
557 index->b.low = hwif->index;
564 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0)
565 ide_hwif_setup_dma(dev, d, hwif);
567 hwif->host_flags = d->host_flags;
568 hwif->pio_mask = d->pio_mask;
570 if (hwif->dma_base) {
571 hwif->swdma_mask = d->swdma_mask;
572 hwif->mwdma_mask = d->mwdma_mask;
573 hwif->ultra_mask = d->udma_mask;
577 /* Call chipset-specific routine
578 * for each enabled hwif
583 at_least_one_hwif_enabled = 1;
585 if (!at_least_one_hwif_enabled)
586 printk(KERN_INFO "%s: neither IDE port enabled (BIOS)\n", d->name);
589 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
592 * ide_setup_pci_device() looks at the primary/secondary interfaces
593 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
594 * for use with them. This generic code works for most PCI chipsets.
596 * One thing that is not standardized is the location of the
597 * primary/secondary interface "enable/disable" bits. For chipsets that
598 * we "know" about, this information is in the ide_pci_device_t struct;
599 * for all other chipsets, we just assume both interfaces are enabled.
601 static int do_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d,
602 ata_index_t *index, u8 noisy)
604 static ata_index_t ata_index = { .b = { .low = 0xff, .high = 0xff } };
605 int tried_config = 0;
608 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
613 * Can we trust the reported IRQ?
617 /* Is it an "IDE storage" device in non-PCI mode? */
618 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
620 printk(KERN_INFO "%s: not 100%% native mode: "
621 "will probe irqs later\n", d->name);
623 * This allows offboard ide-pci cards the enable a BIOS,
624 * verify interrupt settings of split-mirror pci-config
625 * space, place chipset into init-mode, and/or preserve
626 * an interrupt if the card is not native ide support.
628 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
632 } else if (tried_config) {
634 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
636 } else if (!pciirq) {
638 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
642 if (d->init_chipset) {
643 ret = d->init_chipset(dev, d->name);
648 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
652 /* FIXME: silent failure can happen */
655 ide_pci_setup_ports(dev, d, pciirq, index);
660 int ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d)
662 ide_hwif_t *hwif = NULL, *mate = NULL;
663 ata_index_t index_list;
666 ret = do_ide_setup_pci_device(dev, d, &index_list, 1);
670 if ((index_list.b.low & 0xf0) != 0xf0)
671 hwif = &ide_hwifs[index_list.b.low];
672 if ((index_list.b.high & 0xf0) != 0xf0)
673 mate = &ide_hwifs[index_list.b.high];
676 probe_hwif_init_with_fixup(hwif, d->fixup);
678 probe_hwif_init_with_fixup(mate, d->fixup);
681 ide_proc_register_port(hwif);
683 ide_proc_register_port(mate);
688 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
690 int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
693 struct pci_dev *pdev[] = { dev1, dev2 };
694 ata_index_t index_list[2];
697 for (i = 0; i < 2; i++) {
698 ret = do_ide_setup_pci_device(pdev[i], d, index_list + i, !i);
700 * FIXME: Mom, mom, they stole me the helper function to undo
701 * do_ide_setup_pci_device() on the first device!
707 for (i = 0; i < 2; i++) {
708 u8 idx[2] = { index_list[i].b.low, index_list[i].b.high };
711 for (j = 0; j < 2; j++) {
712 if ((idx[j] & 0xf0) != 0xf0)
713 probe_hwif_init(ide_hwifs + idx[j]);
717 for (i = 0; i < 2; i++) {
718 u8 idx[2] = { index_list[i].b.low, index_list[i].b.high };
721 for (j = 0; j < 2; j++) {
722 if ((idx[j] & 0xf0) != 0xf0)
723 ide_proc_register_port(ide_hwifs + idx[j]);
730 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);
732 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
737 static int pre_init = 1; /* Before first ordered IDE scan */
738 static LIST_HEAD(ide_pci_drivers);
741 * __ide_pci_register_driver - attach IDE driver
742 * @driver: pci driver
743 * @module: owner module of the driver
745 * Registers a driver with the IDE layer. The IDE layer arranges that
746 * boot time setup is done in the expected device order and then
747 * hands the controllers off to the core PCI code to do the rest of
750 * The driver_data of the driver table must point to an ide_pci_device_t
751 * describing the interface.
753 * Returns are the same as for pci_register_driver
756 int __ide_pci_register_driver(struct pci_driver *driver, struct module *module,
757 const char *mod_name)
760 return __pci_register_driver(driver, module, mod_name);
761 driver->driver.owner = module;
762 list_add_tail(&driver->node, &ide_pci_drivers);
766 EXPORT_SYMBOL_GPL(__ide_pci_register_driver);
769 * ide_scan_pcidev - find an IDE driver for a device
770 * @dev: PCI device to check
772 * Look for an IDE driver to handle the device we are considering.
773 * This is only used during boot up to get the ordering correct. After
774 * boot up the pci layer takes over the job.
777 static int __init ide_scan_pcidev(struct pci_dev *dev)
780 struct pci_driver *d;
782 list_for_each(l, &ide_pci_drivers) {
783 d = list_entry(l, struct pci_driver, node);
785 const struct pci_device_id *id = pci_match_id(d->id_table,
787 if (id != NULL && d->probe(dev, id) >= 0) {
798 * ide_scan_pcibus - perform the initial IDE driver scan
799 * @scan_direction: set for reverse order scanning
801 * Perform the initial bus rather than driver ordered scan of the
802 * PCI drivers. After this all IDE pci handling becomes standard
803 * module ordering not traditionally ordered.
806 void __init ide_scan_pcibus (int scan_direction)
808 struct pci_dev *dev = NULL;
809 struct pci_driver *d;
810 struct list_head *l, *n;
814 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
815 ide_scan_pcidev(dev);
817 while ((dev = pci_get_device_reverse(PCI_ANY_ID, PCI_ANY_ID, dev))
819 ide_scan_pcidev(dev);
822 * Hand the drivers over to the PCI layer now we
826 list_for_each_safe(l, n, &ide_pci_drivers) {
828 d = list_entry(l, struct pci_driver, node);
829 if (__pci_register_driver(d, d->driver.owner, d->driver.mod_name))
830 printk(KERN_ERR "%s: failed to register driver for %s\n",
831 __FUNCTION__, d->driver.mod_name);