2 * MPC8379E RDB Device Tree Source
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 compatible = "fsl,mpc8379rdb";
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>;
40 clock-frequency = <0>;
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>; // 256MB at 0
52 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
53 reg = <0xe0005000 0x1000>;
54 interrupts = <77 0x8>;
55 interrupt-parent = <&ipic>;
57 // CS0 and CS1 are swapped when
58 // booting from nand, but the
59 // addresses are the same.
60 ranges = <0x0 0x0 0xfe000000 0x00800000
61 0x1 0x0 0xe0600000 0x00008000
62 0x2 0x0 0xf0000000 0x00020000
63 0x3 0x0 0xfa000000 0x00008000>;
68 compatible = "cfi-flash";
69 reg = <0x0 0x0 0x800000>;
77 compatible = "fsl,mpc8379-fcm-nand",
79 reg = <0x1 0x0 0x8000>;
87 reg = <0x100000 0x300000>;
90 reg = <0x400000 0x1c00000>;
99 compatible = "simple-bus";
100 ranges = <0x0 0xe0000000 0x00100000>;
101 reg = <0xe0000000 0x00000200>;
105 device_type = "watchdog";
106 compatible = "mpc83xx_wdt";
111 #address-cells = <1>;
114 compatible = "fsl-i2c";
115 reg = <0x3000 0x100>;
116 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>;
120 compatible = "dallas,ds1339";
126 compatible = "fsl,mc9s08qg8-mpc8379erdb",
127 "fsl,mcu-mpc8349emitx";
134 #address-cells = <1>;
137 compatible = "fsl-i2c";
138 reg = <0x3100 0x100>;
139 interrupts = <15 0x8>;
140 interrupt-parent = <&ipic>;
146 compatible = "fsl,spi";
147 reg = <0x7000 0x1000>;
148 interrupts = <16 0x8>;
149 interrupt-parent = <&ipic>;
154 #address-cells = <1>;
156 compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
158 ranges = <0 0x8100 0x1a8>;
159 interrupt-parent = <&ipic>;
163 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
166 interrupt-parent = <&ipic>;
170 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
173 interrupt-parent = <&ipic>;
177 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
180 interrupt-parent = <&ipic>;
184 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
187 interrupt-parent = <&ipic>;
193 compatible = "fsl-usb2-dr";
194 reg = <0x23000 0x1000>;
195 #address-cells = <1>;
197 interrupt-parent = <&ipic>;
198 interrupts = <38 0x8>;
203 #address-cells = <1>;
205 compatible = "fsl,gianfar-mdio";
206 reg = <0x24520 0x20>;
207 phy2: ethernet-phy@2 {
208 interrupt-parent = <&ipic>;
209 interrupts = <17 0x8>;
211 device_type = "ethernet-phy";
215 device_type = "tbi-phy";
220 #address-cells = <1>;
222 compatible = "fsl,gianfar-tbi";
223 reg = <0x25520 0x20>;
227 device_type = "tbi-phy";
231 enet0: ethernet@24000 {
233 device_type = "network";
235 compatible = "gianfar";
236 reg = <0x24000 0x1000>;
237 local-mac-address = [ 00 00 00 00 00 00 ];
238 interrupts = <32 0x8 33 0x8 34 0x8>;
239 phy-connection-type = "mii";
240 interrupt-parent = <&ipic>;
241 tbi-handle = <&tbi0>;
242 phy-handle = <&phy2>;
245 enet1: ethernet@25000 {
247 device_type = "network";
249 compatible = "gianfar";
250 reg = <0x25000 0x1000>;
251 local-mac-address = [ 00 00 00 00 00 00 ];
252 interrupts = <35 0x8 36 0x8 37 0x8>;
253 phy-connection-type = "mii";
254 interrupt-parent = <&ipic>;
255 fixed-link = <1 1 1000 0 0>;
256 tbi-handle = <&tbi1>;
259 serial0: serial@4500 {
261 device_type = "serial";
262 compatible = "ns16550";
263 reg = <0x4500 0x100>;
264 clock-frequency = <0>;
265 interrupts = <9 0x8>;
266 interrupt-parent = <&ipic>;
269 serial1: serial@4600 {
271 device_type = "serial";
272 compatible = "ns16550";
273 reg = <0x4600 0x100>;
274 clock-frequency = <0>;
275 interrupts = <10 0x8>;
276 interrupt-parent = <&ipic>;
280 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
281 "fsl,sec2.1", "fsl,sec2.0";
282 reg = <0x30000 0x10000>;
283 interrupts = <11 0x8>;
284 interrupt-parent = <&ipic>;
285 fsl,num-channels = <4>;
286 fsl,channel-fifo-len = <24>;
287 fsl,exec-units-mask = <0x9fe>;
288 fsl,descriptor-types-mask = <0x3ab0ebf>;
292 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
293 reg = <0x18000 0x1000>;
294 interrupts = <44 0x8>;
295 interrupt-parent = <&ipic>;
299 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
300 reg = <0x19000 0x1000>;
301 interrupts = <45 0x8>;
302 interrupt-parent = <&ipic>;
306 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
307 reg = <0x1a000 0x1000>;
308 interrupts = <46 0x8>;
309 interrupt-parent = <&ipic>;
313 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
314 reg = <0x1b000 0x1000>;
315 interrupts = <47 0x8>;
316 interrupt-parent = <&ipic>;
320 * interrupts cell = <intr #, sense>
321 * sense values match linux IORESOURCE_IRQ_* defines:
322 * sense == 8: Level, low assertion
323 * sense == 2: Edge, high-to-low change
325 ipic: interrupt-controller@700 {
326 compatible = "fsl,ipic";
327 interrupt-controller;
328 #address-cells = <0>;
329 #interrupt-cells = <2>;
335 interrupt-map-mask = <0xf800 0 0 7>;
337 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
339 /* IDSEL AD14 IRQ6 inta */
340 0x7000 0x0 0x0 0x1 &ipic 22 0x8
342 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
343 0x7800 0x0 0x0 0x1 &ipic 21 0x8
344 0x7800 0x0 0x0 0x2 &ipic 22 0x8
345 0x7800 0x0 0x0 0x4 &ipic 23 0x8
347 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
348 0xE000 0x0 0x0 0x1 &ipic 23 0x8
349 0xE000 0x0 0x0 0x2 &ipic 21 0x8
350 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
351 interrupt-parent = <&ipic>;
352 interrupts = <66 0x8>;
353 bus-range = <0x0 0x0>;
354 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
355 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
356 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
357 clock-frequency = <66666666>;
358 #interrupt-cells = <1>;
360 #address-cells = <3>;
361 reg = <0xe0008500 0x100 /* internal registers */
362 0xe0008300 0x8>; /* config space access registers */
363 compatible = "fsl,mpc8349-pci";