1 /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
7 * This is mainly a variation of 8250.c, credits go to authors mentioned
8 * therein. In fact this driver should be merged into the generic 8250.c
9 * infrastructure perhaps using a 8250_sparc.c module.
11 * Fixed to use tty_get_baud_rate().
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/major.h>
27 #include <linux/string.h>
28 #include <linux/ptrace.h>
29 #include <linux/ioport.h>
30 #include <linux/circ_buf.h>
31 #include <linux/serial.h>
32 #include <linux/sysrq.h>
33 #include <linux/console.h>
35 #include <linux/serio.h>
37 #include <linux/serial_reg.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
43 #include <asm/oplib.h>
49 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
53 #include <linux/serial_core.h>
57 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
58 * in a UART clock of 1.8462 MHz.
60 #define SU_BASE_BAUD (1846200 / 16)
62 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
63 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
66 * Here we define the default xmit fifo size used for each type of UART.
68 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
73 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
75 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
76 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
77 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
79 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
80 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
81 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
82 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
85 struct uart_sunsu_port {
86 struct uart_port port;
91 unsigned int lsr_break_flag;
94 /* Probing information. */
96 unsigned int type_probed; /* XXX Stupid */
105 static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
107 offset <<= up->port.regshift;
109 switch (up->port.iotype) {
111 outb(up->port.hub6 - 1 + offset, up->port.iobase);
112 return inb(up->port.iobase + 1);
115 return readb(up->port.membase + offset);
118 return inb(up->port.iobase + offset);
122 static void serial_out(struct uart_sunsu_port *up, int offset, int value)
124 #ifndef CONFIG_SPARC64
126 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
127 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
128 * gate outputs a logical one. Since we use level triggered interrupts
129 * we have lockup and watchdog reset. We cannot mask IRQ because
130 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
131 * This problem is similar to what Alpha people suffer, see serial.c.
133 if (offset == UART_MCR)
134 value |= UART_MCR_OUT2;
136 offset <<= up->port.regshift;
138 switch (up->port.iotype) {
140 outb(up->port.hub6 - 1 + offset, up->port.iobase);
141 outb(value, up->port.iobase + 1);
145 writeb(value, up->port.membase + offset);
149 outb(value, up->port.iobase + offset);
154 * We used to support using pause I/O for certain machines. We
155 * haven't supported this for a while, but just in case it's badly
156 * needed for certain old 386 machines, I've left these #define's
159 #define serial_inp(up, offset) serial_in(up, offset)
160 #define serial_outp(up, offset, value) serial_out(up, offset, value)
166 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
168 serial_out(up, UART_SCR, offset);
169 serial_out(up, UART_ICR, value);
172 #if 0 /* Unused currently */
173 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
177 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
178 serial_out(up, UART_SCR, offset);
179 value = serial_in(up, UART_ICR);
180 serial_icr_write(up, UART_ACR, up->acr);
186 #ifdef CONFIG_SERIAL_8250_RSA
188 * Attempts to turn on the RSA FIFO. Returns zero on failure.
189 * We set the port uart clock rate if we succeed.
191 static int __enable_rsa(struct uart_sunsu_port *up)
196 mode = serial_inp(up, UART_RSA_MSR);
197 result = mode & UART_RSA_MSR_FIFO;
200 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
201 mode = serial_inp(up, UART_RSA_MSR);
202 result = mode & UART_RSA_MSR_FIFO;
206 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
211 static void enable_rsa(struct uart_sunsu_port *up)
213 if (up->port.type == PORT_RSA) {
214 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
215 spin_lock_irq(&up->port.lock);
217 spin_unlock_irq(&up->port.lock);
219 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
220 serial_outp(up, UART_RSA_FRR, 0);
225 * Attempts to turn off the RSA FIFO. Returns zero on failure.
226 * It is unknown why interrupts were disabled in here. However,
227 * the caller is expected to preserve this behaviour by grabbing
228 * the spinlock before calling this function.
230 static void disable_rsa(struct uart_sunsu_port *up)
235 if (up->port.type == PORT_RSA &&
236 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
237 spin_lock_irq(&up->port.lock);
239 mode = serial_inp(up, UART_RSA_MSR);
240 result = !(mode & UART_RSA_MSR_FIFO);
243 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
244 mode = serial_inp(up, UART_RSA_MSR);
245 result = !(mode & UART_RSA_MSR_FIFO);
249 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
250 spin_unlock_irq(&up->port.lock);
253 #endif /* CONFIG_SERIAL_8250_RSA */
255 static inline void __stop_tx(struct uart_sunsu_port *p)
257 if (p->ier & UART_IER_THRI) {
258 p->ier &= ~UART_IER_THRI;
259 serial_out(p, UART_IER, p->ier);
263 static void sunsu_stop_tx(struct uart_port *port)
265 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
270 * We really want to stop the transmitter from sending.
272 if (up->port.type == PORT_16C950) {
273 up->acr |= UART_ACR_TXDIS;
274 serial_icr_write(up, UART_ACR, up->acr);
278 static void sunsu_start_tx(struct uart_port *port)
280 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
282 if (!(up->ier & UART_IER_THRI)) {
283 up->ier |= UART_IER_THRI;
284 serial_out(up, UART_IER, up->ier);
288 * Re-enable the transmitter if we disabled it.
290 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
291 up->acr &= ~UART_ACR_TXDIS;
292 serial_icr_write(up, UART_ACR, up->acr);
296 static void sunsu_stop_rx(struct uart_port *port)
298 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
300 up->ier &= ~UART_IER_RLSI;
301 up->port.read_status_mask &= ~UART_LSR_DR;
302 serial_out(up, UART_IER, up->ier);
305 static void sunsu_enable_ms(struct uart_port *port)
307 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
310 spin_lock_irqsave(&up->port.lock, flags);
311 up->ier |= UART_IER_MSI;
312 serial_out(up, UART_IER, up->ier);
313 spin_unlock_irqrestore(&up->port.lock, flags);
316 static struct tty_struct *
317 receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
319 struct tty_struct *tty = up->port.info->tty;
320 unsigned char ch, flag;
322 int saw_console_brk = 0;
325 ch = serial_inp(up, UART_RX);
327 up->port.icount.rx++;
329 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
330 UART_LSR_FE | UART_LSR_OE))) {
332 * For statistics only
334 if (*status & UART_LSR_BI) {
335 *status &= ~(UART_LSR_FE | UART_LSR_PE);
336 up->port.icount.brk++;
337 if (up->port.cons != NULL &&
338 up->port.line == up->port.cons->index)
341 * We do the SysRQ and SAK checking
342 * here because otherwise the break
343 * may get masked by ignore_status_mask
344 * or read_status_mask.
346 if (uart_handle_break(&up->port))
348 } else if (*status & UART_LSR_PE)
349 up->port.icount.parity++;
350 else if (*status & UART_LSR_FE)
351 up->port.icount.frame++;
352 if (*status & UART_LSR_OE)
353 up->port.icount.overrun++;
356 * Mask off conditions which should be ingored.
358 *status &= up->port.read_status_mask;
360 if (up->port.cons != NULL &&
361 up->port.line == up->port.cons->index) {
362 /* Recover the break flag from console xmit */
363 *status |= up->lsr_break_flag;
364 up->lsr_break_flag = 0;
367 if (*status & UART_LSR_BI) {
369 } else if (*status & UART_LSR_PE)
371 else if (*status & UART_LSR_FE)
374 if (uart_handle_sysrq_char(&up->port, ch, regs))
376 if ((*status & up->port.ignore_status_mask) == 0)
377 tty_insert_flip_char(tty, ch, flag);
378 if (*status & UART_LSR_OE)
380 * Overrun is special, since it's reported
381 * immediately, and doesn't affect the current
384 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
386 *status = serial_inp(up, UART_LSR);
387 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
395 static void transmit_chars(struct uart_sunsu_port *up)
397 struct circ_buf *xmit = &up->port.info->xmit;
400 if (up->port.x_char) {
401 serial_outp(up, UART_TX, up->port.x_char);
402 up->port.icount.tx++;
406 if (uart_tx_stopped(&up->port)) {
407 sunsu_stop_tx(&up->port);
410 if (uart_circ_empty(xmit)) {
415 count = up->port.fifosize;
417 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
418 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
419 up->port.icount.tx++;
420 if (uart_circ_empty(xmit))
422 } while (--count > 0);
424 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
425 uart_write_wakeup(&up->port);
427 if (uart_circ_empty(xmit))
431 static void check_modem_status(struct uart_sunsu_port *up)
435 status = serial_in(up, UART_MSR);
437 if ((status & UART_MSR_ANY_DELTA) == 0)
440 if (status & UART_MSR_TERI)
441 up->port.icount.rng++;
442 if (status & UART_MSR_DDSR)
443 up->port.icount.dsr++;
444 if (status & UART_MSR_DDCD)
445 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
446 if (status & UART_MSR_DCTS)
447 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
449 wake_up_interruptible(&up->port.info->delta_msr_wait);
452 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
454 struct uart_sunsu_port *up = dev_id;
456 unsigned char status;
458 spin_lock_irqsave(&up->port.lock, flags);
461 struct tty_struct *tty;
463 status = serial_inp(up, UART_LSR);
465 if (status & UART_LSR_DR)
466 tty = receive_chars(up, &status, regs);
467 check_modem_status(up);
468 if (status & UART_LSR_THRE)
471 spin_unlock_irqrestore(&up->port.lock, flags);
474 tty_flip_buffer_push(tty);
476 spin_lock_irqsave(&up->port.lock, flags);
478 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
480 spin_unlock_irqrestore(&up->port.lock, flags);
485 /* Separate interrupt handling path for keyboard/mouse ports. */
488 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
489 unsigned int iflag, unsigned int quot);
491 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
493 unsigned int cur_cflag = up->cflag;
497 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
499 quot = up->port.uartclk / (16 * new_baud);
501 sunsu_change_speed(&up->port, up->cflag, 0, quot);
504 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
507 unsigned char ch = serial_inp(up, UART_RX);
509 /* Stop-A is handled by drivers/char/keyboard.c now. */
510 if (up->su_type == SU_PORT_KBD) {
512 serio_interrupt(up->serio, ch, 0, regs);
514 } else if (up->su_type == SU_PORT_MS) {
515 int ret = suncore_mouse_baud_detection(ch, is_break);
519 sunsu_change_mouse_baud(up);
526 serio_interrupt(up->serio, ch, 0, regs);
531 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
534 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
536 struct uart_sunsu_port *up = dev_id;
538 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
539 unsigned char status = serial_inp(up, UART_LSR);
541 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
542 receive_kbd_ms_chars(up, regs,
543 (status & UART_LSR_BI) != 0);
549 static unsigned int sunsu_tx_empty(struct uart_port *port)
551 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
555 spin_lock_irqsave(&up->port.lock, flags);
556 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
557 spin_unlock_irqrestore(&up->port.lock, flags);
562 static unsigned int sunsu_get_mctrl(struct uart_port *port)
564 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
565 unsigned char status;
568 status = serial_in(up, UART_MSR);
571 if (status & UART_MSR_DCD)
573 if (status & UART_MSR_RI)
575 if (status & UART_MSR_DSR)
577 if (status & UART_MSR_CTS)
582 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
584 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
585 unsigned char mcr = 0;
587 if (mctrl & TIOCM_RTS)
589 if (mctrl & TIOCM_DTR)
591 if (mctrl & TIOCM_OUT1)
592 mcr |= UART_MCR_OUT1;
593 if (mctrl & TIOCM_OUT2)
594 mcr |= UART_MCR_OUT2;
595 if (mctrl & TIOCM_LOOP)
596 mcr |= UART_MCR_LOOP;
598 serial_out(up, UART_MCR, mcr);
601 static void sunsu_break_ctl(struct uart_port *port, int break_state)
603 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
606 spin_lock_irqsave(&up->port.lock, flags);
607 if (break_state == -1)
608 up->lcr |= UART_LCR_SBC;
610 up->lcr &= ~UART_LCR_SBC;
611 serial_out(up, UART_LCR, up->lcr);
612 spin_unlock_irqrestore(&up->port.lock, flags);
615 static int sunsu_startup(struct uart_port *port)
617 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
621 if (up->port.type == PORT_16C950) {
622 /* Wake up and initialize UART */
624 serial_outp(up, UART_LCR, 0xBF);
625 serial_outp(up, UART_EFR, UART_EFR_ECB);
626 serial_outp(up, UART_IER, 0);
627 serial_outp(up, UART_LCR, 0);
628 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
629 serial_outp(up, UART_LCR, 0xBF);
630 serial_outp(up, UART_EFR, UART_EFR_ECB);
631 serial_outp(up, UART_LCR, 0);
634 #ifdef CONFIG_SERIAL_8250_RSA
636 * If this is an RSA port, see if we can kick it up to the
637 * higher speed clock.
643 * Clear the FIFO buffers and disable them.
644 * (they will be reenabled in set_termios())
646 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
647 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
648 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
649 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
650 serial_outp(up, UART_FCR, 0);
654 * Clear the interrupt registers.
656 (void) serial_inp(up, UART_LSR);
657 (void) serial_inp(up, UART_RX);
658 (void) serial_inp(up, UART_IIR);
659 (void) serial_inp(up, UART_MSR);
662 * At this point, there's no way the LSR could still be 0xff;
663 * if it is, then bail out, because there's likely no UART
666 if (!(up->port.flags & UPF_BUGGY_UART) &&
667 (serial_inp(up, UART_LSR) == 0xff)) {
668 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
672 if (up->su_type != SU_PORT_PORT) {
673 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
674 SA_SHIRQ, su_typev[up->su_type], up);
676 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
677 SA_SHIRQ, su_typev[up->su_type], up);
680 printk("su: Cannot register IRQ %d\n", up->port.irq);
685 * Now, initialize the UART
687 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
689 spin_lock_irqsave(&up->port.lock, flags);
691 up->port.mctrl |= TIOCM_OUT2;
693 sunsu_set_mctrl(&up->port, up->port.mctrl);
694 spin_unlock_irqrestore(&up->port.lock, flags);
697 * Finally, enable interrupts. Note: Modem status interrupts
698 * are set via set_termios(), which will be occurring imminently
699 * anyway, so we don't enable them here.
701 up->ier = UART_IER_RLSI | UART_IER_RDI;
702 serial_outp(up, UART_IER, up->ier);
704 if (up->port.flags & UPF_FOURPORT) {
707 * Enable interrupts on the AST Fourport board
709 icp = (up->port.iobase & 0xfe0) | 0x01f;
715 * And clear the interrupt registers again for luck.
717 (void) serial_inp(up, UART_LSR);
718 (void) serial_inp(up, UART_RX);
719 (void) serial_inp(up, UART_IIR);
720 (void) serial_inp(up, UART_MSR);
725 static void sunsu_shutdown(struct uart_port *port)
727 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
731 * Disable interrupts from this port
734 serial_outp(up, UART_IER, 0);
736 spin_lock_irqsave(&up->port.lock, flags);
737 if (up->port.flags & UPF_FOURPORT) {
738 /* reset interrupts on the AST Fourport board */
739 inb((up->port.iobase & 0xfe0) | 0x1f);
740 up->port.mctrl |= TIOCM_OUT1;
742 up->port.mctrl &= ~TIOCM_OUT2;
744 sunsu_set_mctrl(&up->port, up->port.mctrl);
745 spin_unlock_irqrestore(&up->port.lock, flags);
748 * Disable break condition and FIFOs
750 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
751 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
752 UART_FCR_CLEAR_RCVR |
753 UART_FCR_CLEAR_XMIT);
754 serial_outp(up, UART_FCR, 0);
756 #ifdef CONFIG_SERIAL_8250_RSA
758 * Reset the RSA board back to 115kbps compat mode.
764 * Read data port to reset things.
766 (void) serial_in(up, UART_RX);
768 free_irq(up->port.irq, up);
772 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
773 unsigned int iflag, unsigned int quot)
775 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
776 unsigned char cval, fcr = 0;
779 switch (cflag & CSIZE) {
798 cval |= UART_LCR_PARITY;
799 if (!(cflag & PARODD))
800 cval |= UART_LCR_EPAR;
803 cval |= UART_LCR_SPAR;
807 * Work around a bug in the Oxford Semiconductor 952 rev B
808 * chip which causes it to seriously miscalculate baud rates
811 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
815 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
816 if ((up->port.uartclk / quot) < (2400 * 16))
817 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
818 #ifdef CONFIG_SERIAL_8250_RSA
819 else if (up->port.type == PORT_RSA)
820 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
823 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
825 if (up->port.type == PORT_16750)
826 fcr |= UART_FCR7_64BYTE;
829 * Ok, we're now changing the port state. Do it with
830 * interrupts disabled.
832 spin_lock_irqsave(&up->port.lock, flags);
835 * Update the per-port timeout.
837 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
839 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
841 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
842 if (iflag & (BRKINT | PARMRK))
843 up->port.read_status_mask |= UART_LSR_BI;
846 * Characteres to ignore
848 up->port.ignore_status_mask = 0;
850 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
851 if (iflag & IGNBRK) {
852 up->port.ignore_status_mask |= UART_LSR_BI;
854 * If we're ignoring parity and break indicators,
855 * ignore overruns too (for real raw support).
858 up->port.ignore_status_mask |= UART_LSR_OE;
862 * ignore all characters if CREAD is not set
864 if ((cflag & CREAD) == 0)
865 up->port.ignore_status_mask |= UART_LSR_DR;
868 * CTS flow control flag and modem status interrupts
870 up->ier &= ~UART_IER_MSI;
871 if (UART_ENABLE_MS(&up->port, cflag))
872 up->ier |= UART_IER_MSI;
874 serial_out(up, UART_IER, up->ier);
876 if (uart_config[up->port.type].flags & UART_STARTECH) {
877 serial_outp(up, UART_LCR, 0xBF);
878 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
880 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
881 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
882 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
883 if (up->port.type == PORT_16750)
884 serial_outp(up, UART_FCR, fcr); /* set fcr */
885 serial_outp(up, UART_LCR, cval); /* reset DLAB */
886 up->lcr = cval; /* Save LCR */
887 if (up->port.type != PORT_16750) {
888 if (fcr & UART_FCR_ENABLE_FIFO) {
889 /* emulated UARTs (Lucent Venus 167x) need two steps */
890 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
892 serial_outp(up, UART_FCR, fcr); /* set fcr */
897 spin_unlock_irqrestore(&up->port.lock, flags);
901 sunsu_set_termios(struct uart_port *port, struct termios *termios,
904 unsigned int baud, quot;
907 * Ask the core to calculate the divisor for us.
909 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
910 quot = uart_get_divisor(port, baud);
912 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
915 static void sunsu_release_port(struct uart_port *port)
919 static int sunsu_request_port(struct uart_port *port)
924 static void sunsu_config_port(struct uart_port *port, int flags)
926 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
928 if (flags & UART_CONFIG_TYPE) {
930 * We are supposed to call autoconfig here, but this requires
931 * splitting all the OBP probing crap from the UART probing.
932 * We'll do it when we kill sunsu.c altogether.
934 port->type = up->type_probed; /* XXX */
939 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
945 sunsu_type(struct uart_port *port)
947 int type = port->type;
949 if (type >= ARRAY_SIZE(uart_config))
951 return uart_config[type].name;
954 static struct uart_ops sunsu_pops = {
955 .tx_empty = sunsu_tx_empty,
956 .set_mctrl = sunsu_set_mctrl,
957 .get_mctrl = sunsu_get_mctrl,
958 .stop_tx = sunsu_stop_tx,
959 .start_tx = sunsu_start_tx,
960 .stop_rx = sunsu_stop_rx,
961 .enable_ms = sunsu_enable_ms,
962 .break_ctl = sunsu_break_ctl,
963 .startup = sunsu_startup,
964 .shutdown = sunsu_shutdown,
965 .set_termios = sunsu_set_termios,
967 .release_port = sunsu_release_port,
968 .request_port = sunsu_request_port,
969 .config_port = sunsu_config_port,
970 .verify_port = sunsu_verify_port,
975 static struct uart_sunsu_port sunsu_ports[UART_NR];
979 static DEFINE_SPINLOCK(sunsu_serio_lock);
981 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
983 struct uart_sunsu_port *up = serio->port_data;
987 spin_lock_irqsave(&sunsu_serio_lock, flags);
990 lsr = serial_in(up, UART_LSR);
991 } while (!(lsr & UART_LSR_THRE));
993 /* Send the character out. */
994 serial_out(up, UART_TX, ch);
996 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1001 static int sunsu_serio_open(struct serio *serio)
1003 struct uart_sunsu_port *up = serio->port_data;
1004 unsigned long flags;
1007 spin_lock_irqsave(&sunsu_serio_lock, flags);
1008 if (!up->serio_open) {
1013 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1018 static void sunsu_serio_close(struct serio *serio)
1020 struct uart_sunsu_port *up = serio->port_data;
1021 unsigned long flags;
1023 spin_lock_irqsave(&sunsu_serio_lock, flags);
1025 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1028 #endif /* CONFIG_SERIO */
1030 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1032 unsigned char status1, status2, scratch, scratch2, scratch3;
1033 unsigned char save_lcr, save_mcr;
1034 struct linux_ebus_device *dev = NULL;
1035 struct linux_ebus *ebus;
1036 #ifdef CONFIG_SPARC64
1037 struct sparc_isa_bridge *isa_br;
1038 struct sparc_isa_device *isa_dev;
1040 #ifndef CONFIG_SPARC64
1041 struct linux_prom_registers reg0;
1043 unsigned long flags;
1045 if (!up->port_node || !up->su_type)
1048 up->type_probed = PORT_UNKNOWN;
1049 up->port.iotype = UPIO_MEM;
1052 * First we look for Ebus-bases su's
1054 for_each_ebus(ebus) {
1055 for_each_ebusdev(dev, ebus) {
1056 if (dev->prom_node->node == up->port_node) {
1058 * The EBus is broken on sparc; it delivers
1059 * virtual addresses in resources. Oh well...
1060 * This is correct on sparc64, though.
1062 up->port.membase = (char *) dev->resource[0].start;
1064 * This is correct on both architectures.
1066 up->port.mapbase = dev->resource[0].start;
1067 up->port.irq = dev->irqs[0];
1073 #ifdef CONFIG_SPARC64
1074 for_each_isa(isa_br) {
1075 for_each_isadev(isa_dev, isa_br) {
1076 if (isa_dev->prom_node->node == up->port_node) {
1077 /* Same on sparc64. Cool architecure... */
1078 up->port.membase = (char *) isa_dev->resource.start;
1079 up->port.mapbase = isa_dev->resource.start;
1080 up->port.irq = isa_dev->irq;
1087 #ifdef CONFIG_SPARC64
1089 * Not on Ebus, bailing.
1094 * Not on Ebus, must be OBIO.
1096 if (prom_getproperty(up->port_node, "reg",
1097 (char *)®0, sizeof(reg0)) == -1) {
1098 prom_printf("sunsu: no \"reg\" property\n");
1101 prom_apply_obio_ranges(®0, 1);
1102 if (reg0.which_io != 0) { /* Just in case... */
1103 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1104 reg0.which_io, reg0.phys_addr);
1107 up->port.mapbase = reg0.phys_addr;
1108 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1109 prom_printf("sunsu: Cannot map registers.\n");
1114 * 0x20 is sun4m thing, Dave Redman heritage.
1115 * See arch/sparc/kernel/irq.c.
1117 #define IRQ_4M(n) ((n)|0x20)
1120 * There is no intr property on MrCoffee, so hardwire it.
1122 up->port.irq = IRQ_4M(13);
1127 spin_lock_irqsave(&up->port.lock, flags);
1129 if (!(up->port.flags & UPF_BUGGY_UART)) {
1131 * Do a simple existence test first; if we fail this, there's
1132 * no point trying anything else.
1134 * 0x80 is used as a nonsense port to prevent against false
1135 * positives due to ISA bus float. The assumption is that
1136 * 0x80 is a non-existent port; which should be safe since
1137 * include/asm/io.h also makes this assumption.
1139 scratch = serial_inp(up, UART_IER);
1140 serial_outp(up, UART_IER, 0);
1144 scratch2 = serial_inp(up, UART_IER);
1145 serial_outp(up, UART_IER, 0x0f);
1149 scratch3 = serial_inp(up, UART_IER);
1150 serial_outp(up, UART_IER, scratch);
1151 if (scratch2 != 0 || scratch3 != 0x0F)
1152 goto out; /* We failed; there's nothing here */
1155 save_mcr = serial_in(up, UART_MCR);
1156 save_lcr = serial_in(up, UART_LCR);
1159 * Check to see if a UART is really there. Certain broken
1160 * internal modems based on the Rockwell chipset fail this
1161 * test, because they apparently don't implement the loopback
1162 * test mode. So this test is skipped on the COM 1 through
1163 * COM 4 ports. This *should* be safe, since no board
1164 * manufacturer would be stupid enough to design a board
1165 * that conflicts with COM 1-4 --- we hope!
1167 if (!(up->port.flags & UPF_SKIP_TEST)) {
1168 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1169 status1 = serial_inp(up, UART_MSR) & 0xF0;
1170 serial_outp(up, UART_MCR, save_mcr);
1171 if (status1 != 0x90)
1172 goto out; /* We failed loopback test */
1174 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1175 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1176 serial_outp(up, UART_LCR, 0);
1177 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1178 scratch = serial_in(up, UART_IIR) >> 6;
1181 up->port.type = PORT_16450;
1184 up->port.type = PORT_UNKNOWN;
1187 up->port.type = PORT_16550;
1190 up->port.type = PORT_16550A;
1193 if (up->port.type == PORT_16550A) {
1194 /* Check for Startech UART's */
1195 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1196 if (serial_in(up, UART_EFR) == 0) {
1197 up->port.type = PORT_16650;
1199 serial_outp(up, UART_LCR, 0xBF);
1200 if (serial_in(up, UART_EFR) == 0)
1201 up->port.type = PORT_16650V2;
1204 if (up->port.type == PORT_16550A) {
1205 /* Check for TI 16750 */
1206 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1207 serial_outp(up, UART_FCR,
1208 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1209 scratch = serial_in(up, UART_IIR) >> 5;
1212 * If this is a 16750, and not a cheap UART
1213 * clone, then it should only go into 64 byte
1214 * mode if the UART_FCR7_64BYTE bit was set
1215 * while UART_LCR_DLAB was latched.
1217 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1218 serial_outp(up, UART_LCR, 0);
1219 serial_outp(up, UART_FCR,
1220 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1221 scratch = serial_in(up, UART_IIR) >> 5;
1223 up->port.type = PORT_16750;
1225 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1227 serial_outp(up, UART_LCR, save_lcr);
1228 if (up->port.type == PORT_16450) {
1229 scratch = serial_in(up, UART_SCR);
1230 serial_outp(up, UART_SCR, 0xa5);
1231 status1 = serial_in(up, UART_SCR);
1232 serial_outp(up, UART_SCR, 0x5a);
1233 status2 = serial_in(up, UART_SCR);
1234 serial_outp(up, UART_SCR, scratch);
1236 if ((status1 != 0xa5) || (status2 != 0x5a))
1237 up->port.type = PORT_8250;
1240 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1242 if (up->port.type == PORT_UNKNOWN)
1244 up->type_probed = up->port.type; /* XXX */
1249 #ifdef CONFIG_SERIAL_8250_RSA
1250 if (up->port.type == PORT_RSA)
1251 serial_outp(up, UART_RSA_FRR, 0);
1253 serial_outp(up, UART_MCR, save_mcr);
1254 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1255 UART_FCR_CLEAR_RCVR |
1256 UART_FCR_CLEAR_XMIT));
1257 serial_outp(up, UART_FCR, 0);
1258 (void)serial_in(up, UART_RX);
1259 serial_outp(up, UART_IER, 0);
1262 spin_unlock_irqrestore(&up->port.lock, flags);
1265 static struct uart_driver sunsu_reg = {
1266 .owner = THIS_MODULE,
1267 .driver_name = "serial",
1272 static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
1276 struct serio *serio;
1279 spin_lock_init(&up->port.lock);
1280 up->port.line = channel;
1281 up->port.type = PORT_UNKNOWN;
1282 up->port.uartclk = (SU_BASE_BAUD * 16);
1284 if (up->su_type == SU_PORT_KBD) {
1285 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1288 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1291 quot = up->port.uartclk / (16 * baud);
1293 sunsu_autoconfig(up);
1294 if (up->port.type == PORT_UNKNOWN)
1297 printk(KERN_INFO "su%d at 0x%p (irq = %d) is a %s\n",
1299 up->port.membase, up->port.irq,
1300 sunsu_type(&up->port));
1303 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1305 memset(serio, 0, sizeof(*serio));
1307 serio->port_data = up;
1309 serio->id.type = SERIO_RS232;
1310 if (up->su_type == SU_PORT_KBD) {
1311 serio->id.proto = SERIO_SUNKBD;
1312 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1314 serio->id.proto = SERIO_SUN;
1315 serio->id.extra = 1;
1316 strlcpy(serio->name, "sums", sizeof(serio->name));
1318 strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
1319 sizeof(serio->phys));
1321 serio->write = sunsu_serio_write;
1322 serio->open = sunsu_serio_open;
1323 serio->close = sunsu_serio_close;
1325 serio_register_port(serio);
1327 printk(KERN_WARNING "su%d: not enough memory for serio port\n",
1332 sunsu_change_speed(&up->port, up->cflag, 0, quot);
1334 sunsu_startup(&up->port);
1339 * ------------------------------------------------------------
1340 * Serial console driver
1341 * ------------------------------------------------------------
1344 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1346 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1349 * Wait for transmitter & holding register to empty
1351 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1353 unsigned int status, tmout = 10000;
1355 /* Wait up to 10ms for the character(s) to be sent. */
1357 status = serial_in(up, UART_LSR);
1359 if (status & UART_LSR_BI)
1360 up->lsr_break_flag = UART_LSR_BI;
1365 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1367 /* Wait up to 1s for flow control if necessary */
1368 if (up->port.flags & UPF_CONS_FLOW) {
1371 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1376 static void sunsu_console_putchar(struct uart_port *port, int ch)
1378 struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
1381 serial_out(up, UART_TX, ch);
1385 * Print a string to the serial port trying not to disturb
1386 * any possible real use of the port...
1388 static void sunsu_console_write(struct console *co, const char *s,
1391 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1395 * First save the UER then disable the interrupts
1397 ier = serial_in(up, UART_IER);
1398 serial_out(up, UART_IER, 0);
1400 uart_console_write(&up->port, s, count, sunsu_console_putchar);
1403 * Finally, wait for transmitter to become empty
1404 * and restore the IER
1407 serial_out(up, UART_IER, ier);
1411 * Setup initial baud/bits/parity. We do two things here:
1412 * - construct a cflag setting for the first su_open()
1413 * - initialize the serial port
1414 * Return non-zero if we didn't find a serial port.
1416 static int sunsu_console_setup(struct console *co, char *options)
1418 struct uart_port *port;
1424 printk("Console: ttyS%d (SU)\n",
1425 (sunsu_reg.minor - 64) + co->index);
1428 * Check whether an invalid uart number has been specified, and
1429 * if so, search for the first available port that does have
1432 if (co->index >= UART_NR)
1434 port = &sunsu_ports[co->index].port;
1439 spin_lock_init(&port->lock);
1442 uart_parse_options(options, &baud, &parity, &bits, &flow);
1444 return uart_set_options(port, co, baud, parity, bits, flow);
1447 static struct console sunsu_cons = {
1449 .write = sunsu_console_write,
1450 .device = uart_console_device,
1451 .setup = sunsu_console_setup,
1452 .flags = CON_PRINTBUFFER,
1461 static inline struct console *SUNSU_CONSOLE(void)
1465 if (con_is_present())
1468 for (i = 0; i < UART_NR; i++) {
1469 int this_minor = sunsu_reg.minor + i;
1471 if ((this_minor - 64) == (serial_console - 1))
1476 if (sunsu_ports[i].port_node == 0)
1479 sunsu_cons.index = i;
1484 #define SUNSU_CONSOLE() (NULL)
1485 #define sunsu_serial_console_init() do { } while (0)
1488 static int __init sunsu_serial_init(void)
1490 int instance, ret, i;
1492 /* How many instances do we need? */
1494 for (i = 0; i < UART_NR; i++) {
1495 struct uart_sunsu_port *up = &sunsu_ports[i];
1497 if (up->su_type == SU_PORT_MS ||
1498 up->su_type == SU_PORT_KBD)
1501 spin_lock_init(&up->port.lock);
1502 up->port.flags |= UPF_BOOT_AUTOCONF;
1503 up->port.type = PORT_UNKNOWN;
1504 up->port.uartclk = (SU_BASE_BAUD * 16);
1506 sunsu_autoconfig(up);
1507 if (up->port.type == PORT_UNKNOWN)
1510 up->port.line = instance++;
1511 up->port.ops = &sunsu_pops;
1514 sunsu_reg.minor = sunserial_current_minor;
1516 sunsu_reg.nr = instance;
1518 ret = uart_register_driver(&sunsu_reg);
1522 sunsu_reg.tty_driver->name_base = sunsu_reg.minor - 64;
1524 sunserial_current_minor += instance;
1526 sunsu_reg.cons = SUNSU_CONSOLE();
1528 for (i = 0; i < UART_NR; i++) {
1529 struct uart_sunsu_port *up = &sunsu_ports[i];
1531 /* Do not register Keyboard/Mouse lines with UART
1534 if (up->su_type == SU_PORT_MS ||
1535 up->su_type == SU_PORT_KBD)
1538 if (up->port.type == PORT_UNKNOWN)
1541 uart_add_one_port(&sunsu_reg, &up->port);
1547 static int su_node_ok(int node, char *name, int namelen)
1549 if (strncmp(name, "su", namelen) == 0 ||
1550 strncmp(name, "su_pnp", namelen) == 0)
1553 if (strncmp(name, "serial", namelen) == 0) {
1557 /* Is it _really_ a 'su' device? */
1558 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1560 if (strncmp(compat, "sab82532", 8) == 0) {
1561 /* Nope, Siemens serial, not for us. */
1571 #define SU_PROPSIZE 128
1574 * Scan status structure.
1575 * "prop" is a local variable but it eats stack to keep it in each
1576 * stack frame of a recursive procedure.
1578 struct su_probe_scan {
1579 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1580 int msx, kbx; /* minors for mouse and keyboard */
1581 int devices; /* scan index */
1582 char prop[SU_PROPSIZE];
1586 * We have several platforms which present 'su' in different parts
1587 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1588 * We walk over the tree and find them wherever PROM hides them.
1590 static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1592 struct uart_sunsu_port *up;
1595 if (t->devices >= UART_NR)
1598 for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1599 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1601 continue; /* Broken PROM node */
1603 if (su_node_ok(sunode, t->prop, len)) {
1604 up = &sunsu_ports[t->devices];
1605 if (t->kbnode != 0 && sunode == t->kbnode) {
1606 t->kbx = t->devices;
1607 up->su_type = SU_PORT_KBD;
1608 } else if (t->msnode != 0 && sunode == t->msnode) {
1609 t->msx = t->devices;
1610 up->su_type = SU_PORT_MS;
1612 #ifdef CONFIG_SPARC64
1614 * Do not attempt to use the truncated
1615 * keyboard/mouse ports as serial ports
1616 * on Ultras with PC keyboard attached.
1618 if (prom_getbool(sunode, "mouse"))
1620 if (prom_getbool(sunode, "keyboard"))
1623 up->su_type = SU_PORT_PORT;
1625 up->port_node = sunode;
1628 su_probe_any(t, prom_getchild(sunode));
1633 static int __init sunsu_probe(void)
1637 struct su_probe_scan scan;
1640 * First, we scan the tree.
1649 * Get the nodes for keyboard and mouse from 'aliases'...
1651 node = prom_getchild(prom_root_node);
1652 node = prom_searchsiblings(node, "aliases");
1654 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1657 scan.kbnode = prom_finddevice(scan.prop);
1660 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1663 scan.msnode = prom_finddevice(scan.prop);
1667 su_probe_any(&scan, prom_getchild(prom_root_node));
1670 * Second, we process the special case of keyboard and mouse.
1672 * Currently if we got keyboard and mouse hooked to "su" ports
1673 * we do not use any possible remaining "su" as a serial port.
1674 * Thus, we ignore values of .msx and .kbx, then compact ports.
1676 if (scan.msx != -1 && scan.kbx != -1) {
1677 sunsu_ports[0].su_type = SU_PORT_MS;
1678 sunsu_ports[0].port_node = scan.msnode;
1679 sunsu_kbd_ms_init(&sunsu_ports[0], 0);
1681 sunsu_ports[1].su_type = SU_PORT_KBD;
1682 sunsu_ports[1].port_node = scan.kbnode;
1683 sunsu_kbd_ms_init(&sunsu_ports[1], 1);
1688 if (scan.msx != -1 || scan.kbx != -1) {
1689 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1693 if (scan.devices == 0)
1697 * Console must be initiated after the generic initialization.
1699 sunsu_serial_init();
1704 static void __exit sunsu_exit(void)
1709 for (i = 0; i < UART_NR; i++) {
1710 struct uart_sunsu_port *up = &sunsu_ports[i];
1712 if (up->su_type == SU_PORT_MS ||
1713 up->su_type == SU_PORT_KBD) {
1716 serio_unregister_port(up->serio);
1720 } else if (up->port.type != PORT_UNKNOWN) {
1721 uart_remove_one_port(&sunsu_reg, &up->port);
1727 uart_unregister_driver(&sunsu_reg);
1730 module_init(sunsu_probe);
1731 module_exit(sunsu_exit);
1732 MODULE_LICENSE("GPL");