1 /* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
35 /* General customization:
38 #define DRIVER_AUTHOR "VA Linux Systems Inc."
40 #define DRIVER_NAME "i810"
41 #define DRIVER_DESC "Intel i810"
42 #define DRIVER_DATE "20030605"
47 * 1.2 - XvMC interfaces
49 * 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility)
50 * - Remove requirement for interrupt (leave stubs again)
51 * 1.3 - Add page flipping.
52 * 1.4 - fix DRM interface
54 #define DRIVER_MAJOR 1
55 #define DRIVER_MINOR 4
56 #define DRIVER_PATCHLEVEL 0
58 typedef struct drm_i810_buf_priv {
64 } drm_i810_buf_priv_t;
66 typedef struct _drm_i810_ring_buffer {
75 } drm_i810_ring_buffer_t;
77 typedef struct drm_i810_private {
81 drm_i810_sarea_t *sarea_priv;
82 drm_i810_ring_buffer_t ring;
85 unsigned long counter;
87 dma_addr_t dma_status_page;
89 drm_buf_t *mmap_buffer;
91 u32 front_di1, back_di1, zi1;
108 wait_queue_head_t irq_queue;
109 atomic_t irq_received;
110 atomic_t irq_emitted;
113 } drm_i810_private_t;
116 extern void i810_reclaim_buffers(drm_device_t * dev, struct file *filp);
118 extern int i810_driver_dma_quiescent(drm_device_t * dev);
119 extern void i810_driver_release(drm_device_t * dev, struct file *filp);
120 extern void i810_driver_pretakedown(drm_device_t * dev);
121 extern void i810_driver_prerelease(drm_device_t * dev, DRMFILE filp);
122 extern int i810_driver_device_is_agp(drm_device_t * dev);
124 extern drm_ioctl_desc_t i810_ioctls[];
125 extern int i810_max_ioctl;
127 #define I810_BASE(reg) ((unsigned long) \
128 dev_priv->mmio_map->handle)
129 #define I810_ADDR(reg) (I810_BASE(reg) + reg)
130 #define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg)
131 #define I810_READ(reg) I810_DEREF(reg)
132 #define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0)
133 #define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg)
134 #define I810_READ16(reg) I810_DEREF16(reg)
135 #define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0)
137 #define I810_VERBOSE 0
138 #define RING_LOCALS unsigned int outring, ringmask; \
141 #define BEGIN_LP_RING(n) do { \
143 DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", n, __FUNCTION__); \
144 if (dev_priv->ring.space < n*4) \
145 i810_wait_ring(dev, n*4); \
146 dev_priv->ring.space -= n*4; \
147 outring = dev_priv->ring.tail; \
148 ringmask = dev_priv->ring.tail_mask; \
149 virt = dev_priv->ring.virtual_start; \
152 #define ADVANCE_LP_RING() do { \
153 if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \
154 dev_priv->ring.tail = outring; \
155 I810_WRITE(LP_RING + RING_TAIL, outring); \
158 #define OUT_RING(n) do { \
159 if (I810_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
160 *(volatile unsigned int *)(virt + outring) = n; \
162 outring &= ringmask; \
165 #define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
166 #define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
167 #define CMD_REPORT_HEAD (7<<23)
168 #define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1)
169 #define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1)
171 #define INST_PARSER_CLIENT 0x00000000
172 #define INST_OP_FLUSH 0x02000000
173 #define INST_FLUSH_MAP_CACHE 0x00000001
175 #define BB1_START_ADDR_MASK (~0x7)
176 #define BB1_PROTECTED (1<<0)
177 #define BB1_UNPROTECTED (0<<0)
178 #define BB2_END_ADDR_MASK (~0x7)
180 #define I810REG_HWSTAM 0x02098
181 #define I810REG_INT_IDENTITY_R 0x020a4
182 #define I810REG_INT_MASK_R 0x020a8
183 #define I810REG_INT_ENABLE_R 0x020a0
185 #define LP_RING 0x2030
186 #define HP_RING 0x2040
187 #define RING_TAIL 0x00
188 #define TAIL_ADDR 0x000FFFF8
189 #define RING_HEAD 0x04
190 #define HEAD_WRAP_COUNT 0xFFE00000
191 #define HEAD_WRAP_ONE 0x00200000
192 #define HEAD_ADDR 0x001FFFFC
193 #define RING_START 0x08
194 #define START_ADDR 0x00FFFFF8
195 #define RING_LEN 0x0C
196 #define RING_NR_PAGES 0x000FF000
197 #define RING_REPORT_MASK 0x00000006
198 #define RING_REPORT_64K 0x00000002
199 #define RING_REPORT_128K 0x00000004
200 #define RING_NO_REPORT 0x00000000
201 #define RING_VALID_MASK 0x00000001
202 #define RING_VALID 0x00000001
203 #define RING_INVALID 0x00000000
205 #define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19))
206 #define SC_UPDATE_SCISSOR (0x1<<1)
207 #define SC_ENABLE_MASK (0x1<<0)
208 #define SC_ENABLE (0x1<<0)
210 #define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
211 #define SCI_YMIN_MASK (0xffff<<16)
212 #define SCI_XMIN_MASK (0xffff<<0)
213 #define SCI_YMAX_MASK (0xffff<<16)
214 #define SCI_XMAX_MASK (0xffff<<0)
216 #define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
217 #define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
218 #define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2)
219 #define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
220 #define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
221 #define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24))
223 #define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23))
224 #define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23))
225 #define CMD_OP_FRONTBUFFER_INFO ((0x0<<29)|(0x14<<23))
226 #define CMD_OP_WAIT_FOR_EVENT ((0x0<<29)|(0x03<<23))
228 #define BR00_BITBLT_CLIENT 0x40000000
229 #define BR00_OP_COLOR_BLT 0x10000000
230 #define BR00_OP_SRC_COPY_BLT 0x10C00000
231 #define BR13_SOLID_PATTERN 0x80000000
233 #define WAIT_FOR_PLANE_A_SCANLINES (1<<1)
234 #define WAIT_FOR_PLANE_A_FLIP (1<<2)
235 #define WAIT_FOR_VBLANK (1<<3)