2 * linux/arch/arm/mach-iop32x/irq.c
4 * Generic IOP32X IRQ handling functionality
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * Added IOP3XX chipset and IQ80321 board masking code.
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/list.h>
20 #include <asm/mach/irq.h>
22 #include <asm/hardware.h>
24 #include <asm/mach-types.h>
26 static u32 iop321_mask /* = 0 */;
28 static inline void intctl_write(u32 val)
31 asm volatile("mcr p6,0,%0,c0,c0,0"::"r" (val));
35 static inline void intstr_write(u32 val)
38 asm volatile("mcr p6,0,%0,c4,c0,0"::"r" (val));
43 iop321_irq_mask (unsigned int irq)
46 iop321_mask &= ~(1 << irq);
48 intctl_write(iop321_mask);
52 iop321_irq_unmask (unsigned int irq)
54 iop321_mask |= (1 << irq);
56 intctl_write(iop321_mask);
59 struct irq_chip ext_chip = {
61 .ack = iop321_irq_mask,
62 .mask = iop321_irq_mask,
63 .unmask = iop321_irq_unmask,
66 void __init iop321_init_irq(void)
70 intctl_write(0); // disable all interrupts
71 intstr_write(0); // treat all as IRQ
72 if(machine_is_iq80321() ||
73 machine_is_iq31244()) // all interrupts are inputs to chip
74 *IOP3XX_PCIIRSR = 0x0f;
76 for(i = 0; i < NR_IRQS; i++)
78 set_irq_chip(i, &ext_chip);
79 set_irq_handler(i, do_level_IRQ);
80 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);