git.oblomov.eu Git - linux-2.6/blob - drivers/infiniband/hw/ipath/ipath_intr.c

   1 /*
   2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/pci.h>
  35
  36 #include "ipath_kernel.h"
  37 #include "ipath_verbs.h"
  38 #include "ipath_common.h"
  39
  40 /*
  41  * Called when we might have an error that is specific to a particular
  42  * PIO buffer, and may need to cancel that buffer, so it can be re-used.
  43  */
  44 void ipath_disarm_senderrbufs(struct ipath_devdata *dd)
  45 {
  46         u32 piobcnt;
  47         unsigned long sbuf[4];
  48         /*
  49          * it's possible that sendbuffererror could have bits set; might
  50          * have already done this as a result of hardware error handling
  51          */
  52         piobcnt = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
  53         /* read these before writing errorclear */
  54         sbuf[0] = ipath_read_kreg64(
  55                 dd, dd->ipath_kregs->kr_sendbuffererror);
  56         sbuf[1] = ipath_read_kreg64(
  57                 dd, dd->ipath_kregs->kr_sendbuffererror + 1);
  58         if (piobcnt > 128) {
  59                 sbuf[2] = ipath_read_kreg64(
  60                         dd, dd->ipath_kregs->kr_sendbuffererror + 2);
  61                 sbuf[3] = ipath_read_kreg64(
  62                         dd, dd->ipath_kregs->kr_sendbuffererror + 3);
  63         }
  64
  65         if (sbuf[0] || sbuf[1] || (piobcnt > 128 && (sbuf[2] || sbuf[3]))) {
  66                 int i;
  67                 if (ipath_debug & (__IPATH_PKTDBG|__IPATH_DBG)) {
  68                         __IPATH_DBG_WHICH(__IPATH_PKTDBG|__IPATH_DBG,
  69                                           "SendbufErrs %lx %lx", sbuf[0],
  70                                           sbuf[1]);
  71                         if (ipath_debug & __IPATH_PKTDBG && piobcnt > 128)
  72                                 printk(" %lx %lx ", sbuf[2], sbuf[3]);
  73                         printk("\n");
  74                 }
  75
  76                 for (i = 0; i < piobcnt; i++)
  77                         if (test_bit(i, sbuf))
  78                                 ipath_disarm_piobufs(dd, i, 1);
  79                 dd->ipath_lastcancel = jiffies+3; /* no armlaunch for a bit */
  80         }
  81 }
  82
  83
  84 /* These are all rcv-related errors which we want to count for stats */
  85 #define E_SUM_PKTERRS \
  86         (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \
  87          INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \
  88          INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \
  89          INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \
  90          INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \
  91          INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP)
  92
  93 /* These are all send-related errors which we want to count for stats */
  94 #define E_SUM_ERRS \
  95         (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \
  96          INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
  97          INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \
  98          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
  99          INFINIPATH_E_INVALIDADDR)
 100
 101 /*
 102  * these are errors that can occur when the link changes state while
 103  * a packet is being sent or received.  This doesn't cover things
 104  * like EBP or VCRC that can be the result of a sending having the
 105  * link change state, so we receive a "known bad" packet.
 106  */
 107 #define E_SUM_LINK_PKTERRS \
 108         (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 109          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
 110          INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \
 111          INFINIPATH_E_RUNEXPCHAR)
 112
 113 static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs)
 114 {
 115         u64 ignore_this_time = 0;
 116
 117         ipath_disarm_senderrbufs(dd);
 118         if ((errs & E_SUM_LINK_PKTERRS) &&
 119             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
 120                 /*
 121                  * This can happen when SMA is trying to bring the link
 122                  * up, but the IB link changes state at the "wrong" time.
 123                  * The IB logic then complains that the packet isn't
 124                  * valid.  We don't want to confuse people, so we just
 125                  * don't print them, except at debug
 126                  */
 127                 ipath_dbg("Ignoring packet errors %llx, because link not "
 128                           "ACTIVE\n", (unsigned long long) errs);
 129                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
 130         }
 131
 132         return ignore_this_time;
 133 }
 134
 135 /* generic hw error messages... */
 136 #define INFINIPATH_HWE_TXEMEMPARITYERR_MSG(a) \
 137         { \
 138                 .mask = ( INFINIPATH_HWE_TXEMEMPARITYERR_##a <<    \
 139                           INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT ),   \
 140                 .msg = "TXE " #a " Memory Parity"            \
 141         }
 142 #define INFINIPATH_HWE_RXEMEMPARITYERR_MSG(a) \
 143         { \
 144                 .mask = ( INFINIPATH_HWE_RXEMEMPARITYERR_##a <<    \
 145                           INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT ),   \
 146                 .msg = "RXE " #a " Memory Parity"            \
 147         }
 148
 149 static const struct ipath_hwerror_msgs ipath_generic_hwerror_msgs[] = {
 150         INFINIPATH_HWE_MSG(IBCBUSFRSPCPARITYERR, "IPATH2IB Parity"),
 151         INFINIPATH_HWE_MSG(IBCBUSTOSPCPARITYERR, "IB2IPATH Parity"),
 152
 153         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOBUF),
 154         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOPBC),
 155         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOLAUNCHFIFO),
 156
 157         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(RCVBUF),
 158         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(LOOKUPQ),
 159         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EAGERTID),
 160         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EXPTID),
 161         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(FLAGBUF),
 162         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(DATAINFO),
 163         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(HDRINFO),
 164 };
 165
 166 /**
 167  * ipath_format_hwmsg - format a single hwerror message
 168  * @msg message buffer
 169  * @msgl length of message buffer
 170  * @hwmsg message to add to message buffer
 171  */
 172 static void ipath_format_hwmsg(char *msg, size_t msgl, const char *hwmsg)
 173 {
 174         strlcat(msg, "[", msgl);
 175         strlcat(msg, hwmsg, msgl);
 176         strlcat(msg, "]", msgl);
 177 }
 178
 179 /**
 180  * ipath_format_hwerrors - format hardware error messages for display
 181  * @hwerrs hardware errors bit vector
 182  * @hwerrmsgs hardware error descriptions
 183  * @nhwerrmsgs number of hwerrmsgs
 184  * @msg message buffer
 185  * @msgl message buffer length
 186  */
 187 void ipath_format_hwerrors(u64 hwerrs,
 188                            const struct ipath_hwerror_msgs *hwerrmsgs,
 189                            size_t nhwerrmsgs,
 190                            char *msg, size_t msgl)
 191 {
 192         int i;
 193         const int glen =
 194             sizeof(ipath_generic_hwerror_msgs) /
 195             sizeof(ipath_generic_hwerror_msgs[0]);
 196
 197         for (i=0; i<glen; i++) {
 198                 if (hwerrs & ipath_generic_hwerror_msgs[i].mask) {
 199                         ipath_format_hwmsg(msg, msgl,
 200                                            ipath_generic_hwerror_msgs[i].msg);
 201                 }
 202         }
 203
 204         for (i=0; i<nhwerrmsgs; i++) {
 205                 if (hwerrs & hwerrmsgs[i].mask) {
 206                         ipath_format_hwmsg(msg, msgl, hwerrmsgs[i].msg);
 207                 }
 208         }
 209 }
 210
 211 /* return the strings for the most common link states */
 212 static char *ib_linkstate(u32 linkstate)
 213 {
 214         char *ret;
 215
 216         switch (linkstate) {
 217         case IPATH_IBSTATE_INIT:
 218                 ret = "Init";
 219                 break;
 220         case IPATH_IBSTATE_ARM:
 221                 ret = "Arm";
 222                 break;
 223         case IPATH_IBSTATE_ACTIVE:
 224                 ret = "Active";
 225                 break;
 226         default:
 227                 ret = "Down";
 228         }
 229
 230         return ret;
 231 }
 232
 233 static void handle_e_ibstatuschanged(struct ipath_devdata *dd,
 234                                      ipath_err_t errs, int noprint)
 235 {
 236         u64 val;
 237         u32 ltstate, lstate;
 238
 239         /*
 240          * even if diags are enabled, we want to notice LINKINIT, etc.
 241          * We just don't want to change the LED state, or
 242          * dd->ipath_kregs->kr_ibcctrl
 243          */
 244         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 245         lstate = val & IPATH_IBSTATE_MASK;
 246
 247         /*
 248          * this is confusing enough when it happens that I want to always put it
 249          * on the console and in the logs.  If it was a requested state change,
 250          * we'll have already cleared the flags, so we won't print this warning
 251          */
 252         if ((lstate != IPATH_IBSTATE_ARM && lstate != IPATH_IBSTATE_ACTIVE)
 253                 && (dd->ipath_flags & (IPATH_LINKARMED | IPATH_LINKACTIVE))) {
 254                 dev_info(&dd->pcidev->dev, "Link state changed from %s to %s\n",
 255                                  (dd->ipath_flags & IPATH_LINKARMED) ? "ARM" : "ACTIVE",
 256                                  ib_linkstate(lstate));
 257                 /*
 258                  * Flush all queued sends when link went to DOWN or INIT,
 259                  * to be sure that they don't block SMA and other MAD packets
 260                  */
 261                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 262                                  INFINIPATH_S_ABORT);
 263                 ipath_disarm_piobufs(dd, dd->ipath_lastport_piobuf,
 264                                                         (unsigned)(dd->ipath_piobcnt2k +
 265                                         dd->ipath_piobcnt4k) -
 266                                         dd->ipath_lastport_piobuf);
 267         }
 268         else if (lstate == IPATH_IBSTATE_INIT || lstate == IPATH_IBSTATE_ARM ||
 269             lstate == IPATH_IBSTATE_ACTIVE) {
 270                 /*
 271                  * only print at SMA if there is a change, debug if not
 272                  * (sometimes we want to know that, usually not).
 273                  */
 274                 if (lstate == ((unsigned) dd->ipath_lastibcstat
 275                                & IPATH_IBSTATE_MASK)) {
 276                         ipath_dbg("Status change intr but no change (%s)\n",
 277                                   ib_linkstate(lstate));
 278                 }
 279                 else
 280                         ipath_cdbg(VERBOSE, "Unit %u link state %s, last "
 281                                    "was %s\n", dd->ipath_unit,
 282                                    ib_linkstate(lstate),
 283                                    ib_linkstate((unsigned)
 284                                                 dd->ipath_lastibcstat
 285                                                 & IPATH_IBSTATE_MASK));
 286         }
 287         else {
 288                 lstate = dd->ipath_lastibcstat & IPATH_IBSTATE_MASK;
 289                 if (lstate == IPATH_IBSTATE_INIT ||
 290                     lstate == IPATH_IBSTATE_ARM ||
 291                     lstate == IPATH_IBSTATE_ACTIVE)
 292                         ipath_cdbg(VERBOSE, "Unit %u link state down"
 293                                    " (state 0x%x), from %s\n",
 294                                    dd->ipath_unit,
 295                                    (u32)val & IPATH_IBSTATE_MASK,
 296                                    ib_linkstate(lstate));
 297                 else
 298                         ipath_cdbg(VERBOSE, "Unit %u link state changed "
 299                                    "to 0x%x from down (%x)\n",
 300                                    dd->ipath_unit, (u32) val, lstate);
 301         }
 302         ltstate = (val >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
 303                 INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
 304         lstate = (val >> INFINIPATH_IBCS_LINKSTATE_SHIFT) &
 305                 INFINIPATH_IBCS_LINKSTATE_MASK;
 306
 307         if (ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE ||
 308             ltstate == INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
 309                 u32 last_ltstate;
 310
 311                 /*
 312                  * Ignore cycling back and forth from Polling.Active
 313                  * to Polling.Quiet while waiting for the other end of
 314                  * the link to come up. We will cycle back and forth
 315                  * between them if no cable is plugged in,
 316                  * the other device is powered off or disabled, etc.
 317                  */
 318                 last_ltstate = (dd->ipath_lastibcstat >>
 319                                 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT)
 320                         & INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
 321                 if (last_ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE
 322                     || last_ltstate ==
 323                     INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
 324                         if (dd->ipath_ibpollcnt > 40) {
 325                                 dd->ipath_flags |= IPATH_NOCABLE;
 326                                 *dd->ipath_statusp |=
 327                                         IPATH_STATUS_IB_NOCABLE;
 328                         } else
 329                                 dd->ipath_ibpollcnt++;
 330                         goto skip_ibchange;
 331                 }
 332         }
 333         dd->ipath_ibpollcnt = 0;        /* some state other than 2 or 3 */
 334         ipath_stats.sps_iblink++;
 335         if (ltstate != INFINIPATH_IBCS_LT_STATE_LINKUP) {
 336                 dd->ipath_flags |= IPATH_LINKDOWN;
 337                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 338                                      | IPATH_LINKACTIVE |
 339                                      IPATH_LINKARMED);
 340                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 341                 dd->ipath_lli_counter = 0;
 342                 if (!noprint) {
 343                         if (((dd->ipath_lastibcstat >>
 344                               INFINIPATH_IBCS_LINKSTATE_SHIFT) &
 345                              INFINIPATH_IBCS_LINKSTATE_MASK)
 346                             == INFINIPATH_IBCS_L_STATE_ACTIVE)
 347                                 /* if from up to down be more vocal */
 348                                 ipath_cdbg(VERBOSE,
 349                                            "Unit %u link now down (%s)\n",
 350                                            dd->ipath_unit,
 351                                            ipath_ibcstatus_str[ltstate]);
 352                         else
 353                                 ipath_cdbg(VERBOSE, "Unit %u link is "
 354                                            "down (%s)\n", dd->ipath_unit,
 355                                            ipath_ibcstatus_str[ltstate]);
 356                 }
 357
 358                 dd->ipath_f_setextled(dd, lstate, ltstate);
 359         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ACTIVE) {
 360                 dd->ipath_flags |= IPATH_LINKACTIVE;
 361                 dd->ipath_flags &=
 362                         ~(IPATH_LINKUNK | IPATH_LINKINIT | IPATH_LINKDOWN |
 363                           IPATH_LINKARMED | IPATH_NOCABLE);
 364                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_NOCABLE;
 365                 *dd->ipath_statusp |=
 366                         IPATH_STATUS_IB_READY | IPATH_STATUS_IB_CONF;
 367                 dd->ipath_f_setextled(dd, lstate, ltstate);
 368         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_INIT) {
 369                 /*
 370                  * set INIT and DOWN.  Down is checked by most of the other
 371                  * code, but INIT is useful to know in a few places.
 372                  */
 373                 dd->ipath_flags |= IPATH_LINKINIT | IPATH_LINKDOWN;
 374                 dd->ipath_flags &=
 375                         ~(IPATH_LINKUNK | IPATH_LINKACTIVE | IPATH_LINKARMED
 376                           | IPATH_NOCABLE);
 377                 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE
 378                                         | IPATH_STATUS_IB_READY);
 379                 dd->ipath_f_setextled(dd, lstate, ltstate);
 380         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ARM) {
 381                 dd->ipath_flags |= IPATH_LINKARMED;
 382                 dd->ipath_flags &=
 383                         ~(IPATH_LINKUNK | IPATH_LINKDOWN | IPATH_LINKINIT |
 384                           IPATH_LINKACTIVE | IPATH_NOCABLE);
 385                 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE
 386                                         | IPATH_STATUS_IB_READY);
 387                 dd->ipath_f_setextled(dd, lstate, ltstate);
 388         } else {
 389                 if (!noprint)
 390                         ipath_dbg("IBstatuschange unit %u: %s (%x)\n",
 391                                   dd->ipath_unit,
 392                                   ipath_ibcstatus_str[ltstate], ltstate);
 393         }
 394 skip_ibchange:
 395         dd->ipath_lastibcstat = val;
 396 }
 397
 398 static void handle_supp_msgs(struct ipath_devdata *dd,
 399                              unsigned supp_msgs, char msg[512])
 400 {
 401         /*
 402          * Print the message unless it's ibc status change only, which
 403          * happens so often we never want to count it.
 404          */
 405         if (dd->ipath_lasterror & ~INFINIPATH_E_IBSTATUSCHANGED) {
 406                 int iserr;
 407                 iserr = ipath_decode_err(msg, sizeof msg,
 408                                 dd->ipath_lasterror &
 409                                 ~INFINIPATH_E_IBSTATUSCHANGED);
 410                 if (dd->ipath_lasterror &
 411                         ~(INFINIPATH_E_RRCVEGRFULL |
 412                         INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
 413                         ipath_dev_err(dd, "Suppressed %u messages for "
 414                                       "fast-repeating errors (%s) (%llx)\n",
 415                                       supp_msgs, msg,
 416                                       (unsigned long long)
 417                                       dd->ipath_lasterror);
 418                 else {
 419                         /*
 420                          * rcvegrfull and rcvhdrqfull are "normal", for some
 421                          * types of processes (mostly benchmarks) that send
 422                          * huge numbers of messages, while not processing
 423                          * them. So only complain about these at debug
 424                          * level.
 425                          */
 426                         if (iserr)
 427                                 ipath_dbg("Suppressed %u messages for %s\n",
 428                                           supp_msgs, msg);
 429                         else
 430                                 ipath_cdbg(ERRPKT,
 431                                         "Suppressed %u messages for %s\n",
 432                                           supp_msgs, msg);
 433                 }
 434         }
 435 }
 436
 437 static unsigned handle_frequent_errors(struct ipath_devdata *dd,
 438                                        ipath_err_t errs, char msg[512],
 439                                        int *noprint)
 440 {
 441         unsigned long nc;
 442         static unsigned long nextmsg_time;
 443         static unsigned nmsgs, supp_msgs;
 444
 445         /*
 446          * Throttle back "fast" messages to no more than 10 per 5 seconds.
 447          * This isn't perfect, but it's a reasonable heuristic. If we get
 448          * more than 10, give a 6x longer delay.
 449          */
 450         nc = jiffies;
 451         if (nmsgs > 10) {
 452                 if (time_before(nc, nextmsg_time)) {
 453                         *noprint = 1;
 454                         if (!supp_msgs++)
 455                                 nextmsg_time = nc + HZ * 3;
 456                 }
 457                 else if (supp_msgs) {
 458                         handle_supp_msgs(dd, supp_msgs, msg);
 459                         supp_msgs = 0;
 460                         nmsgs = 0;
 461                 }
 462         }
 463         else if (!nmsgs++ || time_after(nc, nextmsg_time))
 464                 nextmsg_time = nc + HZ / 2;
 465
 466         return supp_msgs;
 467 }
 468
 469 static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
 470 {
 471         char msg[512];
 472         u64 ignore_this_time = 0;
 473         int i, iserr = 0;
 474         int chkerrpkts = 0, noprint = 0;
 475         unsigned supp_msgs;
 476
 477         supp_msgs = handle_frequent_errors(dd, errs, msg, &noprint);
 478
 479         /*
 480          * don't report errors that are masked (includes those always
 481          * ignored)
 482          */
 483         errs &= ~dd->ipath_maskederrs;
 484
 485         /* do these first, they are most important */
 486         if (errs & INFINIPATH_E_HARDWARE) {
 487                 /* reuse same msg buf */
 488                 dd->ipath_f_handle_hwerrors(dd, msg, sizeof msg);
 489         }
 490
 491         if (!noprint && (errs & ~dd->ipath_e_bitsextant))
 492                 ipath_dev_err(dd, "error interrupt with unknown errors "
 493                               "%llx set\n", (unsigned long long)
 494                               (errs & ~dd->ipath_e_bitsextant));
 495
 496         if (errs & E_SUM_ERRS)
 497                 ignore_this_time = handle_e_sum_errs(dd, errs);
 498         else if ((errs & E_SUM_LINK_PKTERRS) &&
 499             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
 500                 /*
 501                  * This can happen when SMA is trying to bring the link
 502                  * up, but the IB link changes state at the "wrong" time.
 503                  * The IB logic then complains that the packet isn't
 504                  * valid.  We don't want to confuse people, so we just
 505                  * don't print them, except at debug
 506                  */
 507                 ipath_dbg("Ignoring packet errors %llx, because link not "
 508                           "ACTIVE\n", (unsigned long long) errs);
 509                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
 510         }
 511
 512         if (supp_msgs == 250000) {
 513                 int s_iserr;
 514                 /*
 515                  * It's not entirely reasonable assuming that the errors set
 516                  * in the last clear period are all responsible for the
 517                  * problem, but the alternative is to assume it's the only
 518                  * ones on this particular interrupt, which also isn't great
 519                  */
 520                 dd->ipath_maskederrs |= dd->ipath_lasterror | errs;
 521                 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 522                                  ~dd->ipath_maskederrs);
 523                 s_iserr = ipath_decode_err(msg, sizeof msg,
 524                                  (dd->ipath_maskederrs & ~dd->
 525                                   ipath_ignorederrs));
 526
 527                 if ((dd->ipath_maskederrs & ~dd->ipath_ignorederrs) &
 528                         ~(INFINIPATH_E_RRCVEGRFULL |
 529                         INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
 530                         ipath_dev_err(dd, "Temporarily disabling "
 531                             "error(s) %llx reporting; too frequent (%s)\n",
 532                                 (unsigned long long) (dd->ipath_maskederrs &
 533                                 ~dd->ipath_ignorederrs), msg);
 534                 else {
 535                         /*
 536                          * rcvegrfull and rcvhdrqfull are "normal",
 537                          * for some types of processes (mostly benchmarks)
 538                          * that send huge numbers of messages, while not
 539                          * processing them.  So only complain about
 540                          * these at debug level.
 541                          */
 542                         if (s_iserr)
 543                                 ipath_dbg("Temporarily disabling reporting "
 544                                     "too frequent queue full errors (%s)\n",
 545                                     msg);
 546                         else
 547                                 ipath_cdbg(ERRPKT,
 548                                     "Temporarily disabling reporting too"
 549                                     " frequent packet errors (%s)\n",
 550                                     msg);
 551                 }
 552
 553                 /*
 554                  * Re-enable the masked errors after around 3 minutes.  in
 555                  * ipath_get_faststats().  If we have a series of fast
 556                  * repeating but different errors, the interval will keep
 557                  * stretching out, but that's OK, as that's pretty
 558                  * catastrophic.
 559                  */
 560                 dd->ipath_unmasktime = jiffies + HZ * 180;
 561         }
 562
 563         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, errs);
 564         if (ignore_this_time)
 565                 errs &= ~ignore_this_time;
 566         if (errs & ~dd->ipath_lasterror) {
 567                 errs &= ~dd->ipath_lasterror;
 568                 /* never suppress duplicate hwerrors or ibstatuschange */
 569                 dd->ipath_lasterror |= errs &
 570                         ~(INFINIPATH_E_HARDWARE |
 571                           INFINIPATH_E_IBSTATUSCHANGED);
 572         }
 573
 574         /* likely due to cancel, so suppress */
 575         if ((errs & (INFINIPATH_E_SPKTLEN | INFINIPATH_E_SPIOARMLAUNCH)) &&
 576                 dd->ipath_lastcancel > jiffies) {
 577                 ipath_dbg("Suppressed armlaunch/spktlen after error send cancel\n");
 578                 errs &= ~(INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SPKTLEN);
 579         }
 580
 581         if (!errs)
 582                 return 0;
 583
 584         if (!noprint)
 585                 /*
 586                  * the ones we mask off are handled specially below or above
 587                  */
 588                 ipath_decode_err(msg, sizeof msg,
 589                                  errs & ~(INFINIPATH_E_IBSTATUSCHANGED |
 590                                           INFINIPATH_E_RRCVEGRFULL |
 591                                           INFINIPATH_E_RRCVHDRFULL |
 592                                           INFINIPATH_E_HARDWARE));
 593         else
 594                 /* so we don't need if (!noprint) at strlcat's below */
 595                 *msg = 0;
 596
 597         if (errs & E_SUM_PKTERRS) {
 598                 ipath_stats.sps_pkterrs++;
 599                 chkerrpkts = 1;
 600         }
 601         if (errs & E_SUM_ERRS)
 602                 ipath_stats.sps_errs++;
 603
 604         if (errs & (INFINIPATH_E_RICRC | INFINIPATH_E_RVCRC)) {
 605                 ipath_stats.sps_crcerrs++;
 606                 chkerrpkts = 1;
 607         }
 608         iserr = errs & ~(E_SUM_PKTERRS | INFINIPATH_E_PKTERRS);
 609
 610
 611         /*
 612          * We don't want to print these two as they happen, or we can make
 613          * the situation even worse, because it takes so long to print
 614          * messages to serial consoles.  Kernel ports get printed from
 615          * fast_stats, no more than every 5 seconds, user ports get printed
 616          * on close
 617          */
 618         if (errs & INFINIPATH_E_RRCVHDRFULL) {
 619                 u32 hd, tl;
 620                 ipath_stats.sps_hdrqfull++;
 621                 for (i = 0; i < dd->ipath_cfgports; i++) {
 622                         struct ipath_portdata *pd = dd->ipath_pd[i];
 623                         if (i == 0) {
 624                                 hd = dd->ipath_port0head;
 625                                 tl = (u32) le64_to_cpu(
 626                                         *dd->ipath_hdrqtailptr);
 627                         } else if (pd && pd->port_cnt &&
 628                                    pd->port_rcvhdrtail_kvaddr) {
 629                                 /*
 630                                  * don't report same point multiple times,
 631                                  * except kernel
 632                                  */
 633                                 tl = *(u64 *) pd->port_rcvhdrtail_kvaddr;
 634                                 if (tl == dd->ipath_lastrcvhdrqtails[i])
 635                                         continue;
 636                                 hd = ipath_read_ureg32(dd, ur_rcvhdrhead,
 637                                                        i);
 638                         } else
 639                                 continue;
 640                         if (hd == (tl + 1) ||
 641                             (!hd && tl == dd->ipath_hdrqlast)) {
 642                                 if (i == 0)
 643                                         chkerrpkts = 1;
 644                                 dd->ipath_lastrcvhdrqtails[i] = tl;
 645                                 pd->port_hdrqfull++;
 646                         }
 647                 }
 648         }
 649         if (errs & INFINIPATH_E_RRCVEGRFULL) {
 650                 /*
 651                  * since this is of less importance and not likely to
 652                  * happen without also getting hdrfull, only count
 653                  * occurrences; don't check each port (or even the kernel
 654                  * vs user)
 655                  */
 656                 ipath_stats.sps_etidfull++;
 657                 if (dd->ipath_port0head !=
 658                     (u32) le64_to_cpu(*dd->ipath_hdrqtailptr))
 659                         chkerrpkts = 1;
 660         }
 661
 662         /*
 663          * do this before IBSTATUSCHANGED, in case both bits set in a single
 664          * interrupt; we want the STATUSCHANGE to "win", so we do our
 665          * internal copy of state machine correctly
 666          */
 667         if (errs & INFINIPATH_E_RIBLOSTLINK) {
 668                 /*
 669                  * force through block below
 670                  */
 671                 errs |= INFINIPATH_E_IBSTATUSCHANGED;
 672                 ipath_stats.sps_iblink++;
 673                 dd->ipath_flags |= IPATH_LINKDOWN;
 674                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 675                                      | IPATH_LINKARMED | IPATH_LINKACTIVE);
 676                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 677                 if (!noprint) {
 678                         u64 st = ipath_read_kreg64(
 679                                 dd, dd->ipath_kregs->kr_ibcstatus);
 680
 681                         ipath_dbg("Lost link, link now down (%s)\n",
 682                                   ipath_ibcstatus_str[st & 0xf]);
 683                 }
 684         }
 685         if (errs & INFINIPATH_E_IBSTATUSCHANGED)
 686                 handle_e_ibstatuschanged(dd, errs, noprint);
 687
 688         if (errs & INFINIPATH_E_RESET) {
 689                 if (!noprint)
 690                         ipath_dev_err(dd, "Got reset, requires re-init "
 691                                       "(unload and reload driver)\n");
 692                 dd->ipath_flags &= ~IPATH_INITTED;      /* needs re-init */
 693                 /* mark as having had error */
 694                 *dd->ipath_statusp |= IPATH_STATUS_HWERROR;
 695                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_CONF;
 696         }
 697
 698         if (!noprint && *msg) {
 699                 if (iserr)
 700                         ipath_dev_err(dd, "%s error\n", msg);
 701                 else
 702                         dev_info(&dd->pcidev->dev, "%s packet problems\n",
 703                                 msg);
 704         }
 705         if (dd->ipath_state_wanted & dd->ipath_flags) {
 706                 ipath_cdbg(VERBOSE, "driver wanted state %x, iflags now %x, "
 707                            "waking\n", dd->ipath_state_wanted,
 708                            dd->ipath_flags);
 709                 wake_up_interruptible(&ipath_state_wait);
 710         }
 711
 712         return chkerrpkts;
 713 }
 714
 715 /* this is separate to allow for better optimization of ipath_intr() */
 716
 717 static void ipath_bad_intr(struct ipath_devdata *dd, u32 * unexpectp)
 718 {
 719         /*
 720          * sometimes happen during driver init and unload, don't want
 721          * to process any interrupts at that point
 722          */
 723
 724         /* this is just a bandaid, not a fix, if something goes badly
 725          * wrong */
 726         if (++*unexpectp > 100) {
 727                 if (++*unexpectp > 105) {
 728                         /*
 729                          * ok, we must be taking somebody else's interrupts,
 730                          * due to a messed up mptable and/or PIRQ table, so
 731                          * unregister the interrupt.  We've seen this during
 732                          * linuxbios development work, and it may happen in
 733                          * the future again.
 734                          */
 735                         if (dd->pcidev && dd->ipath_irq) {
 736                                 ipath_dev_err(dd, "Now %u unexpected "
 737                                               "interrupts, unregistering "
 738                                               "interrupt handler\n",
 739                                               *unexpectp);
 740                                 ipath_dbg("free_irq of irq %d\n",
 741                                           dd->ipath_irq);
 742                                 dd->ipath_f_free_irq(dd);
 743                         }
 744                 }
 745                 if (ipath_read_kreg32(dd, dd->ipath_kregs->kr_intmask)) {
 746                         ipath_dev_err(dd, "%u unexpected interrupts, "
 747                                       "disabling interrupts completely\n",
 748                                       *unexpectp);
 749                         /*
 750                          * disable all interrupts, something is very wrong
 751                          */
 752                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
 753                                          0ULL);
 754                 }
 755         } else if (*unexpectp > 1)
 756                 ipath_dbg("Interrupt when not ready, should not happen, "
 757                           "ignoring\n");
 758 }
 759
 760 static void ipath_bad_regread(struct ipath_devdata *dd)
 761 {
 762         static int allbits;
 763
 764         /* separate routine, for better optimization of ipath_intr() */
 765
 766         /*
 767          * We print the message and disable interrupts, in hope of
 768          * having a better chance of debugging the problem.
 769          */
 770         ipath_dev_err(dd,
 771                       "Read of interrupt status failed (all bits set)\n");
 772         if (allbits++) {
 773                 /* disable all interrupts, something is very wrong */
 774                 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
 775                 if (allbits == 2) {
 776                         ipath_dev_err(dd, "Still bad interrupt status, "
 777                                       "unregistering interrupt\n");
 778                         dd->ipath_f_free_irq(dd);
 779                 } else if (allbits > 2) {
 780                         if ((allbits % 10000) == 0)
 781                                 printk(".");
 782                 } else
 783                         ipath_dev_err(dd, "Disabling interrupts, "
 784                                       "multiple errors\n");
 785         }
 786 }
 787
 788 static void handle_port_pioavail(struct ipath_devdata *dd)
 789 {
 790         u32 i;
 791         /*
 792          * start from port 1, since for now port 0  is never using
 793          * wait_event for PIO
 794          */
 795         for (i = 1; dd->ipath_portpiowait && i < dd->ipath_cfgports; i++) {
 796                 struct ipath_portdata *pd = dd->ipath_pd[i];
 797
 798                 if (pd && pd->port_cnt &&
 799                     dd->ipath_portpiowait & (1U << i)) {
 800                         clear_bit(i, &dd->ipath_portpiowait);
 801                         if (test_bit(IPATH_PORT_WAITING_PIO,
 802                                      &pd->port_flag)) {
 803                                 clear_bit(IPATH_PORT_WAITING_PIO,
 804                                           &pd->port_flag);
 805                                 wake_up_interruptible(&pd->port_wait);
 806                         }
 807                 }
 808         }
 809 }
 810
 811 static void handle_layer_pioavail(struct ipath_devdata *dd)
 812 {
 813         int ret;
 814
 815         ret = ipath_ib_piobufavail(dd->verbs_dev);
 816         if (ret > 0)
 817                 goto set;
 818
 819         return;
 820 set:
 821         set_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl);
 822         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 823                          dd->ipath_sendctrl);
 824 }
 825
 826 /*
 827  * Handle receive interrupts for user ports; this means a user
 828  * process was waiting for a packet to arrive, and didn't want
 829  * to poll
 830  */
 831 static void handle_urcv(struct ipath_devdata *dd, u32 istat)
 832 {
 833         u64 portr;
 834         int i;
 835         int rcvdint = 0;
 836
 837         portr = ((istat >> INFINIPATH_I_RCVAVAIL_SHIFT) &
 838                  dd->ipath_i_rcvavail_mask)
 839                 | ((istat >> INFINIPATH_I_RCVURG_SHIFT) &
 840                    dd->ipath_i_rcvurg_mask);
 841         for (i = 1; i < dd->ipath_cfgports; i++) {
 842                 struct ipath_portdata *pd = dd->ipath_pd[i];
 843                 if (portr & (1 << i) && pd && pd->port_cnt &&
 844                         test_bit(IPATH_PORT_WAITING_RCV, &pd->port_flag)) {
 845                         clear_bit(IPATH_PORT_WAITING_RCV,
 846                                   &pd->port_flag);
 847                         clear_bit(i + INFINIPATH_R_INTRAVAIL_SHIFT,
 848                                   &dd->ipath_rcvctrl);
 849                         wake_up_interruptible(&pd->port_wait);
 850                         rcvdint = 1;
 851                 }
 852         }
 853         if (rcvdint) {
 854                 /* only want to take one interrupt, so turn off the rcv
 855                  * interrupt for all the ports that we did the wakeup on
 856                  * (but never for kernel port)
 857                  */
 858                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
 859                                  dd->ipath_rcvctrl);
 860         }
 861 }
 862
 863 irqreturn_t ipath_intr(int irq, void *data)
 864 {
 865         struct ipath_devdata *dd = data;
 866         u32 istat, chk0rcv = 0;
 867         ipath_err_t estat = 0;
 868         irqreturn_t ret;
 869         u32 oldhead, curtail;
 870         static unsigned unexpected = 0;
 871         static const u32 port0rbits = (1U<<INFINIPATH_I_RCVAVAIL_SHIFT) |
 872                  (1U<<INFINIPATH_I_RCVURG_SHIFT);
 873
 874         ipath_stats.sps_ints++;
 875
 876         if (!(dd->ipath_flags & IPATH_PRESENT)) {
 877                 /*
 878                  * This return value is not great, but we do not want the
 879                  * interrupt core code to remove our interrupt handler
 880                  * because we don't appear to be handling an interrupt
 881                  * during a chip reset.
 882                  */
 883                 return IRQ_HANDLED;
 884         }
 885
 886         /*
 887          * this needs to be flags&initted, not statusp, so we keep
 888          * taking interrupts even after link goes down, etc.
 889          * Also, we *must* clear the interrupt at some point, or we won't
 890          * take it again, which can be real bad for errors, etc...
 891          */
 892
 893         if (!(dd->ipath_flags & IPATH_INITTED)) {
 894                 ipath_bad_intr(dd, &unexpected);
 895                 ret = IRQ_NONE;
 896                 goto bail;
 897         }
 898
 899         /*
 900          * We try to avoid reading the interrupt status register, since
 901          * that's a PIO read, and stalls the processor for up to about
 902          * ~0.25 usec. The idea is that if we processed a port0 packet,
 903          * we blindly clear the  port 0 receive interrupt bits, and nothing
 904          * else, then return.  If other interrupts are pending, the chip
 905          * will re-interrupt us as soon as we write the intclear register.
 906          * We then won't process any more kernel packets (if not the 2nd
 907          * time, then the 3rd or 4th) and we'll then handle the other
 908          * interrupts.   We clear the interrupts first so that we don't
 909          * lose intr for later packets that arrive while we are processing.
 910          */
 911         oldhead = dd->ipath_port0head;
 912         curtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr);
 913         if (oldhead != curtail) {
 914                 if (dd->ipath_flags & IPATH_GPIO_INTR) {
 915                         ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
 916                                          (u64) (1 << IPATH_GPIO_PORT0_BIT));
 917                         istat = port0rbits | INFINIPATH_I_GPIO;
 918                 }
 919                 else
 920                         istat = port0rbits;
 921                 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
 922                 ipath_kreceive(dd);
 923                 if (oldhead != dd->ipath_port0head) {
 924                         ipath_stats.sps_fastrcvint++;
 925                         goto done;
 926                 }
 927         }
 928
 929         istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus);
 930
 931         if (unlikely(!istat)) {
 932                 ipath_stats.sps_nullintr++;
 933                 ret = IRQ_NONE; /* not our interrupt, or already handled */
 934                 goto bail;
 935         }
 936         if (unlikely(istat == -1)) {
 937                 ipath_bad_regread(dd);
 938                 /* don't know if it was our interrupt or not */
 939                 ret = IRQ_NONE;
 940                 goto bail;
 941         }
 942
 943         if (unexpected)
 944                 unexpected = 0;
 945
 946         if (unlikely(istat & ~dd->ipath_i_bitsextant))
 947                 ipath_dev_err(dd,
 948                               "interrupt with unknown interrupts %x set\n",
 949                               istat & (u32) ~ dd->ipath_i_bitsextant);
 950         else
 951                 ipath_cdbg(VERBOSE, "intr stat=0x%x\n", istat);
 952
 953         if (unlikely(istat & INFINIPATH_I_ERROR)) {
 954                 ipath_stats.sps_errints++;
 955                 estat = ipath_read_kreg64(dd,
 956                                           dd->ipath_kregs->kr_errorstatus);
 957                 if (!estat)
 958                         dev_info(&dd->pcidev->dev, "error interrupt (%x), "
 959                                  "but no error bits set!\n", istat);
 960                 else if (estat == -1LL)
 961                         /*
 962                          * should we try clearing all, or hope next read
 963                          * works?
 964                          */
 965                         ipath_dev_err(dd, "Read of error status failed "
 966                                       "(all bits set); ignoring\n");
 967                 else
 968                         if (handle_errors(dd, estat))
 969                                 /* force calling ipath_kreceive() */
 970                                 chk0rcv = 1;
 971         }
 972
 973         if (istat & INFINIPATH_I_GPIO) {
 974                 /*
 975                  * GPIO interrupts fall in two broad classes:
 976                  * GPIO_2 indicates (on some HT4xx boards) that a packet
 977                  *        has arrived for Port 0. Checking for this
 978                  *        is controlled by flag IPATH_GPIO_INTR.
 979                  * GPIO_3..5 on IBA6120 Rev2 chips indicate errors
 980                  *        that we need to count. Checking for this
 981                  *        is controlled by flag IPATH_GPIO_ERRINTRS.
 982                  */
 983                 u32 gpiostatus;
 984                 u32 to_clear = 0;
 985
 986                 gpiostatus = ipath_read_kreg32(
 987                         dd, dd->ipath_kregs->kr_gpio_status);
 988                 /* First the error-counter case.
 989                  */
 990                 if ((gpiostatus & IPATH_GPIO_ERRINTR_MASK) &&
 991                     (dd->ipath_flags & IPATH_GPIO_ERRINTRS)) {
 992                         /* want to clear the bits we see asserted. */
 993                         to_clear |= (gpiostatus & IPATH_GPIO_ERRINTR_MASK);
 994
 995                         /*
 996                          * Count appropriately, clear bits out of our copy,
 997                          * as they have been "handled".
 998                          */
 999                         if (gpiostatus & (1 << IPATH_GPIO_RXUVL_BIT)) {
1000                                 ipath_dbg("FlowCtl on UnsupVL\n");
1001                                 dd->ipath_rxfc_unsupvl_errs++;
1002                         }
1003                         if (gpiostatus & (1 << IPATH_GPIO_OVRUN_BIT)) {
1004                                 ipath_dbg("Overrun Threshold exceeded\n");
1005                                 dd->ipath_overrun_thresh_errs++;
1006                         }
1007                         if (gpiostatus & (1 << IPATH_GPIO_LLI_BIT)) {
1008                                 ipath_dbg("Local Link Integrity error\n");
1009                                 dd->ipath_lli_errs++;
1010                         }
1011                         gpiostatus &= ~IPATH_GPIO_ERRINTR_MASK;
1012                 }
1013                 /* Now the Port0 Receive case */
1014                 if ((gpiostatus & (1 << IPATH_GPIO_PORT0_BIT)) &&
1015                     (dd->ipath_flags & IPATH_GPIO_INTR)) {
1016                         /*
1017                          * GPIO status bit 2 is set, and we expected it.
1018                          * clear it and indicate in p0bits.
1019                          * This probably only happens if a Port0 pkt
1020                          * arrives at _just_ the wrong time, and we
1021                          * handle that by seting chk0rcv;
1022                          */
1023                         to_clear |= (1 << IPATH_GPIO_PORT0_BIT);
1024                         gpiostatus &= ~(1 << IPATH_GPIO_PORT0_BIT);
1025                         chk0rcv = 1;
1026                 }
1027                 if (unlikely(gpiostatus)) {
1028                         /*
1029                          * Some unexpected bits remain. If they could have
1030                          * caused the interrupt, complain and clear.
1031                          * MEA: this is almost certainly non-ideal.
1032                          * we should look into auto-disable of unexpected
1033                          * GPIO interrupts, possibly on a "three strikes"
1034                          * basis.
1035                          */
1036                         u32 mask;
1037                         mask = ipath_read_kreg32(
1038                                 dd, dd->ipath_kregs->kr_gpio_mask);
1039                         if (mask & gpiostatus) {
1040                                 ipath_dbg("Unexpected GPIO IRQ bits %x\n",
1041                                   gpiostatus & mask);
1042                                 to_clear |= (gpiostatus & mask);
1043                         }
1044                 }
1045                 if (to_clear) {
1046                         ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
1047                                         (u64) to_clear);
1048                 }
1049         }
1050         chk0rcv |= istat & port0rbits;
1051
1052         /*
1053          * Clear the interrupt bits we found set, unless they are receive
1054          * related, in which case we already cleared them above, and don't
1055          * want to clear them again, because we might lose an interrupt.
1056          * Clear it early, so we "know" know the chip will have seen this by
1057          * the time we process the queue, and will re-interrupt if necessary.
1058          * The processor itself won't take the interrupt again until we return.
1059          */
1060         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
1061
1062         /*
1063          * handle port0 receive  before checking for pio buffers available,
1064          * since receives can overflow; piobuf waiters can afford a few
1065          * extra cycles, since they were waiting anyway, and user's waiting
1066          * for receive are at the bottom.
1067          */
1068         if (chk0rcv) {
1069                 ipath_kreceive(dd);
1070                 istat &= ~port0rbits;
1071         }
1072
1073         if (istat & ((dd->ipath_i_rcvavail_mask <<
1074                       INFINIPATH_I_RCVAVAIL_SHIFT)
1075                      | (dd->ipath_i_rcvurg_mask <<
1076                         INFINIPATH_I_RCVURG_SHIFT)))
1077                 handle_urcv(dd, istat);
1078
1079         if (istat & INFINIPATH_I_SPIOBUFAVAIL) {
1080                 clear_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl);
1081                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1082                                  dd->ipath_sendctrl);
1083
1084                 if (dd->ipath_portpiowait)
1085                         handle_port_pioavail(dd);
1086
1087                 handle_layer_pioavail(dd);
1088         }
1089
1090 done:
1091         ret = IRQ_HANDLED;
1092
1093 bail:
1094         return ret;
1095 }