git.oblomov.eu Git - linux-2.6/blob - arch/sparc/kernel/irq_64.c

   1 /* irq.c: UltraSparc IRQ handling/init/registry.
   2  *
   3  * Copyright (C) 1997, 2007, 2008 David S. Miller (davem@davemloft.net)
   4  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
   5  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/sched.h>
  10 #include <linux/linkage.h>
  11 #include <linux/ptrace.h>
  12 #include <linux/errno.h>
  13 #include <linux/kernel_stat.h>
  14 #include <linux/signal.h>
  15 #include <linux/mm.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/slab.h>
  18 #include <linux/random.h>
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/proc_fs.h>
  22 #include <linux/seq_file.h>
  23 #include <linux/bootmem.h>
  24 #include <linux/irq.h>
  25
  26 #include <asm/ptrace.h>
  27 #include <asm/processor.h>
  28 #include <asm/atomic.h>
  29 #include <asm/system.h>
  30 #include <asm/irq.h>
  31 #include <asm/io.h>
  32 #include <asm/iommu.h>
  33 #include <asm/upa.h>
  34 #include <asm/oplib.h>
  35 #include <asm/prom.h>
  36 #include <asm/timer.h>
  37 #include <asm/smp.h>
  38 #include <asm/starfire.h>
  39 #include <asm/uaccess.h>
  40 #include <asm/cache.h>
  41 #include <asm/cpudata.h>
  42 #include <asm/auxio.h>
  43 #include <asm/head.h>
  44 #include <asm/hypervisor.h>
  45 #include <asm/cacheflush.h>
  46
  47 #include "entry.h"
  48
  49 #define NUM_IVECS       (IMAP_INR + 1)
  50
  51 struct ino_bucket *ivector_table;
  52 unsigned long ivector_table_pa;
  53
  54 /* On several sun4u processors, it is illegal to mix bypass and
  55  * non-bypass accesses.  Therefore we access all INO buckets
  56  * using bypass accesses only.
  57  */
  58 static unsigned long bucket_get_chain_pa(unsigned long bucket_pa)
  59 {
  60         unsigned long ret;
  61
  62         __asm__ __volatile__("ldxa      [%1] %2, %0"
  63                              : "=&r" (ret)
  64                              : "r" (bucket_pa +
  65                                     offsetof(struct ino_bucket,
  66                                              __irq_chain_pa)),
  67                                "i" (ASI_PHYS_USE_EC));
  68
  69         return ret;
  70 }
  71
  72 static void bucket_clear_chain_pa(unsigned long bucket_pa)
  73 {
  74         __asm__ __volatile__("stxa      %%g0, [%0] %1"
  75                              : /* no outputs */
  76                              : "r" (bucket_pa +
  77                                     offsetof(struct ino_bucket,
  78                                              __irq_chain_pa)),
  79                                "i" (ASI_PHYS_USE_EC));
  80 }
  81
  82 static unsigned int bucket_get_virt_irq(unsigned long bucket_pa)
  83 {
  84         unsigned int ret;
  85
  86         __asm__ __volatile__("lduwa     [%1] %2, %0"
  87                              : "=&r" (ret)
  88                              : "r" (bucket_pa +
  89                                     offsetof(struct ino_bucket,
  90                                              __virt_irq)),
  91                                "i" (ASI_PHYS_USE_EC));
  92
  93         return ret;
  94 }
  95
  96 static void bucket_set_virt_irq(unsigned long bucket_pa,
  97                                 unsigned int virt_irq)
  98 {
  99         __asm__ __volatile__("stwa      %0, [%1] %2"
 100                              : /* no outputs */
 101                              : "r" (virt_irq),
 102                                "r" (bucket_pa +
 103                                     offsetof(struct ino_bucket,
 104                                              __virt_irq)),
 105                                "i" (ASI_PHYS_USE_EC));
 106 }
 107
 108 #define irq_work_pa(__cpu)      &(trap_block[(__cpu)].irq_worklist_pa)
 109
 110 static struct {
 111         unsigned int dev_handle;
 112         unsigned int dev_ino;
 113         unsigned int in_use;
 114 } virt_irq_table[NR_IRQS];
 115 static DEFINE_SPINLOCK(virt_irq_alloc_lock);
 116
 117 unsigned char virt_irq_alloc(unsigned int dev_handle,
 118                              unsigned int dev_ino)
 119 {
 120         unsigned long flags;
 121         unsigned char ent;
 122
 123         BUILD_BUG_ON(NR_IRQS >= 256);
 124
 125         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
 126
 127         for (ent = 1; ent < NR_IRQS; ent++) {
 128                 if (!virt_irq_table[ent].in_use)
 129                         break;
 130         }
 131         if (ent >= NR_IRQS) {
 132                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
 133                 ent = 0;
 134         } else {
 135                 virt_irq_table[ent].dev_handle = dev_handle;
 136                 virt_irq_table[ent].dev_ino = dev_ino;
 137                 virt_irq_table[ent].in_use = 1;
 138         }
 139
 140         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
 141
 142         return ent;
 143 }
 144
 145 #ifdef CONFIG_PCI_MSI
 146 void virt_irq_free(unsigned int virt_irq)
 147 {
 148         unsigned long flags;
 149
 150         if (virt_irq >= NR_IRQS)
 151                 return;
 152
 153         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
 154
 155         virt_irq_table[virt_irq].in_use = 0;
 156
 157         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
 158 }
 159 #endif
 160
 161 /*
 162  * /proc/interrupts printing:
 163  */
 164
 165 int show_interrupts(struct seq_file *p, void *v)
 166 {
 167         int i = *(loff_t *) v, j;
 168         struct irqaction * action;
 169         unsigned long flags;
 170
 171         if (i == 0) {
 172                 seq_printf(p, "           ");
 173                 for_each_online_cpu(j)
 174                         seq_printf(p, "CPU%d       ",j);
 175                 seq_putc(p, '\n');
 176         }
 177
 178         if (i < NR_IRQS) {
 179                 spin_lock_irqsave(&irq_desc[i].lock, flags);
 180                 action = irq_desc[i].action;
 181                 if (!action)
 182                         goto skip;
 183                 seq_printf(p, "%3d: ",i);
 184 #ifndef CONFIG_SMP
 185                 seq_printf(p, "%10u ", kstat_irqs(i));
 186 #else
 187                 for_each_online_cpu(j)
 188                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 189 #endif
 190                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
 191                 seq_printf(p, "  %s", action->name);
 192
 193                 for (action=action->next; action; action = action->next)
 194                         seq_printf(p, ", %s", action->name);
 195
 196                 seq_putc(p, '\n');
 197 skip:
 198                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
 199         } else if (i == NR_IRQS) {
 200                 seq_printf(p, "NMI: ");
 201                 for_each_online_cpu(j)
 202                         seq_printf(p, "%10u ", cpu_data(j).__nmi_count);
 203                 seq_printf(p, "     Non-maskable interrupts\n");
 204         }
 205         return 0;
 206 }
 207
 208 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
 209 {
 210         unsigned int tid;
 211
 212         if (this_is_starfire) {
 213                 tid = starfire_translate(imap, cpuid);
 214                 tid <<= IMAP_TID_SHIFT;
 215                 tid &= IMAP_TID_UPA;
 216         } else {
 217                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
 218                         unsigned long ver;
 219
 220                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 221                         if ((ver >> 32UL) == __JALAPENO_ID ||
 222                             (ver >> 32UL) == __SERRANO_ID) {
 223                                 tid = cpuid << IMAP_TID_SHIFT;
 224                                 tid &= IMAP_TID_JBUS;
 225                         } else {
 226                                 unsigned int a = cpuid & 0x1f;
 227                                 unsigned int n = (cpuid >> 5) & 0x1f;
 228
 229                                 tid = ((a << IMAP_AID_SHIFT) |
 230                                        (n << IMAP_NID_SHIFT));
 231                                 tid &= (IMAP_AID_SAFARI |
 232                                         IMAP_NID_SAFARI);;
 233                         }
 234                 } else {
 235                         tid = cpuid << IMAP_TID_SHIFT;
 236                         tid &= IMAP_TID_UPA;
 237                 }
 238         }
 239
 240         return tid;
 241 }
 242
 243 struct irq_handler_data {
 244         unsigned long   iclr;
 245         unsigned long   imap;
 246
 247         void            (*pre_handler)(unsigned int, void *, void *);
 248         void            *arg1;
 249         void            *arg2;
 250 };
 251
 252 #ifdef CONFIG_SMP
 253 static int irq_choose_cpu(unsigned int virt_irq)
 254 {
 255         cpumask_t mask = irq_desc[virt_irq].affinity;
 256         int cpuid;
 257
 258         if (cpus_equal(mask, CPU_MASK_ALL)) {
 259                 static int irq_rover;
 260                 static DEFINE_SPINLOCK(irq_rover_lock);
 261                 unsigned long flags;
 262
 263                 /* Round-robin distribution... */
 264         do_round_robin:
 265                 spin_lock_irqsave(&irq_rover_lock, flags);
 266
 267                 while (!cpu_online(irq_rover)) {
 268                         if (++irq_rover >= NR_CPUS)
 269                                 irq_rover = 0;
 270                 }
 271                 cpuid = irq_rover;
 272                 do {
 273                         if (++irq_rover >= NR_CPUS)
 274                                 irq_rover = 0;
 275                 } while (!cpu_online(irq_rover));
 276
 277                 spin_unlock_irqrestore(&irq_rover_lock, flags);
 278         } else {
 279                 cpumask_t tmp;
 280
 281                 cpus_and(tmp, cpu_online_map, mask);
 282
 283                 if (cpus_empty(tmp))
 284                         goto do_round_robin;
 285
 286                 cpuid = first_cpu(tmp);
 287         }
 288
 289         return cpuid;
 290 }
 291 #else
 292 static int irq_choose_cpu(unsigned int virt_irq)
 293 {
 294         return real_hard_smp_processor_id();
 295 }
 296 #endif
 297
 298 static void sun4u_irq_enable(unsigned int virt_irq)
 299 {
 300         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 301
 302         if (likely(data)) {
 303                 unsigned long cpuid, imap, val;
 304                 unsigned int tid;
 305
 306                 cpuid = irq_choose_cpu(virt_irq);
 307                 imap = data->imap;
 308
 309                 tid = sun4u_compute_tid(imap, cpuid);
 310
 311                 val = upa_readq(imap);
 312                 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
 313                          IMAP_AID_SAFARI | IMAP_NID_SAFARI);
 314                 val |= tid | IMAP_VALID;
 315                 upa_writeq(val, imap);
 316                 upa_writeq(ICLR_IDLE, data->iclr);
 317         }
 318 }
 319
 320 static void sun4u_set_affinity(unsigned int virt_irq,
 321                                const struct cpumask *mask)
 322 {
 323         sun4u_irq_enable(virt_irq);
 324 }
 325
 326 /* Don't do anything.  The desc->status check for IRQ_DISABLED in
 327  * handler_irq() will skip the handler call and that will leave the
 328  * interrupt in the sent state.  The next ->enable() call will hit the
 329  * ICLR register to reset the state machine.
 330  *
 331  * This scheme is necessary, instead of clearing the Valid bit in the
 332  * IMAP register, to handle the case of IMAP registers being shared by
 333  * multiple INOs (and thus ICLR registers).  Since we use a different
 334  * virtual IRQ for each shared IMAP instance, the generic code thinks
 335  * there is only one user so it prematurely calls ->disable() on
 336  * free_irq().
 337  *
 338  * We have to provide an explicit ->disable() method instead of using
 339  * NULL to get the default.  The reason is that if the generic code
 340  * sees that, it also hooks up a default ->shutdown method which
 341  * invokes ->mask() which we do not want.  See irq_chip_set_defaults().
 342  */
 343 static void sun4u_irq_disable(unsigned int virt_irq)
 344 {
 345 }
 346
 347 static void sun4u_irq_eoi(unsigned int virt_irq)
 348 {
 349         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 350         struct irq_desc *desc = irq_desc + virt_irq;
 351
 352         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 353                 return;
 354
 355         if (likely(data))
 356                 upa_writeq(ICLR_IDLE, data->iclr);
 357 }
 358
 359 static void sun4v_irq_enable(unsigned int virt_irq)
 360 {
 361         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 362         unsigned long cpuid = irq_choose_cpu(virt_irq);
 363         int err;
 364
 365         err = sun4v_intr_settarget(ino, cpuid);
 366         if (err != HV_EOK)
 367                 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 368                        "err(%d)\n", ino, cpuid, err);
 369         err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 370         if (err != HV_EOK)
 371                 printk(KERN_ERR "sun4v_intr_setstate(%x): "
 372                        "err(%d)\n", ino, err);
 373         err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 374         if (err != HV_EOK)
 375                 printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
 376                        ino, err);
 377 }
 378
 379 static void sun4v_set_affinity(unsigned int virt_irq,
 380                                const struct cpumask *mask)
 381 {
 382         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 383         unsigned long cpuid = irq_choose_cpu(virt_irq);
 384         int err;
 385
 386         err = sun4v_intr_settarget(ino, cpuid);
 387         if (err != HV_EOK)
 388                 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 389                        "err(%d)\n", ino, cpuid, err);
 390 }
 391
 392 static void sun4v_irq_disable(unsigned int virt_irq)
 393 {
 394         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 395         int err;
 396
 397         err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
 398         if (err != HV_EOK)
 399                 printk(KERN_ERR "sun4v_intr_setenabled(%x): "
 400                        "err(%d)\n", ino, err);
 401 }
 402
 403 static void sun4v_irq_eoi(unsigned int virt_irq)
 404 {
 405         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 406         struct irq_desc *desc = irq_desc + virt_irq;
 407         int err;
 408
 409         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 410                 return;
 411
 412         err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 413         if (err != HV_EOK)
 414                 printk(KERN_ERR "sun4v_intr_setstate(%x): "
 415                        "err(%d)\n", ino, err);
 416 }
 417
 418 static void sun4v_virq_enable(unsigned int virt_irq)
 419 {
 420         unsigned long cpuid, dev_handle, dev_ino;
 421         int err;
 422
 423         cpuid = irq_choose_cpu(virt_irq);
 424
 425         dev_handle = virt_irq_table[virt_irq].dev_handle;
 426         dev_ino = virt_irq_table[virt_irq].dev_ino;
 427
 428         err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 429         if (err != HV_EOK)
 430                 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 431                        "err(%d)\n",
 432                        dev_handle, dev_ino, cpuid, err);
 433         err = sun4v_vintr_set_state(dev_handle, dev_ino,
 434                                     HV_INTR_STATE_IDLE);
 435         if (err != HV_EOK)
 436                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 437                        "HV_INTR_STATE_IDLE): err(%d)\n",
 438                        dev_handle, dev_ino, err);
 439         err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 440                                     HV_INTR_ENABLED);
 441         if (err != HV_EOK)
 442                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 443                        "HV_INTR_ENABLED): err(%d)\n",
 444                        dev_handle, dev_ino, err);
 445 }
 446
 447 static void sun4v_virt_set_affinity(unsigned int virt_irq,
 448                                     const struct cpumask *mask)
 449 {
 450         unsigned long cpuid, dev_handle, dev_ino;
 451         int err;
 452
 453         cpuid = irq_choose_cpu(virt_irq);
 454
 455         dev_handle = virt_irq_table[virt_irq].dev_handle;
 456         dev_ino = virt_irq_table[virt_irq].dev_ino;
 457
 458         err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 459         if (err != HV_EOK)
 460                 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 461                        "err(%d)\n",
 462                        dev_handle, dev_ino, cpuid, err);
 463 }
 464
 465 static void sun4v_virq_disable(unsigned int virt_irq)
 466 {
 467         unsigned long dev_handle, dev_ino;
 468         int err;
 469
 470         dev_handle = virt_irq_table[virt_irq].dev_handle;
 471         dev_ino = virt_irq_table[virt_irq].dev_ino;
 472
 473         err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 474                                     HV_INTR_DISABLED);
 475         if (err != HV_EOK)
 476                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 477                        "HV_INTR_DISABLED): err(%d)\n",
 478                        dev_handle, dev_ino, err);
 479 }
 480
 481 static void sun4v_virq_eoi(unsigned int virt_irq)
 482 {
 483         struct irq_desc *desc = irq_desc + virt_irq;
 484         unsigned long dev_handle, dev_ino;
 485         int err;
 486
 487         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 488                 return;
 489
 490         dev_handle = virt_irq_table[virt_irq].dev_handle;
 491         dev_ino = virt_irq_table[virt_irq].dev_ino;
 492
 493         err = sun4v_vintr_set_state(dev_handle, dev_ino,
 494                                     HV_INTR_STATE_IDLE);
 495         if (err != HV_EOK)
 496                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 497                        "HV_INTR_STATE_IDLE): err(%d)\n",
 498                        dev_handle, dev_ino, err);
 499 }
 500
 501 static struct irq_chip sun4u_irq = {
 502         .typename       = "sun4u",
 503         .enable         = sun4u_irq_enable,
 504         .disable        = sun4u_irq_disable,
 505         .eoi            = sun4u_irq_eoi,
 506         .set_affinity   = sun4u_set_affinity,
 507 };
 508
 509 static struct irq_chip sun4v_irq = {
 510         .typename       = "sun4v",
 511         .enable         = sun4v_irq_enable,
 512         .disable        = sun4v_irq_disable,
 513         .eoi            = sun4v_irq_eoi,
 514         .set_affinity   = sun4v_set_affinity,
 515 };
 516
 517 static struct irq_chip sun4v_virq = {
 518         .typename       = "vsun4v",
 519         .enable         = sun4v_virq_enable,
 520         .disable        = sun4v_virq_disable,
 521         .eoi            = sun4v_virq_eoi,
 522         .set_affinity   = sun4v_virt_set_affinity,
 523 };
 524
 525 static void pre_flow_handler(unsigned int virt_irq,
 526                                       struct irq_desc *desc)
 527 {
 528         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 529         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 530
 531         data->pre_handler(ino, data->arg1, data->arg2);
 532
 533         handle_fasteoi_irq(virt_irq, desc);
 534 }
 535
 536 void irq_install_pre_handler(int virt_irq,
 537                              void (*func)(unsigned int, void *, void *),
 538                              void *arg1, void *arg2)
 539 {
 540         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 541         struct irq_desc *desc = irq_desc + virt_irq;
 542
 543         data->pre_handler = func;
 544         data->arg1 = arg1;
 545         data->arg2 = arg2;
 546
 547         desc->handle_irq = pre_flow_handler;
 548 }
 549
 550 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
 551 {
 552         struct ino_bucket *bucket;
 553         struct irq_handler_data *data;
 554         unsigned int virt_irq;
 555         int ino;
 556
 557         BUG_ON(tlb_type == hypervisor);
 558
 559         ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
 560         bucket = &ivector_table[ino];
 561         virt_irq = bucket_get_virt_irq(__pa(bucket));
 562         if (!virt_irq) {
 563                 virt_irq = virt_irq_alloc(0, ino);
 564                 bucket_set_virt_irq(__pa(bucket), virt_irq);
 565                 set_irq_chip_and_handler_name(virt_irq,
 566                                               &sun4u_irq,
 567                                               handle_fasteoi_irq,
 568                                               "IVEC");
 569         }
 570
 571         data = get_irq_chip_data(virt_irq);
 572         if (unlikely(data))
 573                 goto out;
 574
 575         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 576         if (unlikely(!data)) {
 577                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 578                 prom_halt();
 579         }
 580         set_irq_chip_data(virt_irq, data);
 581
 582         data->imap  = imap;
 583         data->iclr  = iclr;
 584
 585 out:
 586         return virt_irq;
 587 }
 588
 589 static unsigned int sun4v_build_common(unsigned long sysino,
 590                                        struct irq_chip *chip)
 591 {
 592         struct ino_bucket *bucket;
 593         struct irq_handler_data *data;
 594         unsigned int virt_irq;
 595
 596         BUG_ON(tlb_type != hypervisor);
 597
 598         bucket = &ivector_table[sysino];
 599         virt_irq = bucket_get_virt_irq(__pa(bucket));
 600         if (!virt_irq) {
 601                 virt_irq = virt_irq_alloc(0, sysino);
 602                 bucket_set_virt_irq(__pa(bucket), virt_irq);
 603                 set_irq_chip_and_handler_name(virt_irq, chip,
 604                                               handle_fasteoi_irq,
 605                                               "IVEC");
 606         }
 607
 608         data = get_irq_chip_data(virt_irq);
 609         if (unlikely(data))
 610                 goto out;
 611
 612         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 613         if (unlikely(!data)) {
 614                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 615                 prom_halt();
 616         }
 617         set_irq_chip_data(virt_irq, data);
 618
 619         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 620          * is done by hypervisor calls on sun4v platforms, not by direct
 621          * register accesses.
 622          */
 623         data->imap = ~0UL;
 624         data->iclr = ~0UL;
 625
 626 out:
 627         return virt_irq;
 628 }
 629
 630 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
 631 {
 632         unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
 633
 634         return sun4v_build_common(sysino, &sun4v_irq);
 635 }
 636
 637 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
 638 {
 639         struct irq_handler_data *data;
 640         unsigned long hv_err, cookie;
 641         struct ino_bucket *bucket;
 642         struct irq_desc *desc;
 643         unsigned int virt_irq;
 644
 645         bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC);
 646         if (unlikely(!bucket))
 647                 return 0;
 648         __flush_dcache_range((unsigned long) bucket,
 649                              ((unsigned long) bucket +
 650                               sizeof(struct ino_bucket)));
 651
 652         virt_irq = virt_irq_alloc(devhandle, devino);
 653         bucket_set_virt_irq(__pa(bucket), virt_irq);
 654
 655         set_irq_chip_and_handler_name(virt_irq, &sun4v_virq,
 656                                       handle_fasteoi_irq,
 657                                       "IVEC");
 658
 659         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 660         if (unlikely(!data))
 661                 return 0;
 662
 663         /* In order to make the LDC channel startup sequence easier,
 664          * especially wrt. locking, we do not let request_irq() enable
 665          * the interrupt.
 666          */
 667         desc = irq_desc + virt_irq;
 668         desc->status |= IRQ_NOAUTOEN;
 669
 670         set_irq_chip_data(virt_irq, data);
 671
 672         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 673          * is done by hypervisor calls on sun4v platforms, not by direct
 674          * register accesses.
 675          */
 676         data->imap = ~0UL;
 677         data->iclr = ~0UL;
 678
 679         cookie = ~__pa(bucket);
 680         hv_err = sun4v_vintr_set_cookie(devhandle, devino, cookie);
 681         if (hv_err) {
 682                 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
 683                             "err=%lu\n", devhandle, devino, hv_err);
 684                 prom_halt();
 685         }
 686
 687         return virt_irq;
 688 }
 689
 690 void ack_bad_irq(unsigned int virt_irq)
 691 {
 692         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 693
 694         if (!ino)
 695                 ino = 0xdeadbeef;
 696
 697         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
 698                ino, virt_irq);
 699 }
 700
 701 void *hardirq_stack[NR_CPUS];
 702 void *softirq_stack[NR_CPUS];
 703
 704 static __attribute__((always_inline)) void *set_hardirq_stack(void)
 705 {
 706         void *orig_sp, *sp = hardirq_stack[smp_processor_id()];
 707
 708         __asm__ __volatile__("mov %%sp, %0" : "=r" (orig_sp));
 709         if (orig_sp < sp ||
 710             orig_sp > (sp + THREAD_SIZE)) {
 711                 sp += THREAD_SIZE - 192 - STACK_BIAS;
 712                 __asm__ __volatile__("mov %0, %%sp" : : "r" (sp));
 713         }
 714
 715         return orig_sp;
 716 }
 717 static __attribute__((always_inline)) void restore_hardirq_stack(void *orig_sp)
 718 {
 719         __asm__ __volatile__("mov %0, %%sp" : : "r" (orig_sp));
 720 }
 721
 722 void handler_irq(int irq, struct pt_regs *regs)
 723 {
 724         unsigned long pstate, bucket_pa;
 725         struct pt_regs *old_regs;
 726         void *orig_sp;
 727
 728         clear_softint(1 << irq);
 729
 730         old_regs = set_irq_regs(regs);
 731         irq_enter();
 732
 733         /* Grab an atomic snapshot of the pending IVECs.  */
 734         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 735                              "wrpr      %0, %3, %%pstate\n\t"
 736                              "ldx       [%2], %1\n\t"
 737                              "stx       %%g0, [%2]\n\t"
 738                              "wrpr      %0, 0x0, %%pstate\n\t"
 739                              : "=&r" (pstate), "=&r" (bucket_pa)
 740                              : "r" (irq_work_pa(smp_processor_id())),
 741                                "i" (PSTATE_IE)
 742                              : "memory");
 743
 744         orig_sp = set_hardirq_stack();
 745
 746         while (bucket_pa) {
 747                 struct irq_desc *desc;
 748                 unsigned long next_pa;
 749                 unsigned int virt_irq;
 750
 751                 next_pa = bucket_get_chain_pa(bucket_pa);
 752                 virt_irq = bucket_get_virt_irq(bucket_pa);
 753                 bucket_clear_chain_pa(bucket_pa);
 754
 755                 desc = irq_desc + virt_irq;
 756
 757                 if (!(desc->status & IRQ_DISABLED))
 758                         desc->handle_irq(virt_irq, desc);
 759
 760                 bucket_pa = next_pa;
 761         }
 762
 763         restore_hardirq_stack(orig_sp);
 764
 765         irq_exit();
 766         set_irq_regs(old_regs);
 767 }
 768
 769 void do_softirq(void)
 770 {
 771         unsigned long flags;
 772
 773         if (in_interrupt())
 774                 return;
 775
 776         local_irq_save(flags);
 777
 778         if (local_softirq_pending()) {
 779                 void *orig_sp, *sp = softirq_stack[smp_processor_id()];
 780
 781                 sp += THREAD_SIZE - 192 - STACK_BIAS;
 782
 783                 __asm__ __volatile__("mov %%sp, %0\n\t"
 784                                      "mov %1, %%sp"
 785                                      : "=&r" (orig_sp)
 786                                      : "r" (sp));
 787                 __do_softirq();
 788                 __asm__ __volatile__("mov %0, %%sp"
 789                                      : : "r" (orig_sp));
 790         }
 791
 792         local_irq_restore(flags);
 793 }
 794
 795 #ifdef CONFIG_HOTPLUG_CPU
 796 void fixup_irqs(void)
 797 {
 798         unsigned int irq;
 799
 800         for (irq = 0; irq < NR_IRQS; irq++) {
 801                 unsigned long flags;
 802
 803                 spin_lock_irqsave(&irq_desc[irq].lock, flags);
 804                 if (irq_desc[irq].action &&
 805                     !(irq_desc[irq].status & IRQ_PER_CPU)) {
 806                         if (irq_desc[irq].chip->set_affinity)
 807                                 irq_desc[irq].chip->set_affinity(irq,
 808                                         &irq_desc[irq].affinity);
 809                 }
 810                 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
 811         }
 812
 813         tick_ops->disable_irq();
 814 }
 815 #endif
 816
 817 struct sun5_timer {
 818         u64     count0;
 819         u64     limit0;
 820         u64     count1;
 821         u64     limit1;
 822 };
 823
 824 static struct sun5_timer *prom_timers;
 825 static u64 prom_limit0, prom_limit1;
 826
 827 static void map_prom_timers(void)
 828 {
 829         struct device_node *dp;
 830         const unsigned int *addr;
 831
 832         /* PROM timer node hangs out in the top level of device siblings... */
 833         dp = of_find_node_by_path("/");
 834         dp = dp->child;
 835         while (dp) {
 836                 if (!strcmp(dp->name, "counter-timer"))
 837                         break;
 838                 dp = dp->sibling;
 839         }
 840
 841         /* Assume if node is not present, PROM uses different tick mechanism
 842          * which we should not care about.
 843          */
 844         if (!dp) {
 845                 prom_timers = (struct sun5_timer *) 0;
 846                 return;
 847         }
 848
 849         /* If PROM is really using this, it must be mapped by him. */
 850         addr = of_get_property(dp, "address", NULL);
 851         if (!addr) {
 852                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
 853                 prom_timers = (struct sun5_timer *) 0;
 854                 return;
 855         }
 856         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
 857 }
 858
 859 static void kill_prom_timer(void)
 860 {
 861         if (!prom_timers)
 862                 return;
 863
 864         /* Save them away for later. */
 865         prom_limit0 = prom_timers->limit0;
 866         prom_limit1 = prom_timers->limit1;
 867
 868         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
 869          * We turn both off here just to be paranoid.
 870          */
 871         prom_timers->limit0 = 0;
 872         prom_timers->limit1 = 0;
 873
 874         /* Wheee, eat the interrupt packet too... */
 875         __asm__ __volatile__(
 876 "       mov     0x40, %%g2\n"
 877 "       ldxa    [%%g0] %0, %%g1\n"
 878 "       ldxa    [%%g2] %1, %%g1\n"
 879 "       stxa    %%g0, [%%g0] %0\n"
 880 "       membar  #Sync\n"
 881         : /* no outputs */
 882         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
 883         : "g1", "g2");
 884 }
 885
 886 void notrace init_irqwork_curcpu(void)
 887 {
 888         int cpu = hard_smp_processor_id();
 889
 890         trap_block[cpu].irq_worklist_pa = 0UL;
 891 }
 892
 893 /* Please be very careful with register_one_mondo() and
 894  * sun4v_register_mondo_queues().
 895  *
 896  * On SMP this gets invoked from the CPU trampoline before
 897  * the cpu has fully taken over the trap table from OBP,
 898  * and it's kernel stack + %g6 thread register state is
 899  * not fully cooked yet.
 900  *
 901  * Therefore you cannot make any OBP calls, not even prom_printf,
 902  * from these two routines.
 903  */
 904 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
 905 {
 906         unsigned long num_entries = (qmask + 1) / 64;
 907         unsigned long status;
 908
 909         status = sun4v_cpu_qconf(type, paddr, num_entries);
 910         if (status != HV_EOK) {
 911                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
 912                             "err %lu\n", type, paddr, num_entries, status);
 913                 prom_halt();
 914         }
 915 }
 916
 917 void __cpuinit notrace sun4v_register_mondo_queues(int this_cpu)
 918 {
 919         struct trap_per_cpu *tb = &trap_block[this_cpu];
 920
 921         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
 922                            tb->cpu_mondo_qmask);
 923         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
 924                            tb->dev_mondo_qmask);
 925         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
 926                            tb->resum_qmask);
 927         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
 928                            tb->nonresum_qmask);
 929 }
 930
 931 static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask)
 932 {
 933         unsigned long size = PAGE_ALIGN(qmask + 1);
 934         void *p = __alloc_bootmem(size, size, 0);
 935         if (!p) {
 936                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
 937                 prom_halt();
 938         }
 939
 940         *pa_ptr = __pa(p);
 941 }
 942
 943 static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
 944 {
 945         unsigned long size = PAGE_ALIGN(qmask + 1);
 946         void *p = __alloc_bootmem(size, size, 0);
 947
 948         if (!p) {
 949                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
 950                 prom_halt();
 951         }
 952
 953         *pa_ptr = __pa(p);
 954 }
 955
 956 static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
 957 {
 958 #ifdef CONFIG_SMP
 959         void *page;
 960
 961         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
 962
 963         page = alloc_bootmem_pages(PAGE_SIZE);
 964         if (!page) {
 965                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
 966                 prom_halt();
 967         }
 968
 969         tb->cpu_mondo_block_pa = __pa(page);
 970         tb->cpu_list_pa = __pa(page + 64);
 971 #endif
 972 }
 973
 974 /* Allocate mondo and error queues for all possible cpus.  */
 975 static void __init sun4v_init_mondo_queues(void)
 976 {
 977         int cpu;
 978
 979         for_each_possible_cpu(cpu) {
 980                 struct trap_per_cpu *tb = &trap_block[cpu];
 981
 982                 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
 983                 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
 984                 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask);
 985                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask);
 986                 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
 987                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa,
 988                                tb->nonresum_qmask);
 989         }
 990 }
 991
 992 static void __init init_send_mondo_info(void)
 993 {
 994         int cpu;
 995
 996         for_each_possible_cpu(cpu) {
 997                 struct trap_per_cpu *tb = &trap_block[cpu];
 998
 999                 init_cpu_send_mondo_info(tb);
1000         }
1001 }
1002
1003 static struct irqaction timer_irq_action = {
1004         .name = "timer",
1005 };
1006
1007 /* Only invoked on boot processor. */
1008 void __init init_IRQ(void)
1009 {
1010         unsigned long size;
1011
1012         map_prom_timers();
1013         kill_prom_timer();
1014
1015         size = sizeof(struct ino_bucket) * NUM_IVECS;
1016         ivector_table = alloc_bootmem(size);
1017         if (!ivector_table) {
1018                 prom_printf("Fatal error, cannot allocate ivector_table\n");
1019                 prom_halt();
1020         }
1021         __flush_dcache_range((unsigned long) ivector_table,
1022                              ((unsigned long) ivector_table) + size);
1023
1024         ivector_table_pa = __pa(ivector_table);
1025
1026         if (tlb_type == hypervisor)
1027                 sun4v_init_mondo_queues();
1028
1029         init_send_mondo_info();
1030
1031         if (tlb_type == hypervisor) {
1032                 /* Load up the boot cpu's entries.  */
1033                 sun4v_register_mondo_queues(hard_smp_processor_id());
1034         }
1035
1036         /* We need to clear any IRQ's pending in the soft interrupt
1037          * registers, a spurious one could be left around from the
1038          * PROM timer which we just disabled.
1039          */
1040         clear_softint(get_softint());
1041
1042         /* Now that ivector table is initialized, it is safe
1043          * to receive IRQ vector traps.  We will normally take
1044          * one or two right now, in case some device PROM used
1045          * to boot us wants to speak to us.  We just ignore them.
1046          */
1047         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
1048                              "or        %%g1, %0, %%g1\n\t"
1049                              "wrpr      %%g1, 0x0, %%pstate"
1050                              : /* No outputs */
1051                              : "i" (PSTATE_IE)
1052                              : "g1");
1053
1054         irq_desc[0].action = &timer_irq_action;
1055 }