1 #include <linux/sched.h>
2 #include <linux/clocksource.h>
3 #include <linux/workqueue.h>
4 #include <linux/delay.h>
5 #include <linux/cpufreq.h>
6 #include <linux/jiffies.h>
7 #include <linux/init.h>
9 #include <linux/percpu.h>
11 #include <asm/delay.h>
14 #include <asm/timer.h>
16 #include "mach_timer.h"
18 /* native_sched_clock() is called before tsc_init(), so
19 we must start with the TSC soft disabled to prevent
20 erroneous rdtsc usage on !cpu_has_tsc processors */
21 static int tsc_disabled = -1;
24 * On some systems the TSC frequency does not
25 * change with the cpu frequency. So we need
26 * an extra value to store the TSC freq
29 EXPORT_SYMBOL_GPL(tsc_khz);
32 static int __init tsc_setup(char *str)
34 printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
35 "cannot disable TSC completely.\n");
41 * disable flag for tsc. Takes effect by clearing the TSC cpu flag
44 static int __init tsc_setup(char *str)
46 setup_clear_cpu_cap(X86_FEATURE_TSC);
51 __setup("notsc", tsc_setup);
54 * code to mark and check if the TSC is unstable
55 * due to cpufreq or due to unsynced TSCs
57 static int tsc_unstable;
59 int check_tsc_unstable(void)
63 EXPORT_SYMBOL_GPL(check_tsc_unstable);
65 /* Accelerators for sched_clock()
66 * convert from cycles(64bits) => nanoseconds (64bits)
68 * ns = cycles / (freq / ns_per_sec)
69 * ns = cycles * (ns_per_sec / freq)
70 * ns = cycles * (10^9 / (cpu_khz * 10^3))
71 * ns = cycles * (10^6 / cpu_khz)
73 * Then we use scaling math (suggested by george@mvista.com) to get:
74 * ns = cycles * (10^6 * SC / cpu_khz) / SC
75 * ns = cycles * cyc2ns_scale / SC
77 * And since SC is a constant power of two, we can convert the div
80 * We can use khz divisor instead of mhz to keep a better precision, since
81 * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
82 * (mathieu.desnoyers@polymtl.ca)
84 * -johnstul@us.ibm.com "math is hard, lets go shopping!"
87 DEFINE_PER_CPU(unsigned long, cyc2ns);
89 static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
91 unsigned long long tsc_now, ns_now;
92 unsigned long flags, *scale;
94 local_irq_save(flags);
95 sched_clock_idle_sleep_event();
97 scale = &per_cpu(cyc2ns, cpu);
100 ns_now = __cycles_2_ns(tsc_now);
103 *scale = (NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR)/cpu_khz;
106 * Start smoothly with the new frequency:
108 sched_clock_idle_wakeup_event(0);
109 local_irq_restore(flags);
113 * Scheduler clock - returns current time in nanosec units.
115 unsigned long long native_sched_clock(void)
117 unsigned long long this_offset;
120 * Fall back to jiffies if there's no TSC available:
121 * ( But note that we still use it if the TSC is marked
122 * unstable. We do this because unlike Time Of Day,
123 * the scheduler clock tolerates small errors and it's
124 * very important for it to be as fast as the platform
127 if (unlikely(tsc_disabled))
128 /* No locking but a rare wrong value is not a big deal: */
129 return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
131 /* read the Time Stamp Counter: */
132 rdtscll(this_offset);
134 /* return the value in ns */
135 return cycles_2_ns(this_offset);
138 /* We need to define a real function for sched_clock, to override the
139 weak default version */
140 #ifdef CONFIG_PARAVIRT
141 unsigned long long sched_clock(void)
143 return paravirt_sched_clock();
146 unsigned long long sched_clock(void)
147 __attribute__((alias("native_sched_clock")));
150 unsigned long native_calculate_cpu_khz(void)
152 unsigned long long start, end;
154 u64 delta64 = (u64)ULLONG_MAX;
158 local_irq_save(flags);
160 /* run 3 times to ensure the cache is warm and to get an accurate reading */
161 for (i = 0; i < 3; i++) {
162 mach_prepare_counter();
164 mach_countup(&count);
168 * Error: ECTCNEVERSET
169 * The CTC wasn't reliable: we got a hit on the very first read,
170 * or the CPU was so fast/slow that the quotient wouldn't fit in
176 /* cpu freq too slow: */
177 if ((end - start) <= CALIBRATE_TIME_MSEC)
181 * We want the minimum time of all runs in case one of them
182 * is inaccurate due to SMI or other delay
184 delta64 = min(delta64, (end - start));
187 /* cpu freq too fast (or every run was bad): */
188 if (delta64 > (1ULL<<32))
191 delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
192 do_div(delta64,CALIBRATE_TIME_MSEC);
194 local_irq_restore(flags);
195 return (unsigned long)delta64;
197 local_irq_restore(flags);
201 int recalibrate_cpu_khz(void)
204 unsigned long cpu_khz_old = cpu_khz;
207 cpu_khz = calculate_cpu_khz();
209 cpu_data(0).loops_per_jiffy =
210 cpufreq_scale(cpu_data(0).loops_per_jiffy,
211 cpu_khz_old, cpu_khz);
220 EXPORT_SYMBOL(recalibrate_cpu_khz);
222 #ifdef CONFIG_CPU_FREQ
225 * if the CPU frequency is scaled, TSC-based delays will need a different
226 * loops_per_jiffy value to function properly.
228 static unsigned int ref_freq;
229 static unsigned long loops_per_jiffy_ref;
230 static unsigned long cpu_khz_ref;
233 time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
235 struct cpufreq_freqs *freq = data;
239 ref_freq = freq->new;
242 ref_freq = freq->old;
243 loops_per_jiffy_ref = cpu_data(freq->cpu).loops_per_jiffy;
244 cpu_khz_ref = cpu_khz;
247 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
248 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
249 (val == CPUFREQ_RESUMECHANGE)) {
250 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
251 cpu_data(freq->cpu).loops_per_jiffy =
252 cpufreq_scale(loops_per_jiffy_ref,
253 ref_freq, freq->new);
257 if (num_online_cpus() == 1)
258 cpu_khz = cpufreq_scale(cpu_khz_ref,
259 ref_freq, freq->new);
260 if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
262 set_cyc2ns_scale(cpu_khz, freq->cpu);
264 * TSC based sched_clock turns
267 mark_tsc_unstable("cpufreq changes");
275 static struct notifier_block time_cpufreq_notifier_block = {
276 .notifier_call = time_cpufreq_notifier
279 static int __init cpufreq_tsc(void)
281 return cpufreq_register_notifier(&time_cpufreq_notifier_block,
282 CPUFREQ_TRANSITION_NOTIFIER);
284 core_initcall(cpufreq_tsc);
288 /* clock source code */
290 static struct clocksource clocksource_tsc;
293 * We compare the TSC to the cycle_last value in the clocksource
294 * structure to avoid a nasty time-warp issue. This can be observed in
295 * a very small window right after one CPU updated cycle_last under
296 * xtime lock and the other CPU reads a TSC value which is smaller
297 * than the cycle_last reference value due to a TSC which is slighty
298 * behind. This delta is nowhere else observable, but in that case it
299 * results in a forward time jump in the range of hours due to the
300 * unsigned delta calculation of the time keeping core code, which is
301 * necessary to support wrapping clocksources like pm timer.
303 static cycle_t read_tsc(void)
309 return ret >= clocksource_tsc.cycle_last ?
310 ret : clocksource_tsc.cycle_last;
313 static struct clocksource clocksource_tsc = {
317 .mask = CLOCKSOURCE_MASK(64),
318 .mult = 0, /* to be set */
320 .flags = CLOCK_SOURCE_IS_CONTINUOUS |
321 CLOCK_SOURCE_MUST_VERIFY,
324 void mark_tsc_unstable(char *reason)
328 printk("Marking TSC unstable due to: %s.\n", reason);
329 /* Can be called before registration */
330 if (clocksource_tsc.mult)
331 clocksource_change_rating(&clocksource_tsc, 0);
333 clocksource_tsc.rating = 0;
336 EXPORT_SYMBOL_GPL(mark_tsc_unstable);
338 static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d)
340 printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
346 /* List of systems that have known TSC problems */
347 static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
349 .callback = dmi_mark_tsc_unstable,
350 .ident = "IBM Thinkpad 380XD",
352 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
353 DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
360 * Make an educated guess if the TSC is trustworthy and synchronized
363 __cpuinit int unsynchronized_tsc(void)
365 if (!cpu_has_tsc || tsc_unstable)
368 /* Anything with constant TSC should be synchronized */
369 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
373 * Intel systems are normally all synchronized.
374 * Exceptions must mark TSC as unstable:
376 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
377 /* assume multi socket systems are not synchronized: */
378 if (num_possible_cpus() > 1)
385 * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
387 #ifdef CONFIG_MGEODE_LX
388 /* RTSC counts during suspend */
389 #define RTSC_SUSP 0x100
391 static void __init check_geode_tsc_reliable(void)
393 unsigned long res_low, res_high;
395 rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
396 if (res_low & RTSC_SUSP)
397 clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
400 static inline void check_geode_tsc_reliable(void) { }
404 void __init tsc_init(void)
409 if (!cpu_has_tsc || tsc_disabled > 0)
412 cpu_khz = calculate_cpu_khz();
416 mark_tsc_unstable("could not calculate TSC khz");
420 lpj = ((u64)tsc_khz * 1000);
424 /* now allow native_sched_clock() to use rdtsc */
427 printk("Detected %lu.%03lu MHz processor.\n",
428 (unsigned long)cpu_khz / 1000,
429 (unsigned long)cpu_khz % 1000);
432 * Secondary CPUs do not run through tsc_init(), so set up
433 * all the scale factors for all CPUs, assuming the same
434 * speed as the bootup CPU. (cpufreq notifiers will fix this
435 * up if their speed diverges)
437 for_each_possible_cpu(cpu)
438 set_cyc2ns_scale(cpu_khz, cpu);
442 /* Check and install the TSC clocksource */
443 dmi_check_system(bad_tsc_dmi_table);
445 unsynchronized_tsc();
446 check_geode_tsc_reliable();
447 clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
448 clocksource_tsc.shift);
449 /* lower the rating if we already know its unstable: */
450 if (check_tsc_unstable()) {
451 clocksource_tsc.rating = 0;
452 clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
454 clocksource_register(&clocksource_tsc);