Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6] / drivers / scsi / stex.c
1 /*
2  * SuperTrak EX Series Storage Controller driver for Linux
3  *
4  *      Copyright (C) 2005, 2006 Promise Technology Inc.
5  *
6  *      This program is free software; you can redistribute it and/or
7  *      modify it under the terms of the GNU General Public License
8  *      as published by the Free Software Foundation; either version
9  *      2 of the License, or (at your option) any later version.
10  *
11  *      Written By:
12  *              Ed Lin <promise_linux@promise.com>
13  *
14  *      Version: 3.0.0.1
15  *
16  */
17
18 #include <linux/init.h>
19 #include <linux/errno.h>
20 #include <linux/kernel.h>
21 #include <linux/delay.h>
22 #include <linux/sched.h>
23 #include <linux/time.h>
24 #include <linux/pci.h>
25 #include <linux/blkdev.h>
26 #include <linux/interrupt.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/spinlock.h>
30 #include <asm/io.h>
31 #include <asm/irq.h>
32 #include <asm/byteorder.h>
33 #include <scsi/scsi.h>
34 #include <scsi/scsi_device.h>
35 #include <scsi/scsi_cmnd.h>
36 #include <scsi/scsi_host.h>
37 #include <scsi/scsi_tcq.h>
38
39 #define DRV_NAME "stex"
40 #define ST_DRIVER_VERSION "3.0.0.1"
41 #define ST_VER_MAJOR            3
42 #define ST_VER_MINOR            0
43 #define ST_OEM                  0
44 #define ST_BUILD_VER            1
45
46 enum {
47         /* MU register offset */
48         IMR0    = 0x10, /* MU_INBOUND_MESSAGE_REG0 */
49         IMR1    = 0x14, /* MU_INBOUND_MESSAGE_REG1 */
50         OMR0    = 0x18, /* MU_OUTBOUND_MESSAGE_REG0 */
51         OMR1    = 0x1c, /* MU_OUTBOUND_MESSAGE_REG1 */
52         IDBL    = 0x20, /* MU_INBOUND_DOORBELL */
53         IIS     = 0x24, /* MU_INBOUND_INTERRUPT_STATUS */
54         IIM     = 0x28, /* MU_INBOUND_INTERRUPT_MASK */
55         ODBL    = 0x2c, /* MU_OUTBOUND_DOORBELL */
56         OIS     = 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */
57         OIM     = 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */
58
59         /* MU register value */
60         MU_INBOUND_DOORBELL_HANDSHAKE           = 1,
61         MU_INBOUND_DOORBELL_REQHEADCHANGED      = 2,
62         MU_INBOUND_DOORBELL_STATUSTAILCHANGED   = 4,
63         MU_INBOUND_DOORBELL_HMUSTOPPED          = 8,
64         MU_INBOUND_DOORBELL_RESET               = 16,
65
66         MU_OUTBOUND_DOORBELL_HANDSHAKE          = 1,
67         MU_OUTBOUND_DOORBELL_REQUESTTAILCHANGED = 2,
68         MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED  = 4,
69         MU_OUTBOUND_DOORBELL_BUSCHANGE          = 8,
70         MU_OUTBOUND_DOORBELL_HASEVENT           = 16,
71
72         /* MU status code */
73         MU_STATE_STARTING                       = 1,
74         MU_STATE_FMU_READY_FOR_HANDSHAKE        = 2,
75         MU_STATE_SEND_HANDSHAKE_FRAME           = 3,
76         MU_STATE_STARTED                        = 4,
77         MU_STATE_RESETTING                      = 5,
78
79         MU_MAX_DELAY_TIME                       = 240000,
80         MU_HANDSHAKE_SIGNATURE                  = 0x55aaaa55,
81         HMU_PARTNER_TYPE                        = 2,
82
83         /* firmware returned values */
84         SRB_STATUS_SUCCESS                      = 0x01,
85         SRB_STATUS_ERROR                        = 0x04,
86         SRB_STATUS_BUSY                         = 0x05,
87         SRB_STATUS_INVALID_REQUEST              = 0x06,
88         SRB_STATUS_SELECTION_TIMEOUT            = 0x0A,
89         SRB_SEE_SENSE                           = 0x80,
90
91         /* task attribute */
92         TASK_ATTRIBUTE_SIMPLE                   = 0x0,
93         TASK_ATTRIBUTE_HEADOFQUEUE              = 0x1,
94         TASK_ATTRIBUTE_ORDERED                  = 0x2,
95         TASK_ATTRIBUTE_ACA                      = 0x4,
96
97         /* request count, etc. */
98         MU_MAX_REQUEST                          = 32,
99
100         /* one message wasted, use MU_MAX_REQUEST+1
101                 to handle MU_MAX_REQUEST messages */
102         MU_REQ_COUNT                            = (MU_MAX_REQUEST + 1),
103         MU_STATUS_COUNT                         = (MU_MAX_REQUEST + 1),
104
105         STEX_CDB_LENGTH                         = MAX_COMMAND_SIZE,
106         REQ_VARIABLE_LEN                        = 1024,
107         STATUS_VAR_LEN                          = 128,
108         ST_CAN_QUEUE                            = MU_MAX_REQUEST,
109         ST_CMD_PER_LUN                          = MU_MAX_REQUEST,
110         ST_MAX_SG                               = 32,
111
112         /* sg flags */
113         SG_CF_EOT                               = 0x80, /* end of table */
114         SG_CF_64B                               = 0x40, /* 64 bit item */
115         SG_CF_HOST                              = 0x20, /* sg in host memory */
116
117         ST_MAX_ARRAY_SUPPORTED                  = 16,
118         ST_MAX_TARGET_NUM                       = (ST_MAX_ARRAY_SUPPORTED+1),
119         ST_MAX_LUN_PER_TARGET                   = 16,
120
121         st_shasta                               = 0,
122         st_vsc                                  = 1,
123         st_yosemite                             = 2,
124
125         PASSTHRU_REQ_TYPE                       = 0x00000001,
126         PASSTHRU_REQ_NO_WAKEUP                  = 0x00000100,
127         ST_INTERNAL_TIMEOUT                     = 30,
128
129         ST_TO_CMD                               = 0,
130         ST_FROM_CMD                             = 1,
131
132         /* vendor specific commands of Promise */
133         MGT_CMD                                 = 0xd8,
134         SINBAND_MGT_CMD                         = 0xd9,
135         ARRAY_CMD                               = 0xe0,
136         CONTROLLER_CMD                          = 0xe1,
137         DEBUGGING_CMD                           = 0xe2,
138         PASSTHRU_CMD                            = 0xe3,
139
140         PASSTHRU_GET_ADAPTER                    = 0x05,
141         PASSTHRU_GET_DRVVER                     = 0x10,
142
143         CTLR_CONFIG_CMD                         = 0x03,
144         CTLR_SHUTDOWN                           = 0x0d,
145
146         CTLR_POWER_STATE_CHANGE                 = 0x0e,
147         CTLR_POWER_SAVING                       = 0x01,
148
149         PASSTHRU_SIGNATURE                      = 0x4e415041,
150         MGT_CMD_SIGNATURE                       = 0xba,
151
152         INQUIRY_EVPD                            = 0x01,
153 };
154
155 /* SCSI inquiry data */
156 typedef struct st_inq {
157         u8 DeviceType                   :5;
158         u8 DeviceTypeQualifier          :3;
159         u8 DeviceTypeModifier           :7;
160         u8 RemovableMedia               :1;
161         u8 Versions;
162         u8 ResponseDataFormat           :4;
163         u8 HiSupport                    :1;
164         u8 NormACA                      :1;
165         u8 ReservedBit                  :1;
166         u8 AERC                         :1;
167         u8 AdditionalLength;
168         u8 Reserved[2];
169         u8 SoftReset                    :1;
170         u8 CommandQueue                 :1;
171         u8 Reserved2                    :1;
172         u8 LinkedCommands               :1;
173         u8 Synchronous                  :1;
174         u8 Wide16Bit                    :1;
175         u8 Wide32Bit                    :1;
176         u8 RelativeAddressing           :1;
177         u8 VendorId[8];
178         u8 ProductId[16];
179         u8 ProductRevisionLevel[4];
180         u8 VendorSpecific[20];
181         u8 Reserved3[40];
182 } ST_INQ;
183
184 struct st_sgitem {
185         u8 ctrl;        /* SG_CF_xxx */
186         u8 reserved[3];
187         __le32 count;
188         __le32 addr;
189         __le32 addr_hi;
190 };
191
192 struct st_sgtable {
193         __le16 sg_count;
194         __le16 max_sg_count;
195         __le32 sz_in_byte;
196         struct st_sgitem table[ST_MAX_SG];
197 };
198
199 struct handshake_frame {
200         __le32 rb_phy;          /* request payload queue physical address */
201         __le32 rb_phy_hi;
202         __le16 req_sz;          /* size of each request payload */
203         __le16 req_cnt;         /* count of reqs the buffer can hold */
204         __le16 status_sz;       /* size of each status payload */
205         __le16 status_cnt;      /* count of status the buffer can hold */
206         __le32 hosttime;        /* seconds from Jan 1, 1970 (GMT) */
207         __le32 hosttime_hi;
208         u8 partner_type;        /* who sends this frame */
209         u8 reserved0[7];
210         __le32 partner_ver_major;
211         __le32 partner_ver_minor;
212         __le32 partner_ver_oem;
213         __le32 partner_ver_build;
214         u32 reserved1[4];
215 };
216
217 struct req_msg {
218         __le16 tag;
219         u8 lun;
220         u8 target;
221         u8 task_attr;
222         u8 task_manage;
223         u8 prd_entry;
224         u8 payload_sz;          /* payload size in 4-byte, not used */
225         u8 cdb[STEX_CDB_LENGTH];
226         u8 variable[REQ_VARIABLE_LEN];
227 };
228
229 struct status_msg {
230         __le16 tag;
231         u8 lun;
232         u8 target;
233         u8 srb_status;
234         u8 scsi_status;
235         u8 reserved;
236         u8 payload_sz;          /* payload size in 4-byte */
237         u8 variable[STATUS_VAR_LEN];
238 };
239
240 struct ver_info {
241         u32 major;
242         u32 minor;
243         u32 oem;
244         u32 build;
245         u32 reserved[2];
246 };
247
248 struct st_frame {
249         u32 base[6];
250         u32 rom_addr;
251
252         struct ver_info drv_ver;
253         struct ver_info bios_ver;
254
255         u32 bus;
256         u32 slot;
257         u32 irq_level;
258         u32 irq_vec;
259         u32 id;
260         u32 subid;
261
262         u32 dimm_size;
263         u8 dimm_type;
264         u8 reserved[3];
265
266         u32 channel;
267         u32 reserved1;
268 };
269
270 struct st_drvver {
271         u32 major;
272         u32 minor;
273         u32 oem;
274         u32 build;
275         u32 signature[2];
276         u8 console_id;
277         u8 host_no;
278         u8 reserved0[2];
279         u32 reserved[3];
280 };
281
282 #define MU_REQ_BUFFER_SIZE      (MU_REQ_COUNT * sizeof(struct req_msg))
283 #define MU_STATUS_BUFFER_SIZE   (MU_STATUS_COUNT * sizeof(struct status_msg))
284 #define MU_BUFFER_SIZE          (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE)
285 #define STEX_EXTRA_SIZE         max(sizeof(struct st_frame), sizeof(ST_INQ))
286 #define STEX_BUFFER_SIZE        (MU_BUFFER_SIZE + STEX_EXTRA_SIZE)
287
288 struct st_ccb {
289         struct req_msg *req;
290         struct scsi_cmnd *cmd;
291
292         void *sense_buffer;
293         unsigned int sense_bufflen;
294         int sg_count;
295
296         u32 req_type;
297         u8 srb_status;
298         u8 scsi_status;
299 };
300
301 struct st_hba {
302         void __iomem *mmio_base;        /* iomapped PCI memory space */
303         void *dma_mem;
304         dma_addr_t dma_handle;
305
306         struct Scsi_Host *host;
307         struct pci_dev *pdev;
308
309         u32 req_head;
310         u32 req_tail;
311         u32 status_head;
312         u32 status_tail;
313
314         struct status_msg *status_buffer;
315         void *copy_buffer; /* temp buffer for driver-handled commands */
316         struct st_ccb ccb[MU_MAX_REQUEST];
317         struct st_ccb *wait_ccb;
318         wait_queue_head_t waitq;
319
320         unsigned int mu_status;
321         int out_req_cnt;
322
323         unsigned int cardtype;
324 };
325
326 static const char console_inq_page[] =
327 {
328         0x03,0x00,0x03,0x03,0xFA,0x00,0x00,0x30,
329         0x50,0x72,0x6F,0x6D,0x69,0x73,0x65,0x20,        /* "Promise " */
330         0x52,0x41,0x49,0x44,0x20,0x43,0x6F,0x6E,        /* "RAID Con" */
331         0x73,0x6F,0x6C,0x65,0x20,0x20,0x20,0x20,        /* "sole    " */
332         0x31,0x2E,0x30,0x30,0x20,0x20,0x20,0x20,        /* "1.00    " */
333         0x53,0x58,0x2F,0x52,0x53,0x41,0x46,0x2D,        /* "SX/RSAF-" */
334         0x54,0x45,0x31,0x2E,0x30,0x30,0x20,0x20,        /* "TE1.00  " */
335         0x0C,0x20,0x20,0x20,0x20,0x20,0x20,0x20
336 };
337
338 MODULE_AUTHOR("Ed Lin");
339 MODULE_DESCRIPTION("Promise Technology SuperTrak EX Controllers");
340 MODULE_LICENSE("GPL");
341 MODULE_VERSION(ST_DRIVER_VERSION);
342
343 static void stex_gettime(__le32 *time)
344 {
345         struct timeval tv;
346         do_gettimeofday(&tv);
347
348         *time = cpu_to_le32(tv.tv_sec & 0xffffffff);
349         *(time + 1) = cpu_to_le32((tv.tv_sec >> 16) >> 16);
350 }
351
352 static struct status_msg *stex_get_status(struct st_hba *hba)
353 {
354         struct status_msg *status =
355                 hba->status_buffer + hba->status_tail;
356
357         ++hba->status_tail;
358         hba->status_tail %= MU_STATUS_COUNT;
359
360         return status;
361 }
362
363 static void stex_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
364 {
365         cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
366
367         cmd->sense_buffer[0] = 0x70;    /* fixed format, current */
368         cmd->sense_buffer[2] = sk;
369         cmd->sense_buffer[7] = 18 - 8;  /* additional sense length */
370         cmd->sense_buffer[12] = asc;
371         cmd->sense_buffer[13] = ascq;
372 }
373
374 static void stex_invalid_field(struct scsi_cmnd *cmd,
375                                void (*done)(struct scsi_cmnd *))
376 {
377         /* "Invalid field in cbd" */
378         stex_set_sense(cmd, ILLEGAL_REQUEST, 0x24, 0x0);
379         done(cmd);
380 }
381
382 static struct req_msg *stex_alloc_req(struct st_hba *hba)
383 {
384         struct req_msg *req = ((struct req_msg *)hba->dma_mem) +
385                 hba->req_head;
386
387         ++hba->req_head;
388         hba->req_head %= MU_REQ_COUNT;
389
390         return req;
391 }
392
393 static int stex_map_sg(struct st_hba *hba,
394         struct req_msg *req, struct st_ccb *ccb)
395 {
396         struct pci_dev *pdev = hba->pdev;
397         struct scsi_cmnd *cmd;
398         dma_addr_t dma_handle;
399         struct scatterlist *src;
400         struct st_sgtable *dst;
401         int i;
402
403         cmd = ccb->cmd;
404         dst = (struct st_sgtable *)req->variable;
405         dst->max_sg_count = cpu_to_le16(ST_MAX_SG);
406         dst->sz_in_byte = cpu_to_le32(cmd->request_bufflen);
407
408         if (cmd->use_sg) {
409                 int n_elem;
410
411                 src = (struct scatterlist *) cmd->request_buffer;
412                 n_elem = pci_map_sg(pdev, src,
413                         cmd->use_sg, cmd->sc_data_direction);
414                 if (n_elem <= 0)
415                         return -EIO;
416
417                 ccb->sg_count = n_elem;
418                 dst->sg_count = cpu_to_le16((u16)n_elem);
419
420                 for (i = 0; i < n_elem; i++, src++) {
421                         dst->table[i].count = cpu_to_le32((u32)sg_dma_len(src));
422                         dst->table[i].addr =
423                                 cpu_to_le32(sg_dma_address(src) & 0xffffffff);
424                         dst->table[i].addr_hi =
425                                 cpu_to_le32((sg_dma_address(src) >> 16) >> 16);
426                         dst->table[i].ctrl = SG_CF_64B | SG_CF_HOST;
427                 }
428                 dst->table[--i].ctrl |= SG_CF_EOT;
429                 return 0;
430         }
431
432         dma_handle = pci_map_single(pdev, cmd->request_buffer,
433                 cmd->request_bufflen, cmd->sc_data_direction);
434         cmd->SCp.dma_handle = dma_handle;
435
436         ccb->sg_count = 1;
437         dst->sg_count = cpu_to_le16(1);
438         dst->table[0].addr = cpu_to_le32(dma_handle & 0xffffffff);
439         dst->table[0].addr_hi = cpu_to_le32((dma_handle >> 16) >> 16);
440         dst->table[0].count = cpu_to_le32((u32)cmd->request_bufflen);
441         dst->table[0].ctrl = SG_CF_EOT | SG_CF_64B | SG_CF_HOST;
442
443         return 0;
444 }
445
446 static void stex_internal_copy(struct scsi_cmnd *cmd,
447         const void *src, size_t *count, int sg_count, int direction)
448 {
449         size_t lcount;
450         size_t len;
451         void *s, *d, *base = NULL;
452         if (*count > cmd->request_bufflen)
453                 *count = cmd->request_bufflen;
454         lcount = *count;
455         while (lcount) {
456                 len = lcount;
457                 s = (void *)src;
458                 if (cmd->use_sg) {
459                         size_t offset = *count - lcount;
460                         s += offset;
461                         base = scsi_kmap_atomic_sg(cmd->request_buffer,
462                                 sg_count, &offset, &len);
463                         if (base == NULL) {
464                                 *count -= lcount;
465                                 return;
466                         }
467                         d = base + offset;
468                 } else
469                         d = cmd->request_buffer;
470
471                 if (direction == ST_TO_CMD)
472                         memcpy(d, s, len);
473                 else
474                         memcpy(s, d, len);
475
476                 lcount -= len;
477                 if (cmd->use_sg)
478                         scsi_kunmap_atomic_sg(base);
479         }
480 }
481
482 static int stex_direct_copy(struct scsi_cmnd *cmd,
483         const void *src, size_t count)
484 {
485         struct st_hba *hba = (struct st_hba *) &cmd->device->host->hostdata[0];
486         size_t cp_len = count;
487         int n_elem = 0;
488
489         if (cmd->use_sg) {
490                 n_elem = pci_map_sg(hba->pdev, cmd->request_buffer,
491                         cmd->use_sg, cmd->sc_data_direction);
492                 if (n_elem <= 0)
493                         return 0;
494         }
495
496         stex_internal_copy(cmd, src, &cp_len, n_elem, ST_TO_CMD);
497
498         if (cmd->use_sg)
499                 pci_unmap_sg(hba->pdev, cmd->request_buffer,
500                         cmd->use_sg, cmd->sc_data_direction);
501         return cp_len == count;
502 }
503
504 static void stex_controller_info(struct st_hba *hba, struct st_ccb *ccb)
505 {
506         struct st_frame *p;
507         size_t count = sizeof(struct st_frame);
508
509         p = hba->copy_buffer;
510         memset(p->base, 0, sizeof(u32)*6);
511         *(unsigned long *)(p->base) = pci_resource_start(hba->pdev, 0);
512         p->rom_addr = 0;
513
514         p->drv_ver.major = ST_VER_MAJOR;
515         p->drv_ver.minor = ST_VER_MINOR;
516         p->drv_ver.oem = ST_OEM;
517         p->drv_ver.build = ST_BUILD_VER;
518
519         p->bus = hba->pdev->bus->number;
520         p->slot = hba->pdev->devfn;
521         p->irq_level = 0;
522         p->irq_vec = hba->pdev->irq;
523         p->id = hba->pdev->vendor << 16 | hba->pdev->device;
524         p->subid =
525                 hba->pdev->subsystem_vendor << 16 | hba->pdev->subsystem_device;
526
527         stex_internal_copy(ccb->cmd, p, &count, ccb->sg_count, ST_TO_CMD);
528 }
529
530 static void
531 stex_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag)
532 {
533         req->tag = cpu_to_le16(tag);
534         req->task_attr = TASK_ATTRIBUTE_SIMPLE;
535         req->task_manage = 0; /* not supported yet */
536
537         hba->ccb[tag].req = req;
538         hba->out_req_cnt++;
539
540         writel(hba->req_head, hba->mmio_base + IMR0);
541         writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL);
542         readl(hba->mmio_base + IDBL); /* flush */
543 }
544
545 static int
546 stex_slave_alloc(struct scsi_device *sdev)
547 {
548         /* Cheat: usually extracted from Inquiry data */
549         sdev->tagged_supported = 1;
550
551         scsi_activate_tcq(sdev, sdev->host->can_queue);
552
553         return 0;
554 }
555
556 static int
557 stex_slave_config(struct scsi_device *sdev)
558 {
559         sdev->use_10_for_rw = 1;
560         sdev->use_10_for_ms = 1;
561         sdev->timeout = 60 * HZ;
562         sdev->tagged_supported = 1;
563
564         return 0;
565 }
566
567 static void
568 stex_slave_destroy(struct scsi_device *sdev)
569 {
570         scsi_deactivate_tcq(sdev, 1);
571 }
572
573 static int
574 stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
575 {
576         struct st_hba *hba;
577         struct Scsi_Host *host;
578         unsigned int id,lun;
579         struct req_msg *req;
580         u16 tag;
581         host = cmd->device->host;
582         id = cmd->device->id;
583         lun = cmd->device->channel; /* firmware lun issue work around */
584         hba = (struct st_hba *) &host->hostdata[0];
585
586         switch (cmd->cmnd[0]) {
587         case MODE_SENSE_10:
588         {
589                 static char ms10_caching_page[12] =
590                         { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 };
591                 unsigned char page;
592                 page = cmd->cmnd[2] & 0x3f;
593                 if (page == 0x8 || page == 0x3f) {
594                         stex_direct_copy(cmd, ms10_caching_page,
595                                         sizeof(ms10_caching_page));
596                         cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
597                         done(cmd);
598                 } else
599                         stex_invalid_field(cmd, done);
600                 return 0;
601         }
602         case INQUIRY:
603                 if (id != ST_MAX_ARRAY_SUPPORTED)
604                         break;
605                 if (lun == 0 && (cmd->cmnd[1] & INQUIRY_EVPD) == 0) {
606                         stex_direct_copy(cmd, console_inq_page,
607                                 sizeof(console_inq_page));
608                         cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
609                         done(cmd);
610                 } else
611                         stex_invalid_field(cmd, done);
612                 return 0;
613         case PASSTHRU_CMD:
614                 if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) {
615                         struct st_drvver ver;
616                         ver.major = ST_VER_MAJOR;
617                         ver.minor = ST_VER_MINOR;
618                         ver.oem = ST_OEM;
619                         ver.build = ST_BUILD_VER;
620                         ver.signature[0] = PASSTHRU_SIGNATURE;
621                         ver.console_id = ST_MAX_ARRAY_SUPPORTED;
622                         ver.host_no = hba->host->host_no;
623                         cmd->result = stex_direct_copy(cmd, &ver, sizeof(ver)) ?
624                                 DID_OK << 16 | COMMAND_COMPLETE << 8 :
625                                 DID_ERROR << 16 | COMMAND_COMPLETE << 8;
626                         done(cmd);
627                         return 0;
628                 }
629         default:
630                 break;
631         }
632
633         cmd->scsi_done = done;
634
635         tag = cmd->request->tag;
636
637         if (unlikely(tag >= host->can_queue))
638                 return SCSI_MLQUEUE_HOST_BUSY;
639
640         req = stex_alloc_req(hba);
641
642         if (hba->cardtype == st_yosemite) {
643                 req->lun = lun * (ST_MAX_TARGET_NUM - 1) + id;
644                 req->target = 0;
645         } else {
646                 req->lun = lun;
647                 req->target = id;
648         }
649
650         /* cdb */
651         memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH);
652
653         hba->ccb[tag].cmd = cmd;
654         hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE;
655         hba->ccb[tag].sense_buffer = cmd->sense_buffer;
656         hba->ccb[tag].req_type = 0;
657
658         if (cmd->sc_data_direction != DMA_NONE)
659                 stex_map_sg(hba, req, &hba->ccb[tag]);
660
661         stex_send_cmd(hba, req, tag);
662         return 0;
663 }
664
665 static void stex_unmap_sg(struct st_hba *hba, struct scsi_cmnd *cmd)
666 {
667         if (cmd->sc_data_direction != DMA_NONE) {
668                 if (cmd->use_sg)
669                         pci_unmap_sg(hba->pdev, cmd->request_buffer,
670                                 cmd->use_sg, cmd->sc_data_direction);
671                 else
672                         pci_unmap_single(hba->pdev, cmd->SCp.dma_handle,
673                                 cmd->request_bufflen, cmd->sc_data_direction);
674         }
675 }
676
677 static void stex_scsi_done(struct st_ccb *ccb)
678 {
679         struct scsi_cmnd *cmd = ccb->cmd;
680         int result;
681
682         if (ccb->srb_status == SRB_STATUS_SUCCESS ||  ccb->srb_status == 0) {
683                 result = ccb->scsi_status;
684                 switch (ccb->scsi_status) {
685                 case SAM_STAT_GOOD:
686                         result |= DID_OK << 16 | COMMAND_COMPLETE << 8;
687                         break;
688                 case SAM_STAT_CHECK_CONDITION:
689                         result |= DRIVER_SENSE << 24;
690                         break;
691                 case SAM_STAT_BUSY:
692                         result |= DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
693                         break;
694                 default:
695                         result |= DID_ERROR << 16 | COMMAND_COMPLETE << 8;
696                         break;
697                 }
698         }
699         else if (ccb->srb_status & SRB_SEE_SENSE)
700                 result = DRIVER_SENSE << 24 | SAM_STAT_CHECK_CONDITION;
701         else switch (ccb->srb_status) {
702                 case SRB_STATUS_SELECTION_TIMEOUT:
703                         result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8;
704                         break;
705                 case SRB_STATUS_BUSY:
706                         result = DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
707                         break;
708                 case SRB_STATUS_INVALID_REQUEST:
709                 case SRB_STATUS_ERROR:
710                 default:
711                         result = DID_ERROR << 16 | COMMAND_COMPLETE << 8;
712                         break;
713         }
714
715         cmd->result = result;
716         cmd->scsi_done(cmd);
717 }
718
719 static void stex_copy_data(struct st_ccb *ccb,
720         struct status_msg *resp, unsigned int variable)
721 {
722         size_t count = variable;
723         if (resp->scsi_status != SAM_STAT_GOOD) {
724                 if (ccb->sense_buffer != NULL)
725                         memcpy(ccb->sense_buffer, resp->variable,
726                                 min(variable, ccb->sense_bufflen));
727                 return;
728         }
729
730         if (ccb->cmd == NULL)
731                 return;
732         stex_internal_copy(ccb->cmd,
733                 resp->variable, &count, ccb->sg_count, ST_TO_CMD);
734 }
735
736 static void stex_ys_commands(struct st_hba *hba,
737         struct st_ccb *ccb, struct status_msg *resp)
738 {
739         size_t count;
740
741         if (ccb->cmd->cmnd[0] == MGT_CMD &&
742                 resp->scsi_status != SAM_STAT_CHECK_CONDITION) {
743                 ccb->cmd->request_bufflen =
744                         le32_to_cpu(*(__le32 *)&resp->variable[0]);
745                 return;
746         }
747
748         if (resp->srb_status != 0)
749                 return;
750
751         /* determine inquiry command status by DeviceTypeQualifier */
752         if (ccb->cmd->cmnd[0] == INQUIRY &&
753                 resp->scsi_status == SAM_STAT_GOOD) {
754                 ST_INQ *inq_data;
755
756                 count = STEX_EXTRA_SIZE;
757                 stex_internal_copy(ccb->cmd, hba->copy_buffer,
758                         &count, ccb->sg_count, ST_FROM_CMD);
759                 inq_data = (ST_INQ *)hba->copy_buffer;
760                 if (inq_data->DeviceTypeQualifier != 0)
761                         ccb->srb_status = SRB_STATUS_SELECTION_TIMEOUT;
762                 else
763                         ccb->srb_status = SRB_STATUS_SUCCESS;
764         } else if (ccb->cmd->cmnd[0] == REPORT_LUNS) {
765                 u8 *report_lun_data = (u8 *)hba->copy_buffer;
766
767                 count = STEX_EXTRA_SIZE;
768                 stex_internal_copy(ccb->cmd, report_lun_data,
769                         &count, ccb->sg_count, ST_FROM_CMD);
770                 if (report_lun_data[2] || report_lun_data[3]) {
771                         report_lun_data[2] = 0x00;
772                         report_lun_data[3] = 0x08;
773                         stex_internal_copy(ccb->cmd, report_lun_data,
774                                 &count, ccb->sg_count, ST_TO_CMD);
775                 }
776         }
777 }
778
779 static void stex_mu_intr(struct st_hba *hba, u32 doorbell)
780 {
781         void __iomem *base = hba->mmio_base;
782         struct status_msg *resp;
783         struct st_ccb *ccb;
784         unsigned int size;
785         u16 tag;
786
787         if (!(doorbell & MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED))
788                 return;
789
790         /* status payloads */
791         hba->status_head = readl(base + OMR1);
792         if (unlikely(hba->status_head >= MU_STATUS_COUNT)) {
793                 printk(KERN_WARNING DRV_NAME "(%s): invalid status head\n",
794                         pci_name(hba->pdev));
795                 return;
796         }
797
798         /*
799          * it's not a valid status payload if:
800          * 1. there are no pending requests(e.g. during init stage)
801          * 2. there are some pending requests, but the controller is in
802          *     reset status, and its type is not st_yosemite
803          * firmware of st_yosemite in reset status will return pending requests
804          * to driver, so we allow it to pass
805          */
806         if (unlikely(hba->out_req_cnt <= 0 ||
807                         (hba->mu_status == MU_STATE_RESETTING &&
808                          hba->cardtype != st_yosemite))) {
809                 hba->status_tail = hba->status_head;
810                 goto update_status;
811         }
812
813         while (hba->status_tail != hba->status_head) {
814                 resp = stex_get_status(hba);
815                 tag = le16_to_cpu(resp->tag);
816                 if (unlikely(tag >= hba->host->can_queue)) {
817                         printk(KERN_WARNING DRV_NAME
818                                 "(%s): invalid tag\n", pci_name(hba->pdev));
819                         continue;
820                 }
821
822                 ccb = &hba->ccb[tag];
823                 if (hba->wait_ccb == ccb)
824                         hba->wait_ccb = NULL;
825                 if (unlikely(ccb->req == NULL)) {
826                         printk(KERN_WARNING DRV_NAME
827                                 "(%s): lagging req\n", pci_name(hba->pdev));
828                         hba->out_req_cnt--;
829                         continue;
830                 }
831
832                 size = resp->payload_sz * sizeof(u32); /* payload size */
833                 if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN ||
834                         size > sizeof(*resp))) {
835                         printk(KERN_WARNING DRV_NAME "(%s): bad status size\n",
836                                 pci_name(hba->pdev));
837                 } else {
838                         size -= sizeof(*resp) - STATUS_VAR_LEN; /* copy size */
839                         if (size)
840                                 stex_copy_data(ccb, resp, size);
841                 }
842
843                 ccb->srb_status = resp->srb_status;
844                 ccb->scsi_status = resp->scsi_status;
845
846                 if (likely(ccb->cmd != NULL)) {
847                         if (hba->cardtype == st_yosemite)
848                                 stex_ys_commands(hba, ccb, resp);
849
850                         if (unlikely(ccb->cmd->cmnd[0] == PASSTHRU_CMD &&
851                                 ccb->cmd->cmnd[1] == PASSTHRU_GET_ADAPTER))
852                                 stex_controller_info(hba, ccb);
853
854                         stex_unmap_sg(hba, ccb->cmd);
855                         stex_scsi_done(ccb);
856                         hba->out_req_cnt--;
857                 } else if (ccb->req_type & PASSTHRU_REQ_TYPE) {
858                         hba->out_req_cnt--;
859                         if (ccb->req_type & PASSTHRU_REQ_NO_WAKEUP) {
860                                 ccb->req_type = 0;
861                                 continue;
862                         }
863                         ccb->req_type = 0;
864                         if (waitqueue_active(&hba->waitq))
865                                 wake_up(&hba->waitq);
866                 }
867         }
868
869 update_status:
870         writel(hba->status_head, base + IMR1);
871         readl(base + IMR1); /* flush */
872 }
873
874 static irqreturn_t stex_intr(int irq, void *__hba)
875 {
876         struct st_hba *hba = __hba;
877         void __iomem *base = hba->mmio_base;
878         u32 data;
879         unsigned long flags;
880         int handled = 0;
881
882         spin_lock_irqsave(hba->host->host_lock, flags);
883
884         data = readl(base + ODBL);
885
886         if (data && data != 0xffffffff) {
887                 /* clear the interrupt */
888                 writel(data, base + ODBL);
889                 readl(base + ODBL); /* flush */
890                 stex_mu_intr(hba, data);
891                 handled = 1;
892         }
893
894         spin_unlock_irqrestore(hba->host->host_lock, flags);
895
896         return IRQ_RETVAL(handled);
897 }
898
899 static int stex_handshake(struct st_hba *hba)
900 {
901         void __iomem *base = hba->mmio_base;
902         struct handshake_frame *h;
903         dma_addr_t status_phys;
904         int i;
905
906         if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
907                 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
908                 readl(base + IDBL);
909                 for (i = 0; readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE
910                         && i < MU_MAX_DELAY_TIME; i++) {
911                         rmb();
912                         msleep(1);
913                 }
914
915                 if (i == MU_MAX_DELAY_TIME) {
916                         printk(KERN_ERR DRV_NAME
917                                 "(%s): no handshake signature\n",
918                                 pci_name(hba->pdev));
919                         return -1;
920                 }
921         }
922
923         udelay(10);
924
925         h = (struct handshake_frame *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
926         h->rb_phy = cpu_to_le32(hba->dma_handle);
927         h->rb_phy_hi = cpu_to_le32((hba->dma_handle >> 16) >> 16);
928         h->req_sz = cpu_to_le16(sizeof(struct req_msg));
929         h->req_cnt = cpu_to_le16(MU_REQ_COUNT);
930         h->status_sz = cpu_to_le16(sizeof(struct status_msg));
931         h->status_cnt = cpu_to_le16(MU_STATUS_COUNT);
932         stex_gettime(&h->hosttime);
933         h->partner_type = HMU_PARTNER_TYPE;
934
935         status_phys = hba->dma_handle + MU_REQ_BUFFER_SIZE;
936         writel(status_phys, base + IMR0);
937         readl(base + IMR0);
938         writel((status_phys >> 16) >> 16, base + IMR1);
939         readl(base + IMR1);
940
941         writel((status_phys >> 16) >> 16, base + OMR0); /* old fw compatible */
942         readl(base + OMR0);
943         writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
944         readl(base + IDBL); /* flush */
945
946         udelay(10);
947         for (i = 0; readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE
948                 && i < MU_MAX_DELAY_TIME; i++) {
949                 rmb();
950                 msleep(1);
951         }
952
953         if (i == MU_MAX_DELAY_TIME) {
954                 printk(KERN_ERR DRV_NAME
955                         "(%s): no signature after handshake frame\n",
956                         pci_name(hba->pdev));
957                 return -1;
958         }
959
960         writel(0, base + IMR0);
961         readl(base + IMR0);
962         writel(0, base + OMR0);
963         readl(base + OMR0);
964         writel(0, base + IMR1);
965         readl(base + IMR1);
966         writel(0, base + OMR1);
967         readl(base + OMR1); /* flush */
968         hba->mu_status = MU_STATE_STARTED;
969         return 0;
970 }
971
972 static int stex_abort(struct scsi_cmnd *cmd)
973 {
974         struct Scsi_Host *host = cmd->device->host;
975         struct st_hba *hba = (struct st_hba *)host->hostdata;
976         u16 tag = cmd->request->tag;
977         void __iomem *base;
978         u32 data;
979         int result = SUCCESS;
980         unsigned long flags;
981         base = hba->mmio_base;
982         spin_lock_irqsave(host->host_lock, flags);
983         if (tag < host->can_queue && hba->ccb[tag].cmd == cmd)
984                 hba->wait_ccb = &hba->ccb[tag];
985         else {
986                 for (tag = 0; tag < host->can_queue; tag++)
987                         if (hba->ccb[tag].cmd == cmd) {
988                                 hba->wait_ccb = &hba->ccb[tag];
989                                 break;
990                         }
991                 if (tag >= host->can_queue)
992                         goto out;
993         }
994
995         data = readl(base + ODBL);
996         if (data == 0 || data == 0xffffffff)
997                 goto fail_out;
998
999         writel(data, base + ODBL);
1000         readl(base + ODBL); /* flush */
1001
1002         stex_mu_intr(hba, data);
1003
1004         if (hba->wait_ccb == NULL) {
1005                 printk(KERN_WARNING DRV_NAME
1006                         "(%s): lost interrupt\n", pci_name(hba->pdev));
1007                 goto out;
1008         }
1009
1010 fail_out:
1011         stex_unmap_sg(hba, cmd);
1012         hba->wait_ccb->req = NULL; /* nullify the req's future return */
1013         hba->wait_ccb = NULL;
1014         result = FAILED;
1015 out:
1016         spin_unlock_irqrestore(host->host_lock, flags);
1017         return result;
1018 }
1019
1020 static void stex_hard_reset(struct st_hba *hba)
1021 {
1022         struct pci_bus *bus;
1023         int i;
1024         u16 pci_cmd;
1025         u8 pci_bctl;
1026
1027         for (i = 0; i < 16; i++)
1028                 pci_read_config_dword(hba->pdev, i * 4,
1029                         &hba->pdev->saved_config_space[i]);
1030
1031         /* Reset secondary bus. Our controller(MU/ATU) is the only device on
1032            secondary bus. Consult Intel 80331/3 developer's manual for detail */
1033         bus = hba->pdev->bus;
1034         pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &pci_bctl);
1035         pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET;
1036         pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
1037         msleep(1);
1038         pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
1039         pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
1040
1041         for (i = 0; i < MU_MAX_DELAY_TIME; i++) {
1042                 pci_read_config_word(hba->pdev, PCI_COMMAND, &pci_cmd);
1043                 if (pci_cmd & PCI_COMMAND_MASTER)
1044                         break;
1045                 msleep(1);
1046         }
1047
1048         ssleep(5);
1049         for (i = 0; i < 16; i++)
1050                 pci_write_config_dword(hba->pdev, i * 4,
1051                         hba->pdev->saved_config_space[i]);
1052 }
1053
1054 static int stex_reset(struct scsi_cmnd *cmd)
1055 {
1056         struct st_hba *hba;
1057         unsigned long flags;
1058         unsigned long before;
1059         hba = (struct st_hba *) &cmd->device->host->hostdata[0];
1060
1061         hba->mu_status = MU_STATE_RESETTING;
1062
1063         if (hba->cardtype == st_shasta)
1064                 stex_hard_reset(hba);
1065
1066         if (hba->cardtype != st_yosemite) {
1067                 if (stex_handshake(hba)) {
1068                         printk(KERN_WARNING DRV_NAME
1069                                 "(%s): resetting: handshake failed\n",
1070                                 pci_name(hba->pdev));
1071                         return FAILED;
1072                 }
1073                 spin_lock_irqsave(hba->host->host_lock, flags);
1074                 hba->req_head = 0;
1075                 hba->req_tail = 0;
1076                 hba->status_head = 0;
1077                 hba->status_tail = 0;
1078                 hba->out_req_cnt = 0;
1079                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1080                 return SUCCESS;
1081         }
1082
1083         /* st_yosemite */
1084         writel(MU_INBOUND_DOORBELL_RESET, hba->mmio_base + IDBL);
1085         readl(hba->mmio_base + IDBL); /* flush */
1086         before = jiffies;
1087         while (hba->out_req_cnt > 0) {
1088                 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) {
1089                         printk(KERN_WARNING DRV_NAME
1090                                 "(%s): reset timeout\n", pci_name(hba->pdev));
1091                         return FAILED;
1092                 }
1093                 msleep(1);
1094         }
1095
1096         hba->mu_status = MU_STATE_STARTED;
1097         return SUCCESS;
1098 }
1099
1100 static int stex_biosparam(struct scsi_device *sdev,
1101         struct block_device *bdev, sector_t capacity, int geom[])
1102 {
1103         int heads = 255, sectors = 63, cylinders;
1104
1105         if (capacity < 0x200000) {
1106                 heads = 64;
1107                 sectors = 32;
1108         }
1109
1110         cylinders = sector_div(capacity, heads * sectors);
1111
1112         geom[0] = heads;
1113         geom[1] = sectors;
1114         geom[2] = cylinders;
1115
1116         return 0;
1117 }
1118
1119 static struct scsi_host_template driver_template = {
1120         .module                         = THIS_MODULE,
1121         .name                           = DRV_NAME,
1122         .proc_name                      = DRV_NAME,
1123         .bios_param                     = stex_biosparam,
1124         .queuecommand                   = stex_queuecommand,
1125         .slave_alloc                    = stex_slave_alloc,
1126         .slave_configure                = stex_slave_config,
1127         .slave_destroy                  = stex_slave_destroy,
1128         .eh_abort_handler               = stex_abort,
1129         .eh_host_reset_handler          = stex_reset,
1130         .can_queue                      = ST_CAN_QUEUE,
1131         .this_id                        = -1,
1132         .sg_tablesize                   = ST_MAX_SG,
1133         .cmd_per_lun                    = ST_CMD_PER_LUN,
1134 };
1135
1136 static int stex_set_dma_mask(struct pci_dev * pdev)
1137 {
1138         int ret;
1139         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)
1140                 && !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1141                 return 0;
1142         ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1143         if (!ret)
1144                 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1145         return ret;
1146 }
1147
1148 static int __devinit
1149 stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1150 {
1151         struct st_hba *hba;
1152         struct Scsi_Host *host;
1153         int err;
1154
1155         err = pci_enable_device(pdev);
1156         if (err)
1157                 return err;
1158
1159         pci_set_master(pdev);
1160
1161         host = scsi_host_alloc(&driver_template, sizeof(struct st_hba));
1162
1163         if (!host) {
1164                 printk(KERN_ERR DRV_NAME "(%s): scsi_host_alloc failed\n",
1165                         pci_name(pdev));
1166                 err = -ENOMEM;
1167                 goto out_disable;
1168         }
1169
1170         hba = (struct st_hba *)host->hostdata;
1171         memset(hba, 0, sizeof(struct st_hba));
1172
1173         err = pci_request_regions(pdev, DRV_NAME);
1174         if (err < 0) {
1175                 printk(KERN_ERR DRV_NAME "(%s): request regions failed\n",
1176                         pci_name(pdev));
1177                 goto out_scsi_host_put;
1178         }
1179
1180         hba->mmio_base = ioremap(pci_resource_start(pdev, 0),
1181                 pci_resource_len(pdev, 0));
1182         if ( !hba->mmio_base) {
1183                 printk(KERN_ERR DRV_NAME "(%s): memory map failed\n",
1184                         pci_name(pdev));
1185                 err = -ENOMEM;
1186                 goto out_release_regions;
1187         }
1188
1189         err = stex_set_dma_mask(pdev);
1190         if (err) {
1191                 printk(KERN_ERR DRV_NAME "(%s): set dma mask failed\n",
1192                         pci_name(pdev));
1193                 goto out_iounmap;
1194         }
1195
1196         hba->dma_mem = dma_alloc_coherent(&pdev->dev,
1197                 STEX_BUFFER_SIZE, &hba->dma_handle, GFP_KERNEL);
1198         if (!hba->dma_mem) {
1199                 err = -ENOMEM;
1200                 printk(KERN_ERR DRV_NAME "(%s): dma mem alloc failed\n",
1201                         pci_name(pdev));
1202                 goto out_iounmap;
1203         }
1204
1205         hba->status_buffer =
1206                 (struct status_msg *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
1207         hba->copy_buffer = hba->dma_mem + MU_BUFFER_SIZE;
1208         hba->mu_status = MU_STATE_STARTING;
1209
1210         hba->cardtype = (unsigned int) id->driver_data;
1211
1212         /* firmware uses id/lun pair for a logical drive, but lun would be
1213            always 0 if CONFIG_SCSI_MULTI_LUN not configured, so we use
1214            channel to map lun here */
1215         host->max_channel = ST_MAX_LUN_PER_TARGET - 1;
1216         host->max_id = ST_MAX_TARGET_NUM;
1217         host->max_lun = 1;
1218         host->unique_id = host->host_no;
1219         host->max_cmd_len = STEX_CDB_LENGTH;
1220
1221         hba->host = host;
1222         hba->pdev = pdev;
1223         init_waitqueue_head(&hba->waitq);
1224
1225         err = request_irq(pdev->irq, stex_intr, IRQF_SHARED, DRV_NAME, hba);
1226         if (err) {
1227                 printk(KERN_ERR DRV_NAME "(%s): request irq failed\n",
1228                         pci_name(pdev));
1229                 goto out_pci_free;
1230         }
1231
1232         err = stex_handshake(hba);
1233         if (err)
1234                 goto out_free_irq;
1235
1236         err = scsi_init_shared_tag_map(host, ST_CAN_QUEUE);
1237         if (err) {
1238                 printk(KERN_ERR DRV_NAME "(%s): init shared queue failed\n",
1239                         pci_name(pdev));
1240                 goto out_free_irq;
1241         }
1242
1243         pci_set_drvdata(pdev, hba);
1244
1245         err = scsi_add_host(host, &pdev->dev);
1246         if (err) {
1247                 printk(KERN_ERR DRV_NAME "(%s): scsi_add_host failed\n",
1248                         pci_name(pdev));
1249                 goto out_free_irq;
1250         }
1251
1252         scsi_scan_host(host);
1253
1254         return 0;
1255
1256 out_free_irq:
1257         free_irq(pdev->irq, hba);
1258 out_pci_free:
1259         dma_free_coherent(&pdev->dev, STEX_BUFFER_SIZE,
1260                           hba->dma_mem, hba->dma_handle);
1261 out_iounmap:
1262         iounmap(hba->mmio_base);
1263 out_release_regions:
1264         pci_release_regions(pdev);
1265 out_scsi_host_put:
1266         scsi_host_put(host);
1267 out_disable:
1268         pci_disable_device(pdev);
1269
1270         return err;
1271 }
1272
1273 static void stex_hba_stop(struct st_hba *hba)
1274 {
1275         struct req_msg *req;
1276         unsigned long flags;
1277         unsigned long before;
1278         u16 tag = 0;
1279
1280         spin_lock_irqsave(hba->host->host_lock, flags);
1281         req = stex_alloc_req(hba);
1282         memset(req->cdb, 0, STEX_CDB_LENGTH);
1283
1284         if (hba->cardtype == st_yosemite) {
1285                 req->cdb[0] = MGT_CMD;
1286                 req->cdb[1] = MGT_CMD_SIGNATURE;
1287                 req->cdb[2] = CTLR_CONFIG_CMD;
1288                 req->cdb[3] = CTLR_SHUTDOWN;
1289         } else {
1290                 req->cdb[0] = CONTROLLER_CMD;
1291                 req->cdb[1] = CTLR_POWER_STATE_CHANGE;
1292                 req->cdb[2] = CTLR_POWER_SAVING;
1293         }
1294
1295         hba->ccb[tag].cmd = NULL;
1296         hba->ccb[tag].sg_count = 0;
1297         hba->ccb[tag].sense_bufflen = 0;
1298         hba->ccb[tag].sense_buffer = NULL;
1299         hba->ccb[tag].req_type |= PASSTHRU_REQ_TYPE;
1300
1301         stex_send_cmd(hba, req, tag);
1302         spin_unlock_irqrestore(hba->host->host_lock, flags);
1303
1304         before = jiffies;
1305         while (hba->ccb[tag].req_type & PASSTHRU_REQ_TYPE) {
1306                 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ))
1307                         return;
1308                 msleep(10);
1309         }
1310 }
1311
1312 static void stex_hba_free(struct st_hba *hba)
1313 {
1314         free_irq(hba->pdev->irq, hba);
1315
1316         iounmap(hba->mmio_base);
1317
1318         pci_release_regions(hba->pdev);
1319
1320         dma_free_coherent(&hba->pdev->dev, STEX_BUFFER_SIZE,
1321                           hba->dma_mem, hba->dma_handle);
1322 }
1323
1324 static void stex_remove(struct pci_dev *pdev)
1325 {
1326         struct st_hba *hba = pci_get_drvdata(pdev);
1327
1328         scsi_remove_host(hba->host);
1329
1330         pci_set_drvdata(pdev, NULL);
1331
1332         stex_hba_stop(hba);
1333
1334         stex_hba_free(hba);
1335
1336         scsi_host_put(hba->host);
1337
1338         pci_disable_device(pdev);
1339 }
1340
1341 static void stex_shutdown(struct pci_dev *pdev)
1342 {
1343         struct st_hba *hba = pci_get_drvdata(pdev);
1344
1345         stex_hba_stop(hba);
1346 }
1347
1348 static struct pci_device_id stex_pci_tbl[] = {
1349         { 0x105a, 0x8350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1350         { 0x105a, 0xc350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1351         { 0x105a, 0xf350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1352         { 0x105a, 0x4301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1353         { 0x105a, 0x4302, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1354         { 0x105a, 0x8301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1355         { 0x105a, 0x8302, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1356         { 0x1725, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc },
1357         { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_yosemite },
1358         { }     /* terminate list */
1359 };
1360 MODULE_DEVICE_TABLE(pci, stex_pci_tbl);
1361
1362 static struct pci_driver stex_pci_driver = {
1363         .name           = DRV_NAME,
1364         .id_table       = stex_pci_tbl,
1365         .probe          = stex_probe,
1366         .remove         = __devexit_p(stex_remove),
1367         .shutdown       = stex_shutdown,
1368 };
1369
1370 static int __init stex_init(void)
1371 {
1372         printk(KERN_INFO DRV_NAME
1373                 ": Promise SuperTrak EX Driver version: %s\n",
1374                  ST_DRIVER_VERSION);
1375
1376         return pci_register_driver(&stex_pci_driver);
1377 }
1378
1379 static void __exit stex_exit(void)
1380 {
1381         pci_unregister_driver(&stex_pci_driver);
1382 }
1383
1384 module_init(stex_init);
1385 module_exit(stex_exit);