5 * include/asm-s390/bitops.h
8 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
9 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
11 * Derived from "include/asm-i386/bitops.h"
12 * Copyright (C) 1992, Linus Torvalds
15 #include <linux/compiler.h>
18 * 32 bit bitops format:
19 * bit 0 is the LSB of *addr; bit 31 is the MSB of *addr;
20 * bit 32 is the LSB of *(addr+4). That combined with the
21 * big endian byte order on S390 give the following bit
23 * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 \
24 * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
25 * after that follows the next long with bit numbers
26 * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
27 * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
28 * The reason for this bit ordering is the fact that
29 * in the architecture independent code bits operations
30 * of the form "flags |= (1 << bitnr)" are used INTERMIXED
31 * with operation of the form "set_bit(bitnr, flags)".
33 * 64 bit bitops format:
34 * bit 0 is the LSB of *addr; bit 63 is the MSB of *addr;
35 * bit 64 is the LSB of *(addr+8). That combined with the
36 * big endian byte order on S390 give the following bit
38 * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
39 * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
40 * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10
41 * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
42 * after that follows the next long with bit numbers
43 * 7f 7e 7d 7c 7b 7a 79 78 77 76 75 74 73 72 71 70
44 * 6f 6e 6d 6c 6b 6a 69 68 67 66 65 64 63 62 61 60
45 * 5f 5e 5d 5c 5b 5a 59 58 57 56 55 54 53 52 51 50
46 * 4f 4e 4d 4c 4b 4a 49 48 47 46 45 44 43 42 41 40
47 * The reason for this bit ordering is the fact that
48 * in the architecture independent code bits operations
49 * of the form "flags |= (1 << bitnr)" are used INTERMIXED
50 * with operation of the form "set_bit(bitnr, flags)".
53 /* set ALIGN_CS to 1 if the SMP safe bit operations should
54 * align the address to 4 byte boundary. It seems to work
55 * without the alignment.
62 #error "bitops won't work without CONFIG_SMP"
66 /* bitmap tables from arch/S390/kernel/bitmap.S */
67 extern const char _oi_bitmap[];
68 extern const char _ni_bitmap[];
69 extern const char _zb_findmap[];
70 extern const char _sb_findmap[];
74 #define __BITOPS_ALIGN 3
75 #define __BITOPS_WORDSIZE 32
76 #define __BITOPS_OR "or"
77 #define __BITOPS_AND "nr"
78 #define __BITOPS_XOR "xr"
80 #define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
81 __asm__ __volatile__(" l %0,0(%4)\n" \
83 __op_string " %1,%3\n" \
86 : "=&d" (__old), "=&d" (__new), \
87 "=m" (*(unsigned long *) __addr) \
88 : "d" (__val), "a" (__addr), \
89 "m" (*(unsigned long *) __addr) : "cc" );
93 #define __BITOPS_ALIGN 7
94 #define __BITOPS_WORDSIZE 64
95 #define __BITOPS_OR "ogr"
96 #define __BITOPS_AND "ngr"
97 #define __BITOPS_XOR "xgr"
99 #define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
100 __asm__ __volatile__(" lg %0,0(%4)\n" \
102 __op_string " %1,%3\n" \
103 " csg %0,%1,0(%4)\n" \
105 : "=&d" (__old), "=&d" (__new), \
106 "=m" (*(unsigned long *) __addr) \
107 : "d" (__val), "a" (__addr), \
108 "m" (*(unsigned long *) __addr) : "cc" );
110 #endif /* __s390x__ */
112 #define __BITOPS_WORDS(bits) (((bits)+__BITOPS_WORDSIZE-1)/__BITOPS_WORDSIZE)
113 #define __BITOPS_BARRIER() __asm__ __volatile__ ( "" : : : "memory" )
117 * SMP safe set_bit routine based on compare and swap (CS)
119 static inline void set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
121 unsigned long addr, old, new, mask;
123 addr = (unsigned long) ptr;
125 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
126 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
128 /* calculate address for CS */
129 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
131 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
132 /* Do the atomic update. */
133 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_OR);
137 * SMP safe clear_bit routine based on compare and swap (CS)
139 static inline void clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
141 unsigned long addr, old, new, mask;
143 addr = (unsigned long) ptr;
145 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
146 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
148 /* calculate address for CS */
149 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
151 mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1)));
152 /* Do the atomic update. */
153 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_AND);
157 * SMP safe change_bit routine based on compare and swap (CS)
159 static inline void change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
161 unsigned long addr, old, new, mask;
163 addr = (unsigned long) ptr;
165 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
166 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
168 /* calculate address for CS */
169 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
171 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
172 /* Do the atomic update. */
173 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_XOR);
177 * SMP safe test_and_set_bit routine based on compare and swap (CS)
180 test_and_set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
182 unsigned long addr, old, new, mask;
184 addr = (unsigned long) ptr;
186 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
187 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
189 /* calculate address for CS */
190 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
191 /* make OR/test mask */
192 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
193 /* Do the atomic update. */
194 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_OR);
196 return (old & mask) != 0;
200 * SMP safe test_and_clear_bit routine based on compare and swap (CS)
203 test_and_clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
205 unsigned long addr, old, new, mask;
207 addr = (unsigned long) ptr;
209 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
210 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
212 /* calculate address for CS */
213 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
214 /* make AND/test mask */
215 mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1)));
216 /* Do the atomic update. */
217 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_AND);
219 return (old ^ new) != 0;
223 * SMP safe test_and_change_bit routine based on compare and swap (CS)
226 test_and_change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
228 unsigned long addr, old, new, mask;
230 addr = (unsigned long) ptr;
232 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
233 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
235 /* calculate address for CS */
236 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
237 /* make XOR/test mask */
238 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
239 /* Do the atomic update. */
240 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_XOR);
242 return (old & mask) != 0;
244 #endif /* CONFIG_SMP */
247 * fast, non-SMP set_bit routine
249 static inline void __set_bit(unsigned long nr, volatile unsigned long *ptr)
253 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
254 asm volatile("oc 0(1,%1),0(%2)"
255 : "=m" (*(char *) addr)
256 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
257 "m" (*(char *) addr) : "cc" );
261 __constant_set_bit(const unsigned long nr, volatile unsigned long *ptr)
265 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
268 asm volatile ("oi 0(%1),0x01" : "=m" (*(char *) addr)
269 : "a" (addr), "m" (*(char *) addr) : "cc" );
272 asm volatile ("oi 0(%1),0x02" : "=m" (*(char *) addr)
273 : "a" (addr), "m" (*(char *) addr) : "cc" );
276 asm volatile ("oi 0(%1),0x04" : "=m" (*(char *) addr)
277 : "a" (addr), "m" (*(char *) addr) : "cc" );
280 asm volatile ("oi 0(%1),0x08" : "=m" (*(char *) addr)
281 : "a" (addr), "m" (*(char *) addr) : "cc" );
284 asm volatile ("oi 0(%1),0x10" : "=m" (*(char *) addr)
285 : "a" (addr), "m" (*(char *) addr) : "cc" );
288 asm volatile ("oi 0(%1),0x20" : "=m" (*(char *) addr)
289 : "a" (addr), "m" (*(char *) addr) : "cc" );
292 asm volatile ("oi 0(%1),0x40" : "=m" (*(char *) addr)
293 : "a" (addr), "m" (*(char *) addr) : "cc" );
296 asm volatile ("oi 0(%1),0x80" : "=m" (*(char *) addr)
297 : "a" (addr), "m" (*(char *) addr) : "cc" );
302 #define set_bit_simple(nr,addr) \
303 (__builtin_constant_p((nr)) ? \
304 __constant_set_bit((nr),(addr)) : \
305 __set_bit((nr),(addr)) )
308 * fast, non-SMP clear_bit routine
311 __clear_bit(unsigned long nr, volatile unsigned long *ptr)
315 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
316 asm volatile("nc 0(1,%1),0(%2)"
317 : "=m" (*(char *) addr)
318 : "a" (addr), "a" (_ni_bitmap + (nr & 7)),
319 "m" (*(char *) addr) : "cc" );
323 __constant_clear_bit(const unsigned long nr, volatile unsigned long *ptr)
327 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
330 asm volatile ("ni 0(%1),0xFE" : "=m" (*(char *) addr)
331 : "a" (addr), "m" (*(char *) addr) : "cc" );
334 asm volatile ("ni 0(%1),0xFD": "=m" (*(char *) addr)
335 : "a" (addr), "m" (*(char *) addr) : "cc" );
338 asm volatile ("ni 0(%1),0xFB" : "=m" (*(char *) addr)
339 : "a" (addr), "m" (*(char *) addr) : "cc" );
342 asm volatile ("ni 0(%1),0xF7" : "=m" (*(char *) addr)
343 : "a" (addr), "m" (*(char *) addr) : "cc" );
346 asm volatile ("ni 0(%1),0xEF" : "=m" (*(char *) addr)
347 : "a" (addr), "m" (*(char *) addr) : "cc" );
350 asm volatile ("ni 0(%1),0xDF" : "=m" (*(char *) addr)
351 : "a" (addr), "m" (*(char *) addr) : "cc" );
354 asm volatile ("ni 0(%1),0xBF" : "=m" (*(char *) addr)
355 : "a" (addr), "m" (*(char *) addr) : "cc" );
358 asm volatile ("ni 0(%1),0x7F" : "=m" (*(char *) addr)
359 : "a" (addr), "m" (*(char *) addr) : "cc" );
364 #define clear_bit_simple(nr,addr) \
365 (__builtin_constant_p((nr)) ? \
366 __constant_clear_bit((nr),(addr)) : \
367 __clear_bit((nr),(addr)) )
370 * fast, non-SMP change_bit routine
372 static inline void __change_bit(unsigned long nr, volatile unsigned long *ptr)
376 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
377 asm volatile("xc 0(1,%1),0(%2)"
378 : "=m" (*(char *) addr)
379 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
380 "m" (*(char *) addr) : "cc" );
384 __constant_change_bit(const unsigned long nr, volatile unsigned long *ptr)
388 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
391 asm volatile ("xi 0(%1),0x01" : "=m" (*(char *) addr)
392 : "a" (addr), "m" (*(char *) addr) : "cc" );
395 asm volatile ("xi 0(%1),0x02" : "=m" (*(char *) addr)
396 : "a" (addr), "m" (*(char *) addr) : "cc" );
399 asm volatile ("xi 0(%1),0x04" : "=m" (*(char *) addr)
400 : "a" (addr), "m" (*(char *) addr) : "cc" );
403 asm volatile ("xi 0(%1),0x08" : "=m" (*(char *) addr)
404 : "a" (addr), "m" (*(char *) addr) : "cc" );
407 asm volatile ("xi 0(%1),0x10" : "=m" (*(char *) addr)
408 : "a" (addr), "m" (*(char *) addr) : "cc" );
411 asm volatile ("xi 0(%1),0x20" : "=m" (*(char *) addr)
412 : "a" (addr), "m" (*(char *) addr) : "cc" );
415 asm volatile ("xi 0(%1),0x40" : "=m" (*(char *) addr)
416 : "a" (addr), "m" (*(char *) addr) : "cc" );
419 asm volatile ("xi 0(%1),0x80" : "=m" (*(char *) addr)
420 : "a" (addr), "m" (*(char *) addr) : "cc" );
425 #define change_bit_simple(nr,addr) \
426 (__builtin_constant_p((nr)) ? \
427 __constant_change_bit((nr),(addr)) : \
428 __change_bit((nr),(addr)) )
431 * fast, non-SMP test_and_set_bit routine
434 test_and_set_bit_simple(unsigned long nr, volatile unsigned long *ptr)
439 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
440 ch = *(unsigned char *) addr;
441 asm volatile("oc 0(1,%1),0(%2)"
442 : "=m" (*(char *) addr)
443 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
444 "m" (*(char *) addr) : "cc", "memory" );
445 return (ch >> (nr & 7)) & 1;
447 #define __test_and_set_bit(X,Y) test_and_set_bit_simple(X,Y)
450 * fast, non-SMP test_and_clear_bit routine
453 test_and_clear_bit_simple(unsigned long nr, volatile unsigned long *ptr)
458 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
459 ch = *(unsigned char *) addr;
460 asm volatile("nc 0(1,%1),0(%2)"
461 : "=m" (*(char *) addr)
462 : "a" (addr), "a" (_ni_bitmap + (nr & 7)),
463 "m" (*(char *) addr) : "cc", "memory" );
464 return (ch >> (nr & 7)) & 1;
466 #define __test_and_clear_bit(X,Y) test_and_clear_bit_simple(X,Y)
469 * fast, non-SMP test_and_change_bit routine
472 test_and_change_bit_simple(unsigned long nr, volatile unsigned long *ptr)
477 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
478 ch = *(unsigned char *) addr;
479 asm volatile("xc 0(1,%1),0(%2)"
480 : "=m" (*(char *) addr)
481 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
482 "m" (*(char *) addr) : "cc", "memory" );
483 return (ch >> (nr & 7)) & 1;
485 #define __test_and_change_bit(X,Y) test_and_change_bit_simple(X,Y)
488 #define set_bit set_bit_cs
489 #define clear_bit clear_bit_cs
490 #define change_bit change_bit_cs
491 #define test_and_set_bit test_and_set_bit_cs
492 #define test_and_clear_bit test_and_clear_bit_cs
493 #define test_and_change_bit test_and_change_bit_cs
495 #define set_bit set_bit_simple
496 #define clear_bit clear_bit_simple
497 #define change_bit change_bit_simple
498 #define test_and_set_bit test_and_set_bit_simple
499 #define test_and_clear_bit test_and_clear_bit_simple
500 #define test_and_change_bit test_and_change_bit_simple
505 * This routine doesn't need to be atomic.
508 static inline int __test_bit(unsigned long nr, const volatile unsigned long *ptr)
513 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
514 ch = *(volatile unsigned char *) addr;
515 return (ch >> (nr & 7)) & 1;
519 __constant_test_bit(unsigned long nr, const volatile unsigned long *addr) {
520 return (((volatile char *) addr)
521 [(nr^(__BITOPS_WORDSIZE-8))>>3] & (1<<(nr&7))) != 0;
524 #define test_bit(nr,addr) \
525 (__builtin_constant_p((nr)) ? \
526 __constant_test_bit((nr),(addr)) : \
527 __test_bit((nr),(addr)) )
530 * ffz = Find First Zero in word. Undefined if no zero exists,
531 * so code should check against ~0UL first..
533 static inline unsigned long ffz(unsigned long word)
535 unsigned long bit = 0;
538 if (likely((word & 0xffffffff) == 0xffffffff)) {
543 if (likely((word & 0xffff) == 0xffff)) {
547 if (likely((word & 0xff) == 0xff)) {
551 return bit + _zb_findmap[word & 0xff];
555 * __ffs = find first bit in word. Undefined if no bit exists,
556 * so code should check against 0UL first..
558 static inline unsigned long __ffs (unsigned long word)
560 unsigned long bit = 0;
563 if (likely((word & 0xffffffff) == 0)) {
568 if (likely((word & 0xffff) == 0)) {
572 if (likely((word & 0xff) == 0)) {
576 return bit + _sb_findmap[word & 0xff];
580 * Find-bit routines..
586 find_first_zero_bit(const unsigned long * addr, unsigned long size)
588 typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype;
589 unsigned long cmp, count;
594 __asm__(" lhi %1,-1\n"
620 : "=&a" (res), "=&d" (cmp), "=&a" (count)
621 : "a" (size), "a" (addr), "a" (&_zb_findmap),
622 "m" (*(addrtype *) addr) : "cc" );
623 return (res < size) ? res : size;
627 find_first_bit(const unsigned long * addr, unsigned long size)
629 typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype;
630 unsigned long cmp, count;
635 __asm__(" slr %1,%1\n"
661 : "=&a" (res), "=&d" (cmp), "=&a" (count)
662 : "a" (size), "a" (addr), "a" (&_sb_findmap),
663 "m" (*(addrtype *) addr) : "cc" );
664 return (res < size) ? res : size;
667 #else /* __s390x__ */
669 static inline unsigned long
670 find_first_zero_bit(const unsigned long * addr, unsigned long size)
672 typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype;
673 unsigned long res, cmp, count;
677 __asm__(" lghi %1,-1\n"
682 "0: cg %1,0(%0,%4)\n"
688 "1: lg %2,0(%0,%4)\n"
699 "3: tmll %2,0x00ff\n"
707 : "=&a" (res), "=&d" (cmp), "=&a" (count)
708 : "a" (size), "a" (addr), "a" (&_zb_findmap),
709 "m" (*(addrtype *) addr) : "cc" );
710 return (res < size) ? res : size;
713 static inline unsigned long
714 find_first_bit(const unsigned long * addr, unsigned long size)
716 typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype;
717 unsigned long res, cmp, count;
721 __asm__(" slgr %1,%1\n"
726 "0: cg %1,0(%0,%4)\n"
732 "1: lg %2,0(%0,%4)\n"
743 "3: tmll %2,0x00ff\n"
751 : "=&a" (res), "=&d" (cmp), "=&a" (count)
752 : "a" (size), "a" (addr), "a" (&_sb_findmap),
753 "m" (*(addrtype *) addr) : "cc" );
754 return (res < size) ? res : size;
757 #endif /* __s390x__ */
760 find_next_zero_bit (const unsigned long * addr, unsigned long size,
761 unsigned long offset)
763 const unsigned long *p;
764 unsigned long bit, set;
768 bit = offset & (__BITOPS_WORDSIZE - 1);
771 p = addr + offset / __BITOPS_WORDSIZE;
774 * s390 version of ffz returns __BITOPS_WORDSIZE
775 * if no zero bit is present in the word.
777 set = ffz(*p >> bit) + bit;
779 return size + offset;
780 if (set < __BITOPS_WORDSIZE)
782 offset += __BITOPS_WORDSIZE;
783 size -= __BITOPS_WORDSIZE;
786 return offset + find_first_zero_bit(p, size);
790 find_next_bit (const unsigned long * addr, unsigned long size,
791 unsigned long offset)
793 const unsigned long *p;
794 unsigned long bit, set;
798 bit = offset & (__BITOPS_WORDSIZE - 1);
801 p = addr + offset / __BITOPS_WORDSIZE;
804 * s390 version of __ffs returns __BITOPS_WORDSIZE
805 * if no one bit is present in the word.
807 set = __ffs(*p & (~0UL << bit));
809 return size + offset;
810 if (set < __BITOPS_WORDSIZE)
812 offset += __BITOPS_WORDSIZE;
813 size -= __BITOPS_WORDSIZE;
816 return offset + find_first_bit(p, size);
820 * Every architecture must define this function. It's the fastest
821 * way of searching a 140-bit bitmap where the first 100 bits are
822 * unlikely to be set. It's guaranteed that at least one of the 140
825 static inline int sched_find_first_bit(unsigned long *b)
827 return find_first_bit(b, 140);
830 #include <asm-generic/bitops/ffs.h>
832 #include <asm-generic/bitops/fls.h>
833 #include <asm-generic/bitops/fls64.h>
835 #include <asm-generic/bitops/hweight.h>
840 * ATTENTION: intel byte ordering convention for ext2 and minix !!
841 * bit 0 is the LSB of addr; bit 31 is the MSB of addr;
842 * bit 32 is the LSB of (addr+4).
843 * That combined with the little endian byte order of Intel gives the
844 * following bit order in memory:
845 * 07 06 05 04 03 02 01 00 15 14 13 12 11 10 09 08 \
846 * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
849 #define ext2_set_bit(nr, addr) \
850 __test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
851 #define ext2_set_bit_atomic(lock, nr, addr) \
852 test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
853 #define ext2_clear_bit(nr, addr) \
854 __test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
855 #define ext2_clear_bit_atomic(lock, nr, addr) \
856 test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
857 #define ext2_test_bit(nr, addr) \
858 test_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
863 ext2_find_first_zero_bit(void *vaddr, unsigned int size)
865 typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype;
866 unsigned long cmp, count;
871 __asm__(" lhi %1,-1\n"
876 "0: cl %1,0(%0,%4)\n"
898 : "=&a" (res), "=&d" (cmp), "=&a" (count)
899 : "a" (size), "a" (vaddr), "a" (&_zb_findmap),
900 "m" (*(addrtype *) vaddr) : "cc" );
901 return (res < size) ? res : size;
904 #else /* __s390x__ */
906 static inline unsigned long
907 ext2_find_first_zero_bit(void *vaddr, unsigned long size)
909 typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype;
910 unsigned long res, cmp, count;
914 __asm__(" lghi %1,-1\n"
919 "0: clg %1,0(%0,%4)\n"
925 "1: cl %1,0(%0,%4)\n"
936 "3: tmll %2,0xff00\n"
944 : "=&a" (res), "=&d" (cmp), "=&a" (count)
945 : "a" (size), "a" (vaddr), "a" (&_zb_findmap),
946 "m" (*(addrtype *) vaddr) : "cc" );
947 return (res < size) ? res : size;
950 #endif /* __s390x__ */
953 ext2_find_next_zero_bit(void *vaddr, unsigned long size, unsigned long offset)
955 unsigned long *addr = vaddr, *p;
956 unsigned long word, bit, set;
960 bit = offset & (__BITOPS_WORDSIZE - 1);
963 p = addr + offset / __BITOPS_WORDSIZE;
970 : "=&a" (word) : "a" (p), "m" (*p) : "cc" );
972 asm(" lrvg %0,%1" : "=a" (word) : "m" (*p) );
975 * s390 version of ffz returns __BITOPS_WORDSIZE
976 * if no zero bit is present in the word.
978 set = ffz(word >> bit) + bit;
980 return size + offset;
981 if (set < __BITOPS_WORDSIZE)
983 offset += __BITOPS_WORDSIZE;
984 size -= __BITOPS_WORDSIZE;
987 return offset + ext2_find_first_zero_bit(p, size);
990 #include <asm-generic/bitops/minix.h>
992 #endif /* __KERNEL__ */
994 #endif /* _S390_BITOPS_H */