2 * Renesas Solutions Highlander R7785RP Support.
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2006 - 2008 Paul Mundt
6 * Copyright (C) 2007 Magnus Damm
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/init.h>
13 #include <linux/irq.h>
15 #include <asm/r7780rp.h>
20 /* FPGA specific interrupt sources */
21 CF, /* Compact Flash */
25 TH_ALERT, /* Temperature sensor */
26 AX88796, /* Ethernet controller */
28 /* external bus connector */
29 EXT0, EXT1, EXT2, EXT3, EXT4, EXT5, EXT6, EXT7,
32 static struct intc_vect vectors[] __initdata = {
34 INTC_IRQ(SMBUS, IRQ_SMBUS),
36 INTC_IRQ(RTC, IRQ_RTC),
37 INTC_IRQ(TH_ALERT, IRQ_TH_ALERT),
39 INTC_IRQ(EXT0, IRQ_EXT0), INTC_IRQ(EXT1, IRQ_EXT1),
40 INTC_IRQ(EXT2, IRQ_EXT2), INTC_IRQ(EXT3, IRQ_EXT3),
42 INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5),
43 INTC_IRQ(EXT6, IRQ_EXT6), INTC_IRQ(EXT7, IRQ_EXT7),
45 INTC_IRQ(AX88796, IRQ_AX88796),
48 static struct intc_mask_reg mask_registers[] __initdata = {
49 { 0xa4000010, 0, 16, /* IRLMCR1 */
50 { 0, 0, 0, 0, CF, AX88796, SMBUS, TP,
51 RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } },
52 { 0xa4000012, 0, 16, /* IRLMCR2 */
53 { 0, 0, 0, 0, 0, 0, 0, 0,
54 EXT7, EXT6, EXT5, EXT4, EXT3, EXT2, EXT1, EXT0 } },
57 static unsigned char irl2irq[HL_NR_IRL] __initdata = {
58 0, IRQ_CF, IRQ_EXT4, IRQ_EXT5,
59 IRQ_EXT6, IRQ_EXT7, IRQ_SMBUS, IRQ_TP,
60 IRQ_RTC, IRQ_TH_ALERT, IRQ_AX88796, IRQ_EXT0,
61 IRQ_EXT1, IRQ_EXT2, IRQ_EXT3,
64 static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
65 NULL, mask_registers, NULL, NULL);
67 unsigned char * __init highlander_plat_irq_setup(void)
69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
72 printk(KERN_INFO "Using r7785rp interrupt controller.\n");
74 ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */
76 /* Setup the FPGA IRL */
77 ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */
78 ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */
79 ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */
80 ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */
81 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */
82 ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */
84 register_intc_controller(&intc_desc);